diff --git a/esp_serial_slave_link/CHANGELOG.md b/esp_serial_slave_link/CHANGELOG.md
new file mode 100644
index 0000000..69e8bc5
--- /dev/null
+++ b/esp_serial_slave_link/CHANGELOG.md
@@ -0,0 +1,8 @@
+## 1.0.1
+
+- Fixed build failure issue on chip which doesn't support SDMMC host
+- Remove dependency to `soc/host_reg.h`
+
+## 1.0.0
+
+- Inititial version
\ No newline at end of file
diff --git a/esp_serial_slave_link/CMakeLists.txt b/esp_serial_slave_link/CMakeLists.txt
index e9cb0fe..7b32461 100644
--- a/esp_serial_slave_link/CMakeLists.txt
+++ b/esp_serial_slave_link/CMakeLists.txt
@@ -1,6 +1,7 @@
 idf_component_register(SRCS "essl.c"
                 "essl_sdio.c"
                 "essl_spi.c"
+                "essl_sdio_defs.c"
             INCLUDE_DIRS "include"
             REQUIRES "sdmmc"
                 "driver"
diff --git a/esp_serial_slave_link/essl_sdio.c b/esp_serial_slave_link/essl_sdio.c
index 70718b0..53adabf 100644
--- a/esp_serial_slave_link/essl_sdio.c
+++ b/esp_serial_slave_link/essl_sdio.c
@@ -12,12 +12,24 @@
 #include "essl_internal.h"
 #include "essl_sdio.h"
 
-#if SOC_SDIO_SLAVE_SUPPORTED
-#include "soc/host_reg.h"
-
 static const char TAG[] = "essl_sdio";
 
-#define HOST_SLCHOST_CONF_W_REG(pos) (HOST_SLCHOST_CONF_W0_REG+pos+(pos>23?4:0)+(pos>31?12:0))
+#ifndef DR_REG_SLCHOST_BASE
+#define DR_REG_SLCHOST_BASE             0 //The SDIO slave only check the least significant 10 bits, this doesn't matter
+#endif
+
+//This should be consistent with the macro in soc/host_reg.h
+#define HOST_SLC0HOST_TOKEN_RDATA_REG   (DR_REG_SLCHOST_BASE + 0x44)
+#define HOST_SLC0HOST_INT_RAW_REG       (DR_REG_SLCHOST_BASE + 0x50)
+#define HOST_SLC0HOST_INT_ST_REG        (DR_REG_SLCHOST_BASE + 0x58)
+#define HOST_SLCHOST_PKT_LEN_REG        (DR_REG_SLCHOST_BASE + 0x60)
+#define HOST_SLCHOST_CONF_W0_REG        (DR_REG_SLCHOST_BASE + 0x6C)
+#define HOST_SLCHOST_CONF_W7_REG        (DR_REG_SLCHOST_BASE + 0x8C)
+#define HOST_SLC0HOST_INT_CLR_REG       (DR_REG_SLCHOST_BASE + 0xD4)
+#define HOST_SLC0HOST_FUNC1_INT_ENA_REG (DR_REG_SLCHOST_BASE + 0xDC)
+
+
+#define HOST_SLCHOST_CONF_W_REG(pos)    (HOST_SLCHOST_CONF_W0_REG+pos+(pos>23?4:0)+(pos>31?12:0))
 
 #define ESSL_CMD53_END_ADDR    0x1f800
 
@@ -495,5 +507,3 @@ void essl_sdio_reset_cnt(void *arg)
     ctx->rx_got_bytes = 0;
     ctx->tx_sent_buffers = 0;
 }
-
-#endif // #if SOC_SDIO_SLAVE_SUPPORTED
diff --git a/esp_serial_slave_link/essl_sdio_defs.c b/esp_serial_slave_link/essl_sdio_defs.c
new file mode 100644
index 0000000..596310a
--- /dev/null
+++ b/esp_serial_slave_link/essl_sdio_defs.c
@@ -0,0 +1,14 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// Definitions of Espressif SDIO Slave hardware
+
+
+#include "essl_sdio.h"
+
+essl_sdio_def_t ESSL_SDIO_DEF_ESP32 = {
+    .new_packet_intr_mask = BIT(23),
+};
diff --git a/esp_serial_slave_link/idf_component.yml b/esp_serial_slave_link/idf_component.yml
index 055f35d..1cf44d6 100644
--- a/esp_serial_slave_link/idf_component.yml
+++ b/esp_serial_slave_link/idf_component.yml
@@ -1,4 +1,4 @@
-version: "1.0.0"
+version: "1.0.1"
 description: "Espressif Serial Slave Link Library"
 url: https://github.com/espressif/idf-extra-components/tree/master/esp_serial_slave_link
 dependencies:
diff --git a/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h b/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h
index 1f26261..7f5431d 100644
--- a/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h
+++ b/esp_serial_slave_link/include/esp_serial_slave_link/essl_sdio.h
@@ -9,6 +9,7 @@
 #pragma once
 
 #include "esp_err.h"
+#include "driver/sdmmc_types.h"
 #include "driver/sdmmc_host.h"
 
 #include "esp_serial_slave_link/essl.h"
@@ -23,6 +24,14 @@ typedef struct {
     int recv_buffer_size;   ///< The pre-negotiated recv buffer size used by both the host and the slave.
 } essl_sdio_config_t;
 
+typedef struct {
+    //interrupts
+    uint32_t new_packet_intr_mask;
+} essl_sdio_def_t;
+
+/// Definitions of ESP32 SDIO Slave hardware
+extern essl_sdio_def_t ESSL_SDIO_DEF_ESP32;
+
 /**
  * @brief Initialize the ESSL SDIO device and get its handle.
  *