diff --git a/demos/bsp/boards/board.h b/demos/bsp/boards/board.h index 6b64e62fa..3fe27b0d8 100644 --- a/demos/bsp/boards/board.h +++ b/demos/bsp/boards/board.h @@ -67,6 +67,7 @@ #define PRINTF_TARGET_DEBUG_CONSOLE 1 // IDE semihosting console #define PRINTF_TARGET_UART 2 #define PRINTF_TARGET_SWO 3 // aka SWV, ITM +#define PRINTF_TARGET_NONE 4 #if BOARD == 0 #error BOARD is not defined or supported yet @@ -88,7 +89,7 @@ #define CFG_TICKS_PER_SECOND 1000 #if CFG_PRINTF_TARGET == PRINTF_TARGET_UART - #define CFG_UART_ENABLE 1 + #define CFG_UART_ENABLE 0 #define CFG_UART_BAUDRATE 115200 #endif diff --git a/demos/bsp/boards/board_ea4357.c b/demos/bsp/boards/board_ea4357.c index 5d1aee4df..51801bcb4 100644 --- a/demos/bsp/boards/board_ea4357.c +++ b/demos/bsp/boards/board_ea4357.c @@ -59,6 +59,7 @@ void board_init(void) scu_pinmux(0x2, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus Power // USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required + scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur #if 0 // Leds Init diff --git a/demos/bsp/boards/board_ngx4330.c b/demos/bsp/boards/board_ngx4330.c index cc85b699c..d42159d3a 100644 --- a/demos/bsp/boards/board_ngx4330.c +++ b/demos/bsp/boards/board_ngx4330.c @@ -64,6 +64,7 @@ void board_init(void) //------------- USB Bus power HOST ONLY-------------// scu_pinmux(0x1, 7, MD_PUP | MD_EZI, FUNC4); // P1_7 USB0_PWR_EN, USB0 VBus function Xplorer + scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur scu_pinmux(0x2, 6, MD_PUP | MD_EZI, FUNC4); // P2_6 is configured as GPIO5[6] for USB1_PWR_EN GPIO_SetDir (5, BIT_(6), 1); // GPIO5[6] is output GPIO_SetValue (5, BIT_(6)); // GPIO5[6] output high diff --git a/demos/bsp/boards/board_ngx4330.h b/demos/bsp/boards/board_ngx4330.h index c3c126c43..6eee34f47 100644 --- a/demos/bsp/boards/board_ngx4330.h +++ b/demos/bsp/boards/board_ngx4330.h @@ -65,7 +65,7 @@ #define CFG_LED_ON (1) #define CFG_LED_OFF (0) -#define CFG_PRINTF_TARGET PRINTF_TARGET_UART +#define CFG_PRINTF_TARGET PRINTF_TARGET_DEBUG_CONSOLE #ifdef __cplusplus } diff --git a/tinyusb/hal/hal_lpc43xx.c b/tinyusb/hal/hal_lpc43xx.c index 65cf7568a..5a86c23dd 100644 --- a/tinyusb/hal/hal_lpc43xx.c +++ b/tinyusb/hal/hal_lpc43xx.c @@ -78,6 +78,7 @@ tusb_error_t hal_init(void) #if TUSB_CFG_CONTROLLER1_MODE /* connect CLK_USB1 to 60 MHz clock */ CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */ + LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */ LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY #if TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST