From b76baeda977c60feef23cacbd079d1174731bdbb Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 11:24:43 +0700 Subject: [PATCH 01/35] docs update --- examples/readme.md | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/examples/readme.md b/examples/readme.md index f48e897d6..dc4c563dd 100644 --- a/examples/readme.md +++ b/examples/readme.md @@ -30,9 +30,16 @@ $ make BOARD=feather_nrf52840_express all ## Flash -TODO: write more on flashing +`flash` target will use the on-board debugger (jlink/cmsisdap/stlink/dfu) to flash the binary. We should install those debugger/programmer software in advance. Futhermore, since external jlink can be used with most of the board, there is also `flash-jlink` target for out convenience. ``` $ make BOARD=feather_nrf52840_express flash +$ make BOARD=feather_nrf52840_express flash-jlink +``` + +Some board use uf2 bootloader for drag & drop in to mass storage device, uf2 can be generated with `uf2` target + +``` +$ make BOARD=feather_nrf52840_express all uf2 ``` From 8ac115a33e47d15f48f743dce6cb7658c3b62c75 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 12:23:03 +0700 Subject: [PATCH 02/35] clean up --- hw/bsp/ea4357/board.mk | 24 +- hw/bsp/ea4357/cr_startup_lpc43xx.c | 515 ----------------------------- hw/bsp/lpcxpresso11u37/board.mk | 18 +- hw/bsp/lpcxpresso11u68/board.mk | 18 +- hw/bsp/lpcxpresso1769/board.mk | 22 +- hw/bsp/mbed1768/board.mk | 22 +- hw/mcu/nxp/lpc_driver | 2 +- 7 files changed, 56 insertions(+), 565 deletions(-) delete mode 100644 hw/bsp/ea4357/cr_startup_lpc43xx.c diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk index a87f0d617..1af33c15d 100644 --- a/hw/bsp/ea4357/board.mk +++ b/hw/bsp/ea4357/board.mk @@ -7,6 +7,11 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_LPC43XX \ -D__USE_LPCOPEN +# lpc_types.h cause following errors +CFLAGS += -Wno-error=strict-prototypes + +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc43xx/lpc_chip_43xx + # All source paths should be relative to the top level. LD_FILE = hw/bsp/ea4357/lpc4357.ld @@ -14,17 +19,18 @@ LD_FILE = hw/bsp/ea4357/lpc4357.ld SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/chip_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/clock_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/gpio_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/sysinit_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/i2c_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/i2cm_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_43xx/src/uart_18xx_43xx.c + $(MCU_DIR)/../cr_startup_lpc43xx.c \ + $(MCU_DIR)/src/chip_18xx_43xx.c \ + $(MCU_DIR)/src/clock_18xx_43xx.c \ + $(MCU_DIR)/src/gpio_18xx_43xx.c \ + $(MCU_DIR)/src/sysinit_18xx_43xx.c \ + $(MCU_DIR)/src/i2c_18xx_43xx.c \ + $(MCU_DIR)/src/i2cm_18xx_43xx.c \ + $(MCU_DIR)/src/uart_18xx_43xx.c INC += \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_43xx/inc \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_43xx/inc/config_43xx + $(TOP)/$(MCU_DIR)/inc \ + $(TOP)/$(MCU_DIR)/inc/config_43xx # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/ea4357/cr_startup_lpc43xx.c b/hw/bsp/ea4357/cr_startup_lpc43xx.c deleted file mode 100644 index ea6bb145f..000000000 --- a/hw/bsp/ea4357/cr_startup_lpc43xx.c +++ /dev/null @@ -1,515 +0,0 @@ -//***************************************************************************** -// LPC43xx (Cortex-M4) Microcontroller Startup code for use with LPCXpresso IDE -// -// Version : 150706 -//***************************************************************************** -// -// Copyright(C) NXP Semiconductors, 2013-2015 -// All rights reserved. -// -// Software that is described herein is for illustrative purposes only -// which provides customers with programming information regarding the -// LPC products. This software is supplied "AS IS" without any warranties of -// any kind, and NXP Semiconductors and its licensor disclaim any and -// all warranties, express or implied, including all implied warranties of -// merchantability, fitness for a particular purpose and non-infringement of -// intellectual property rights. NXP Semiconductors assumes no responsibility -// or liability for the use of the software, conveys no license or rights under any -// patent, copyright, mask work right, or any other intellectual property rights in -// or to any products. NXP Semiconductors reserves the right to make changes -// in the software without notification. NXP Semiconductors also makes no -// representation or warranty that such application will be suitable for the -// specified use without further testing or modification. -// -// Permission to use, copy, modify, and distribute this software and its -// documentation is hereby granted, under NXP Semiconductors' and its -// licensor's relevant copyrights in the software, without fee, provided that it -// is used in conjunction with NXP Semiconductors microcontrollers. This -// copyright, permission, and disclaimer notice must appear in all copies of -// this code. -//***************************************************************************** - -#if defined (__cplusplus) -#ifdef __REDLIB__ -#error Redlib does not support C++ -#else -//***************************************************************************** -// -// The entry point for the C++ library startup -// -//***************************************************************************** -extern "C" { - extern void __libc_init_array(void); -} -#endif -#endif - -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) - -//***************************************************************************** -#if defined (__cplusplus) -extern "C" { -#endif - -//***************************************************************************** -#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) -// Declaration of external SystemInit function -extern void SystemInit(void); -#endif - -//***************************************************************************** -// -// Forward declaration of the default handlers. These are aliased. -// When the application defines a handler (with the same name), this will -// automatically take precedence over these weak definitions -// -//***************************************************************************** -void ResetISR(void); -WEAK void NMI_Handler(void); -WEAK void HardFault_Handler(void); -WEAK void MemManage_Handler(void); -WEAK void BusFault_Handler(void); -WEAK void UsageFault_Handler(void); -WEAK void SVC_Handler(void); -WEAK void DebugMon_Handler(void); -WEAK void PendSV_Handler(void); -WEAK void SysTick_Handler(void); -WEAK void IntDefaultHandler(void); - -//***************************************************************************** -// -// Forward declaration of the specific IRQ handlers. These are aliased -// to the IntDefaultHandler, which is a 'forever' loop. When the application -// defines a handler (with the same name), this will automatically take -// precedence over these weak definitions -// -//***************************************************************************** -void DAC_IRQHandler(void) ALIAS(IntDefaultHandler); -#if defined (__USE_LPCOPEN) -void M0APP_IRQHandler(void) ALIAS(IntDefaultHandler); -#else -void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler); -#endif -void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); -void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler); -void ETH_IRQHandler(void) ALIAS(IntDefaultHandler); -void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void LCD_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB0_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SCT_IRQHandler(void) ALIAS(IntDefaultHandler); -void RIT_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler); -void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); -void SPI_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART3_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler); -void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler); -void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler); -void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler); -void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler); -#if defined (__USE_LPCOPEN) -void ADCHS_IRQHandler(void) ALIAS(IntDefaultHandler); -#else -void VADC_IRQHandler(void) ALIAS(IntDefaultHandler); -#endif -void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler); -void RTC_IRQHandler(void) ALIAS(IntDefaultHandler); -void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); -void M0SUB_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler); -void QEI_IRQHandler(void) ALIAS(IntDefaultHandler); - -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for Redlib based applications -// main() is the entry point for Newlib based applications -// -//***************************************************************************** -#if defined (__REDLIB__) -extern void __main(void); -#endif -extern int main(void); -//***************************************************************************** -// -// External declaration for the pointer to the stack top from the Linker Script -// -//***************************************************************************** -extern void _vStackTop(void); - -//***************************************************************************** -// -// External declaration for LPC MCU vector table checksum from Linker Script -// -//***************************************************************************** -WEAK extern void __valid_user_code_checksum(void); - -//***************************************************************************** -#if defined (__cplusplus) -} // extern "C" -#endif -//***************************************************************************** -// -// The vector table. -// This relies on the linker script to place at correct location in memory. -// -//***************************************************************************** -extern void (* const g_pfnVectors[])(void); -__attribute__ ((used,section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = { - // Core Level - CM4 - &_vStackTop, // The initial stack pointer - ResetISR, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - __valid_user_code_checksum, // LPC MCU Checksum - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - - // Chip Level - LPC43 (M4) - DAC_IRQHandler, // 16 -#if defined (__USE_LPCOPEN) - M0APP_IRQHandler, // 17 CortexM4/M0 (LPC43XX ONLY) -#else - M0CORE_IRQHandler, // 17 -#endif - DMA_IRQHandler, // 18 - 0, // 19 - FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts - ETH_IRQHandler, // 21 - SDIO_IRQHandler, // 22 - LCD_IRQHandler, // 23 - USB0_IRQHandler, // 24 - USB1_IRQHandler, // 25 - SCT_IRQHandler, // 26 - RIT_IRQHandler, // 27 - TIMER0_IRQHandler, // 28 - TIMER1_IRQHandler, // 29 - TIMER2_IRQHandler, // 30 - TIMER3_IRQHandler, // 31 - MCPWM_IRQHandler, // 32 - ADC0_IRQHandler, // 33 - I2C0_IRQHandler, // 34 - I2C1_IRQHandler, // 35 - SPI_IRQHandler, // 36 - ADC1_IRQHandler, // 37 - SSP0_IRQHandler, // 38 - SSP1_IRQHandler, // 39 - UART0_IRQHandler, // 40 - UART1_IRQHandler, // 41 - UART2_IRQHandler, // 42 - UART3_IRQHandler, // 43 - I2S0_IRQHandler, // 44 - I2S1_IRQHandler, // 45 - SPIFI_IRQHandler, // 46 - SGPIO_IRQHandler, // 47 - GPIO0_IRQHandler, // 48 - GPIO1_IRQHandler, // 49 - GPIO2_IRQHandler, // 50 - GPIO3_IRQHandler, // 51 - GPIO4_IRQHandler, // 52 - GPIO5_IRQHandler, // 53 - GPIO6_IRQHandler, // 54 - GPIO7_IRQHandler, // 55 - GINT0_IRQHandler, // 56 - GINT1_IRQHandler, // 57 - EVRT_IRQHandler, // 58 - CAN1_IRQHandler, // 59 - 0, // 60 -#if defined (__USE_LPCOPEN) - ADCHS_IRQHandler, // 61 ADCHS combined interrupt -#else - VADC_IRQHandler, // 61 -#endif - ATIMER_IRQHandler, // 62 - RTC_IRQHandler, // 63 - 0, // 64 - WDT_IRQHandler, // 65 - M0SUB_IRQHandler, // 66 - CAN0_IRQHandler, // 67 - QEI_IRQHandler, // 68 -}; - - -//***************************************************************************** -// Functions to carry out the initialization of RW and BSS data sections. These -// are written as separate functions rather than being inlined within the -// ResetISR() function in order to cope with MCUs with multiple banks of -// memory. -//***************************************************************************** - __attribute__((section(".after_vectors" -))) -void data_init(unsigned int romstart, unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int *pulSrc = (unsigned int*) romstart; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = *pulSrc++; -} - -__attribute__ ((section(".after_vectors"))) -void bss_init(unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = 0; -} - -//***************************************************************************** -// The following symbols are constructs generated by the linker, indicating -// the location of various points in the "Global Section Table". This table is -// created by the linker via the Code Red managed linker script mechanism. It -// contains the load address, execution address and length of each RW data -// section and the execution and length of each BSS (zero initialized) section. -//***************************************************************************** -extern unsigned int __data_section_table; -extern unsigned int __data_section_table_end; -extern unsigned int __bss_section_table; -extern unsigned int __bss_section_table_end; - -//***************************************************************************** -// Reset entry point for your code. -// Sets up a simple runtime environment and initializes the C/C++ -// library. -// -//***************************************************************************** -void ResetISR(void) { - -// ************************************************************* -// The following conditional block of code manually resets as -// much of the peripheral set of the LPC43 as possible. This is -// done because the LPC43 does not provide a means of triggering -// a full system reset under debugger control, which can cause -// problems in certain circumstances when debugging. -// -// You can prevent this code block being included if you require -// (for example when creating a final executable which you will -// not debug) by setting the define 'DONT_RESET_ON_RESTART'. -// -#ifndef DONT_RESET_ON_RESTART - - // Disable interrupts - __asm volatile ("cpsid i"); - // equivalent to CMSIS '__disable_irq()' function - - unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100; - // LPC_RGU->RESET_CTRL0 @ 0x40053100 - // LPC_RGU->RESET_CTRL1 @ 0x40053104 - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - - // Write to LPC_RGU->RESET_CTRL0 - *(RESET_CONTROL + 0) = 0x10DF1000; - // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST| - // USB1_RST|USB0_RST|LCD_RST|M0_SUB_RST - - // Write to LPC_RGU->RESET_CTRL1 - *(RESET_CONTROL + 1) = 0x01DFF7FF; - // M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST| - // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST| - // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST| - // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST - - // Clear all pending interrupts in the NVIC - volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280; - unsigned int irqpendloop; - for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) { - *(NVIC_ICPR + irqpendloop) = 0xFFFFFFFF; - } - - // Reenable interrupts - __asm volatile ("cpsie i"); - // equivalent to CMSIS '__enable_irq()' function - -#endif // ifndef DONT_RESET_ON_RESTART -// ************************************************************* - -#if defined (__USE_LPCOPEN) - SystemInit(); -#endif - - // - // Copy the data sections from flash to SRAM. - // - unsigned int LoadAddr, ExeAddr, SectionLen; - unsigned int *SectionTableAddr; - - // Load base address of Global Section Table - SectionTableAddr = &__data_section_table; - - // Copy the data sections from flash to SRAM. - while (SectionTableAddr < &__data_section_table_end) { - LoadAddr = *SectionTableAddr++; - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - data_init(LoadAddr, ExeAddr, SectionLen); - } - // At this point, SectionTableAddr = &__bss_section_table; - // Zero fill the bss segment - while (SectionTableAddr < &__bss_section_table_end) { - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - bss_init(ExeAddr, SectionLen); - } - -#if !defined (__USE_LPCOPEN) -// LPCOpen init code deals with FP and VTOR initialisation -#if defined (__VFP_FP__) && !defined (__SOFTFP__) - /* - * Code to enable the Cortex-M4 FPU only included - * if appropriate build options have been selected. - * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C) - */ - // CPACR is located at address 0xE000ED88 - asm("LDR.W R0, =0xE000ED88"); - // Read CPACR - asm("LDR R1, [R0]"); - // Set bits 20-23 to enable CP10 and CP11 coprocessors - asm(" ORR R1, R1, #(0xF << 20)"); - // Write back the modified value to the CPACR - asm("STR R1, [R0]"); -#endif // (__VFP_FP__) && !(__SOFTFP__) - // ****************************** - // Check to see if we are running the code from a non-zero - // address (eg RAM, external flash), in which case we need - // to modify the VTOR register to tell the CPU that the - // vector table is located at a non-0x0 address. - - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08; - if ((unsigned int *) g_pfnVectors != (unsigned int *) 0x00000000) { - // CMSIS : SCB->VTOR =
- *pSCB_VTOR = (unsigned int) g_pfnVectors; - } -#endif - -#if defined (__USE_CMSIS) - SystemInit(); -#endif - -#if defined (__cplusplus) - // - // Call C++ library initialisation - // - __libc_init_array(); -#endif - -#if defined (__REDLIB__) - // Call the Redlib library, which in turn calls main() - __main(); -#else - main(); -#endif - - // - // main() shouldn't return, but if it does, we'll just enter an infinite loop - // - while (1) { - ; - } -} - -//***************************************************************************** -// Default exception handlers. Override the ones here by defining your own -// handler routines in your application code. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void NMI_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void HardFault_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void MemManage_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void BusFault_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void UsageFault_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void SVC_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void DebugMon_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void PendSV_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void SysTick_Handler(void) { - while (1) { - } -} - -//***************************************************************************** -// -// Processor ends up here if an unexpected interrupt occurs or a specific -// handler is not present in the application code. -// -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void IntDefaultHandler(void) { - while (1) { - } -} - - - - - - diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index af398fc59..80ee7201b 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -12,22 +12,22 @@ CFLAGS += \ # startup.c and lpc_types.h cause following errors CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes -MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11uxx +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11uxx/lpc_chip_11uxx # All source paths should be relative to the top level. LD_FILE = hw/bsp/lpcxpresso11u37/lpc11u37.ld SRC_C += \ - $(MCU_DIR)/cr_startup_lpc11xx.c \ - $(MCU_DIR)/lpc_chip_11uxx/src/chip_11xx.c \ - $(MCU_DIR)/lpc_chip_11uxx/src/clock_11xx.c \ - $(MCU_DIR)/lpc_chip_11uxx/src/gpio_11xx_1.c \ - $(MCU_DIR)/lpc_chip_11uxx/src/iocon_11xx.c \ - $(MCU_DIR)/lpc_chip_11uxx/src/sysctl_11xx.c \ - $(MCU_DIR)/lpc_chip_11uxx/src/sysinit_11xx.c + $(MCU_DIR)/../cr_startup_lpc11xx.c \ + $(MCU_DIR)/src/chip_11xx.c \ + $(MCU_DIR)/src/clock_11xx.c \ + $(MCU_DIR)/src/gpio_11xx_1.c \ + $(MCU_DIR)/src/iocon_11xx.c \ + $(MCU_DIR)/src/sysctl_11xx.c \ + $(MCU_DIR)/src/sysinit_11xx.c INC += \ - $(TOP)/$(MCU_DIR)/lpc_chip_11uxx/inc + $(TOP)/$(MCU_DIR)/inc # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index 1ae34fedd..e92c7da15 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -10,22 +10,22 @@ CFLAGS += \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' -MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11u6x +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11u6x/lpc_chip_11u6x # All source paths should be relative to the top level. LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld SRC_C += \ - $(MCU_DIR)/cr_startup_lpc11u6x.c \ - $(MCU_DIR)/lpc_chip_11u6x/src/chip_11u6x.c \ - $(MCU_DIR)/lpc_chip_11u6x/src/clock_11u6x.c \ - $(MCU_DIR)/lpc_chip_11u6x/src/gpio_11u6x.c \ - $(MCU_DIR)/lpc_chip_11u6x/src/iocon_11u6x.c \ - $(MCU_DIR)/lpc_chip_11u6x/src/syscon_11u6x.c \ - $(MCU_DIR)/lpc_chip_11u6x/src/sysinit_11u6x.c + $(MCU_DIR)/../cr_startup_lpc11u6x.c \ + $(MCU_DIR)/src/chip_11u6x.c \ + $(MCU_DIR)/src/clock_11u6x.c \ + $(MCU_DIR)/src/gpio_11u6x.c \ + $(MCU_DIR)/src/iocon_11u6x.c \ + $(MCU_DIR)/src/syscon_11u6x.c \ + $(MCU_DIR)/src/sysinit_11u6x.c INC += \ - $(TOP)/$(MCU_DIR)/lpc_chip_11u6x/inc + $(TOP)/$(MCU_DIR)/inc # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk index 03bdf145d..b0c537687 100644 --- a/hw/bsp/lpcxpresso1769/board.mk +++ b/hw/bsp/lpcxpresso1769/board.mk @@ -11,26 +11,26 @@ CFLAGS += \ # lpc_types.h cause following errors CFLAGS += -Wno-error=strict-prototypes +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x/lpc_chip_175x_6x + # All source paths should be relative to the top level. LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld -MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x - # TODO remove later SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - $(MCU_DIR)/cr_startup_lpc175x_6x.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/chip_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/clock_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/gpio_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/iocon_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/uart_17xx_40xx.c + $(MCU_DIR)/../cr_startup_lpc175x_6x.c \ + $(MCU_DIR)/src/chip_17xx_40xx.c \ + $(MCU_DIR)/src/clock_17xx_40xx.c \ + $(MCU_DIR)/src/gpio_17xx_40xx.c \ + $(MCU_DIR)/src/iocon_17xx_40xx.c \ + $(MCU_DIR)/src/sysctl_17xx_40xx.c \ + $(MCU_DIR)/src/sysinit_17xx_40xx.c \ + $(MCU_DIR)/src/uart_17xx_40xx.c INC += \ - $(TOP)/$(MCU_DIR)/lpc_chip_175x_6x/inc + $(TOP)/$(MCU_DIR)/inc # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk index 8eac31b71..0270f3b30 100644 --- a/hw/bsp/mbed1768/board.mk +++ b/hw/bsp/mbed1768/board.mk @@ -11,26 +11,26 @@ CFLAGS += \ # startup.c and lpc_types.h cause following errors CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x/lpc_chip_175x_6x + # All source paths should be relative to the top level. LD_FILE = hw/bsp/mbed1768/lpc1768.ld -MCU_DIR = hw/mcu/nxp/lpc_driver/lpc175x_6x - # TODO remove later SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - $(MCU_DIR)/cr_startup_lpc175x_6x.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/chip_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/clock_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/gpio_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/iocon_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c \ - $(MCU_DIR)/lpc_chip_175x_6x/src/uart_17xx_40xx.c + $(MCU_DIR)/../cr_startup_lpc175x_6x.c \ + $(MCU_DIR)/src/chip_17xx_40xx.c \ + $(MCU_DIR)/src/clock_17xx_40xx.c \ + $(MCU_DIR)/src/gpio_17xx_40xx.c \ + $(MCU_DIR)/src/iocon_17xx_40xx.c \ + $(MCU_DIR)/src/sysctl_17xx_40xx.c \ + $(MCU_DIR)/src/sysinit_17xx_40xx.c \ + $(MCU_DIR)/src/uart_17xx_40xx.c INC += \ - $(TOP)/$(MCU_DIR)/lpc_chip_175x_6x/inc + $(TOP)/$(MCU_DIR)/inc # For TinyUSB port source VENDOR = nxp diff --git a/hw/mcu/nxp/lpc_driver b/hw/mcu/nxp/lpc_driver index 83dc833bf..e25173760 160000 --- a/hw/mcu/nxp/lpc_driver +++ b/hw/mcu/nxp/lpc_driver @@ -1 +1 @@ -Subproject commit 83dc833bfb0972b1df1bbf271f3a9e574d5f2876 +Subproject commit e2517376005feacdfe0cdd9bc8db9f4200be5421 From 4f4182e171a506615fa152e87510d19996d4b5b2 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 12:39:58 +0700 Subject: [PATCH 03/35] clean up lpc makefile --- hw/bsp/ea4088qs/board.mk | 19 +- hw/bsp/ea4088qs/cr_startup_lpc40xx.c | 418 ------------------ hw/bsp/ea4357/board.mk | 2 +- hw/bsp/lpcxpresso11u37/board.mk | 2 +- hw/bsp/lpcxpresso11u68/board.mk | 2 +- hw/bsp/lpcxpresso1347/board.mk | 17 +- hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c | 473 -------------------- hw/bsp/lpcxpresso1769/board.mk | 2 +- hw/bsp/mbed1768/board.mk | 2 +- hw/bsp/mcb1800/board.mk | 17 +- hw/bsp/mcb1800/cr_startup_lpc18xx.c | 477 --------------------- hw/mcu/nxp/lpc_driver | 2 +- 12 files changed, 37 insertions(+), 1396 deletions(-) delete mode 100644 hw/bsp/ea4088qs/cr_startup_lpc40xx.c delete mode 100644 hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c delete mode 100644 hw/bsp/mcb1800/cr_startup_lpc18xx.c diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk index d56c98747..510e2912b 100644 --- a/hw/bsp/ea4088qs/board.mk +++ b/hw/bsp/ea4088qs/board.mk @@ -11,6 +11,8 @@ CFLAGS += \ # lpc_types.h cause following errors CFLAGS += -Wno-error=strict-prototypes +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc40xx/lpc_chip_40xx + # All source paths should be relative to the top level. LD_FILE = hw/bsp/ea4088qs/lpc4088.ld @@ -18,16 +20,17 @@ LD_FILE = hw/bsp/ea4088qs/lpc4088.ld SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/chip_17xx_40xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/clock_17xx_40xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/gpio_17xx_40xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/iocon_17xx_40xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/sysctl_17xx_40xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/sysinit_17xx_40xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_40xx/src/uart_17xx_40xx.c + $(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \ + $(MCU_DIR)/src/chip_17xx_40xx.c \ + $(MCU_DIR)/src/clock_17xx_40xx.c \ + $(MCU_DIR)/src/gpio_17xx_40xx.c \ + $(MCU_DIR)/src/iocon_17xx_40xx.c \ + $(MCU_DIR)/src/sysctl_17xx_40xx.c \ + $(MCU_DIR)/src/sysinit_17xx_40xx.c \ + $(MCU_DIR)/src/uart_17xx_40xx.c INC += \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_40xx/inc + $(TOP)/$(MCU_DIR)/inc # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/ea4088qs/cr_startup_lpc40xx.c b/hw/bsp/ea4088qs/cr_startup_lpc40xx.c deleted file mode 100644 index 6bd3d99a9..000000000 --- a/hw/bsp/ea4088qs/cr_startup_lpc40xx.c +++ /dev/null @@ -1,418 +0,0 @@ -//***************************************************************************** -// LPC407x_8x Microcontroller Startup code for use with LPCXpresso IDE -// -// Version : 140114 -//***************************************************************************** -// -// Copyright(C) NXP Semiconductors, 2014 -// All rights reserved. -// -// Software that is described herein is for illustrative purposes only -// which provides customers with programming information regarding the -// LPC products. This software is supplied "AS IS" without any warranties of -// any kind, and NXP Semiconductors and its licensor disclaim any and -// all warranties, express or implied, including all implied warranties of -// merchantability, fitness for a particular purpose and non-infringement of -// intellectual property rights. NXP Semiconductors assumes no responsibility -// or liability for the use of the software, conveys no license or rights under any -// patent, copyright, mask work right, or any other intellectual property rights in -// or to any products. NXP Semiconductors reserves the right to make changes -// in the software without notification. NXP Semiconductors also makes no -// representation or warranty that such application will be suitable for the -// specified use without further testing or modification. -// -// Permission to use, copy, modify, and distribute this software and its -// documentation is hereby granted, under NXP Semiconductors' and its -// licensor's relevant copyrights in the software, without fee, provided that it -// is used in conjunction with NXP Semiconductors microcontrollers. This -// copyright, permission, and disclaimer notice must appear in all copies of -// this code. -//***************************************************************************** -#if defined (__cplusplus) -#ifdef __REDLIB__ -#error Redlib does not support C++ -#else -//***************************************************************************** -// -// The entry point for the C++ library startup -// -//***************************************************************************** -extern "C" { - extern void __libc_init_array(void); -} -#endif -#endif - -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) - -//***************************************************************************** -#if defined (__cplusplus) -extern "C" { -#endif - -//***************************************************************************** -#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) -// Declaration of external SystemInit function -extern void SystemInit(void); -#endif - -//***************************************************************************** -// -// Forward declaration of the default handlers. These are aliased. -// When the application defines a handler (with the same name), this will -// automatically take precedence over these weak definitions -// -//***************************************************************************** - void ResetISR(void); -WEAK void NMI_Handler(void); -WEAK void HardFault_Handler(void); -WEAK void MemManage_Handler(void); -WEAK void BusFault_Handler(void); -WEAK void UsageFault_Handler(void); -WEAK void SVC_Handler(void); -WEAK void DebugMon_Handler(void); -WEAK void PendSV_Handler(void); -WEAK void SysTick_Handler(void); -WEAK void IntDefaultHandler(void); - -//***************************************************************************** -// -// Forward declaration of the specific IRQ handlers. These are aliased -// to the IntDefaultHandler, which is a 'forever' loop. When the application -// defines a handler (with the same name), this will automatically take -// precedence over these weak definitions -// -//***************************************************************************** -void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART3_IRQHandler(void) ALIAS(IntDefaultHandler); -void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler); -void SPI_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler); -void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler); -void RTC_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler); -void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC_IRQHandler(void) ALIAS(IntDefaultHandler); -void BOD_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN_IRQHandler(void) ALIAS(IntDefaultHandler); -void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S_IRQHandler(void) ALIAS(IntDefaultHandler); -#if defined (__USE_LPCOPEN) -void ETH_IRQHandler(void) ALIAS(IntDefaultHandler); -#else -void ENET_IRQHandler(void) ALIAS(IntDefaultHandler); -#endif -void RIT_IRQHandler(void) ALIAS(IntDefaultHandler); -void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler); -void QEI_IRQHandler(void) ALIAS(IntDefaultHandler); -void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler); -void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler); -void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler); -#if defined (__USE_LPCOPEN) -void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler); -#else -void MCI_IRQHandler(void) ALIAS(IntDefaultHandler); -#endif -void UART4_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP2_IRQHandler(void) ALIAS(IntDefaultHandler); -void LCD_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void PWM0_IRQHandler(void) ALIAS(IntDefaultHandler); -void EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler); - -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for Redlib based applications -// main() is the entry point for Newlib based applications -// -//***************************************************************************** -#if defined (__REDLIB__) -extern void __main(void); -#endif -extern int main(void); -//***************************************************************************** -// -// External declaration for the pointer to the stack top from the Linker Script -// -//***************************************************************************** -extern void _vStackTop(void); - -//***************************************************************************** -#if defined (__cplusplus) -} // extern "C" -#endif -//***************************************************************************** -// -// The vector table. -// This relies on the linker script to place at correct location in memory. -// -//***************************************************************************** -extern void (* const g_pfnVectors[])(void); -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = { - // Core Level - CM4 - &_vStackTop, // The initial stack pointer - ResetISR, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - - // Chip Level - LPC40xx - WDT_IRQHandler, // 16, 0x40 - WDT - TIMER0_IRQHandler, // 17, 0x44 - TIMER0 - TIMER1_IRQHandler, // 18, 0x48 - TIMER1 - TIMER2_IRQHandler, // 19, 0x4c - TIMER2 - TIMER3_IRQHandler, // 20, 0x50 - TIMER3 - UART0_IRQHandler, // 21, 0x54 - UART0 - UART1_IRQHandler, // 22, 0x58 - UART1 - UART2_IRQHandler, // 23, 0x5c - UART2 - UART3_IRQHandler, // 24, 0x60 - UART3 - PWM1_IRQHandler, // 25, 0x64 - PWM1 - I2C0_IRQHandler, // 26, 0x68 - I2C0 - I2C1_IRQHandler, // 27, 0x6c - I2C1 - I2C2_IRQHandler, // 28, 0x70 - I2C2 - IntDefaultHandler, // 29, Not used - SSP0_IRQHandler, // 30, 0x78 - SSP0 - SSP1_IRQHandler, // 31, 0x7c - SSP1 - PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL) - RTC_IRQHandler, // 33, 0x84 - RTC - EINT0_IRQHandler, // 34, 0x88 - EINT0 - EINT1_IRQHandler, // 35, 0x8c - EINT1 - EINT2_IRQHandler, // 36, 0x90 - EINT2 - EINT3_IRQHandler, // 37, 0x94 - EINT3 - ADC_IRQHandler, // 38, 0x98 - ADC - BOD_IRQHandler, // 39, 0x9c - BOD - USB_IRQHandler, // 40, 0xA0 - USB - CAN_IRQHandler, // 41, 0xa4 - CAN - DMA_IRQHandler, // 42, 0xa8 - GP DMA - I2S_IRQHandler, // 43, 0xac - I2S -#if defined (__USE_LPCOPEN) - ETH_IRQHandler, // 44, 0xb0 - Ethernet - SDIO_IRQHandler, // 45, 0xb4 - SD/MMC card I/F -#else - ENET_IRQHandler, // 44, 0xb0 - Ethernet - MCI_IRQHandler, // 45, 0xb4 - SD/MMC card I/F -#endif - MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM - QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder - PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL) - USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup - CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup - UART4_IRQHandler, // 51, 0xcc - UART4 - SSP2_IRQHandler, // 52, 0xd0 - SSP2 - LCD_IRQHandler, // 53, 0xd4 - LCD - GPIO_IRQHandler, // 54, 0xd8 - GPIO - PWM0_IRQHandler, // 55, 0xdc - PWM0 - EEPROM_IRQHandler, // 56, 0xe0 - EEPROM - -}; - -//***************************************************************************** -// Functions to carry out the initialization of RW and BSS data sections. These -// are written as separate functions rather than being inlined within the -// ResetISR() function in order to cope with MCUs with multiple banks of -// memory. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void data_init(unsigned int romstart, unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int *pulSrc = (unsigned int*) romstart; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = *pulSrc++; -} - -__attribute__ ((section(".after_vectors"))) -void bss_init(unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = 0; -} - -//***************************************************************************** -// The following symbols are constructs generated by the linker, indicating -// the location of various points in the "Global Section Table". This table is -// created by the linker via the Code Red managed linker script mechanism. It -// contains the load address, execution address and length of each RW data -// section and the execution and length of each BSS (zero initialized) section. -//***************************************************************************** -extern unsigned int __data_section_table; -extern unsigned int __data_section_table_end; -extern unsigned int __bss_section_table; -extern unsigned int __bss_section_table_end; - -//***************************************************************************** -// Reset entry point for your code. -// Sets up a simple runtime environment and initializes the C/C++ -// library. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void -ResetISR(void) { - - // - // Copy the data sections from flash to SRAM. - // - unsigned int LoadAddr, ExeAddr, SectionLen; - unsigned int *SectionTableAddr; - - // Load base address of Global Section Table - SectionTableAddr = &__data_section_table; - - // Copy the data sections from flash to SRAM. - while (SectionTableAddr < &__data_section_table_end) { - LoadAddr = *SectionTableAddr++; - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - data_init(LoadAddr, ExeAddr, SectionLen); - } - // At this point, SectionTableAddr = &__bss_section_table; - // Zero fill the bss segment - while (SectionTableAddr < &__bss_section_table_end) { - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - bss_init(ExeAddr, SectionLen); - } - -#if defined (__VFP_FP__) && !defined (__SOFTFP__) -/* - * Code to enable the Cortex-M4 FPU only included - * if appropriate build options have been selected. - * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C) - */ - // Read CPACR (located at address 0xE000ED88) - // Set bits 20-23 to enable CP10 and CP11 coprocessors - // Write back the modified value to the CPACR - asm volatile ("LDR.W R0, =0xE000ED88\n\t" - "LDR R1, [R0]\n\t" - "ORR R1, R1, #(0xF << 20)\n\t" - "STR R1, [R0]"); -#endif // (__VFP_FP__) && !(__SOFTFP__) - - // Check to see if we are running the code from a non-zero - // address (eg RAM, external flash), in which case we need - // to modify the VTOR register to tell the CPU that the - // vector table is located at a non-0x0 address. - - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08; - if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) { - // CMSIS : SCB->VTOR =
- *pSCB_VTOR = (unsigned int)g_pfnVectors; - } - -#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) - SystemInit(); -#endif - -#if defined (__cplusplus) - // - // Call C++ library initialisation - // - __libc_init_array(); -#endif - -#if defined (__REDLIB__) - // Call the Redlib library, which in turn calls main() - __main() ; -#else - main(); -#endif - - // - // main() shouldn't return, but if it does, we'll just enter an infinite loop - // - while (1) { - ; - } -} - -//***************************************************************************** -// Default exception handlers. Override the ones here by defining your own -// handler routines in your application code. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void NMI_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void HardFault_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void MemManage_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void BusFault_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void UsageFault_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void SVC_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void DebugMon_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void PendSV_Handler(void) -{ while(1) {} -} - -__attribute__ ((section(".after_vectors"))) -void SysTick_Handler(void) -{ while(1) {} -} - -//***************************************************************************** -// -// Processor ends up here if an unexpected interrupt occurs or a specific -// handler is not present in the application code. -// -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void IntDefaultHandler(void) -{ while(1) {} -} diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk index 1af33c15d..265d9b38b 100644 --- a/hw/bsp/ea4357/board.mk +++ b/hw/bsp/ea4357/board.mk @@ -19,7 +19,7 @@ LD_FILE = hw/bsp/ea4357/lpc4357.ld SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - $(MCU_DIR)/../cr_startup_lpc43xx.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \ $(MCU_DIR)/src/chip_18xx_43xx.c \ $(MCU_DIR)/src/clock_18xx_43xx.c \ $(MCU_DIR)/src/gpio_18xx_43xx.c \ diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index 80ee7201b..2a7a9f74a 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -18,7 +18,7 @@ MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11uxx/lpc_chip_11uxx LD_FILE = hw/bsp/lpcxpresso11u37/lpc11u37.ld SRC_C += \ - $(MCU_DIR)/../cr_startup_lpc11xx.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \ $(MCU_DIR)/src/chip_11xx.c \ $(MCU_DIR)/src/clock_11xx.c \ $(MCU_DIR)/src/gpio_11xx_1.c \ diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk index e92c7da15..9396a599a 100644 --- a/hw/bsp/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpcxpresso11u68/board.mk @@ -16,7 +16,7 @@ MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11u6x/lpc_chip_11u6x LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld SRC_C += \ - $(MCU_DIR)/../cr_startup_lpc11u6x.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \ $(MCU_DIR)/src/chip_11u6x.c \ $(MCU_DIR)/src/clock_11u6x.c \ $(MCU_DIR)/src/gpio_11u6x.c \ diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index a64120225..edae27c61 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -12,19 +12,22 @@ CFLAGS += \ # startup.c and lpc_types.h cause following errors CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc13xx/lpc_chip_13xx + # All source paths should be relative to the top level. LD_FILE = hw/bsp/lpcxpresso1347/lpc1347.ld SRC_C += \ - hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/chip_13xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/clock_13xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/gpio_13xx_1.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/iocon_13xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/sysctl_13xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_13xx/src/sysinit_13xx.c + $(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \ + $(MCU_DIR)/src/chip_13xx.c \ + $(MCU_DIR)/src/clock_13xx.c \ + $(MCU_DIR)/src/gpio_13xx_1.c \ + $(MCU_DIR)/src/iocon_13xx.c \ + $(MCU_DIR)/src/sysctl_13xx.c \ + $(MCU_DIR)/src/sysinit_13xx.c INC += \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_13xx/inc + $(TOP)/$(MCU_DIR)/inc # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c b/hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c deleted file mode 100644 index 7768aa80e..000000000 --- a/hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c +++ /dev/null @@ -1,473 +0,0 @@ -//***************************************************************************** -// +--+ -// | ++----+ -// +-++ | -// | | -// +-+--+ | -// | +--+--+ -// +----+ Copyright (c) 2011-12 Code Red Technologies Ltd. -// -// Microcontroller Startup code for use with Red Suite -// -// Version : 120126 -// -// Software License Agreement -// -// The software is owned by Code Red Technologies and/or its suppliers, and is -// protected under applicable copyright laws. All rights are reserved. Any -// use in violation of the foregoing restrictions may subject the user to criminal -// sanctions under applicable laws, as well as to civil liability for the breach -// of the terms and conditions of this license. -// -// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT -// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH -// CODE RED TECHNOLOGIES LTD. -// -//***************************************************************************** -#if defined (__cplusplus) -#ifdef __REDLIB__ -#error Redlib does not support C++ -#else -//***************************************************************************** -// -// The entry point for the C++ library startup -// -//***************************************************************************** -extern "C" { - extern void __libc_init_array(void); -} -#endif -#endif - -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) -/* Include sys_config.h to get the CHIP_11* device identifier */ -#include "sys_config.h" - -// Code Red - if CMSIS is being used, then SystemInit() routine -// will be called by startup code rather than in application's main() -extern void SystemInit(void); - -//***************************************************************************** -#if defined (__cplusplus) -extern "C" { -#endif - -//***************************************************************************** -// -// Forward declaration of the default handlers. These are aliased. -// When the application defines a handler (with the same name), this will -// automatically take precedence over these weak definitions -// -//***************************************************************************** -void ResetISR(void); -WEAK void NMI_Handler(void); -WEAK void HardFault_Handler(void); -WEAK void SVC_Handler(void); -WEAK void PendSV_Handler(void); -WEAK void SysTick_Handler(void); -WEAK void IntDefaultHandler(void); - -//***************************************************************************** -// -// Forward declaration of the specific IRQ handlers. These are aliased -// to the IntDefaultHandler, which is a 'forever' loop. When the application -// defines a handler (with the same name), this will automatically take -// precedence over these weak definitions -// -//***************************************************************************** - -#if defined(CHIP_LPC1343) -void WAKEUP_IRQHandler (void) ALIAS(IntDefaultHandler); -void I2C_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler); -void UART_IRQHandler (void) ALIAS(IntDefaultHandler); -void USB_IRQHandler (void) ALIAS(IntDefaultHandler); -void USB_FIQHandler (void) ALIAS(IntDefaultHandler); -void ADC_IRQHandler (void) ALIAS(IntDefaultHandler); -void WDT_IRQHandler (void) ALIAS(IntDefaultHandler); -void BOD_IRQHandler (void) ALIAS(IntDefaultHandler); -void FMC_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIOINT3_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIOINT2_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIOINT1_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIOINT0_IRQHandler (void) ALIAS(IntDefaultHandler); - -#elif defined(CHIP_LPC1347) -void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler); -void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler); -void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler); -void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler); -void RIT_IRQHandler (void) ALIAS(IntDefaultHandler); -void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler); -void I2C_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler); -void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler); -void UART_IRQHandler (void) ALIAS(IntDefaultHandler); -void USB_IRQHandler (void) ALIAS(IntDefaultHandler); -void USB_FIQHandler (void) ALIAS(IntDefaultHandler); -void ADC_IRQHandler (void) ALIAS(IntDefaultHandler); -void WDT_IRQHandler (void) ALIAS(IntDefaultHandler); -void BOD_IRQHandler (void) ALIAS(IntDefaultHandler); -void FMC_IRQHandler (void) ALIAS(IntDefaultHandler); -void OSCFAIL_IRQHandler (void) ALIAS(IntDefaultHandler); -void PVTCIRCUIT_IRQHandler (void) ALIAS(IntDefaultHandler); -void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler); - -#else -#error No CHIP_134* device defined -#endif - -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for redlib based applications -// main() is the entry point for newlib based applications -// -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for Redlib based applications -// main() is the entry point for Newlib based applications -// -//***************************************************************************** -#if defined (__REDLIB__) -extern void __main(void); -#endif -extern int main(void); -//***************************************************************************** -// -// External declaration for the pointer to the stack top from the Linker Script -// -//***************************************************************************** -extern void _vStackTop(void); - -//***************************************************************************** -#if defined (__cplusplus) -} // extern "C" -#endif - -//***************************************************************************** -// -// The vector table. Note that the proper constructs must be placed on this to -// ensure that it ends up at physical address 0x0000.0000. -// -//***************************************************************************** -extern void (* const g_pfnVectors[])(void); -__attribute__ ((section(".isr_vector"))) __attribute__ ((used)) -void (* const g_pfnVectors[])(void) = { - &_vStackTop, // The initial stack pointer - ResetISR, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - 0, // Reserved - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - -#if defined(CHIP_LPC1343) - WAKEUP_IRQHandler, // Wakeup PIO0.0 - WAKEUP_IRQHandler, // Wakeup PIO0.1 - WAKEUP_IRQHandler, // Wakeup PIO0.2 - WAKEUP_IRQHandler, // Wakeup PIO0.3 - WAKEUP_IRQHandler, // Wakeup PIO0.4 - WAKEUP_IRQHandler, // Wakeup PIO0.5 - WAKEUP_IRQHandler, // Wakeup PIO0.6 - WAKEUP_IRQHandler, // Wakeup PIO0.7 - WAKEUP_IRQHandler, // Wakeup PIO0.8 - WAKEUP_IRQHandler, // Wakeup PIO0.9 - WAKEUP_IRQHandler, // Wakeup PIO0.10 - WAKEUP_IRQHandler, // Wakeup PIO0.11 - WAKEUP_IRQHandler, // Wakeup PIO1.0 - WAKEUP_IRQHandler, // Wakeup PIO1.1 - WAKEUP_IRQHandler, // Wakeup PIO1.2 - WAKEUP_IRQHandler, // Wakeup PIO1.3 - WAKEUP_IRQHandler, // Wakeup PIO1.4 - WAKEUP_IRQHandler, // Wakeup PIO1.5 - WAKEUP_IRQHandler, // Wakeup PIO1.6 - WAKEUP_IRQHandler, // Wakeup PIO1.7 - WAKEUP_IRQHandler, // Wakeup PIO1.8 - WAKEUP_IRQHandler, // Wakeup PIO1.9 - WAKEUP_IRQHandler, // Wakeup PIO1.10 - WAKEUP_IRQHandler, // Wakeup PIO1.11 - WAKEUP_IRQHandler, // Wakeup PIO2.0 - WAKEUP_IRQHandler, // Wakeup PIO2.1 - WAKEUP_IRQHandler, // Wakeup PIO2.2 - WAKEUP_IRQHandler, // Wakeup PIO2.3 - WAKEUP_IRQHandler, // Wakeup PIO2.4 - WAKEUP_IRQHandler, // Wakeup PIO2.5 - WAKEUP_IRQHandler, // Wakeup PIO2.6 - WAKEUP_IRQHandler, // Wakeup PIO2.7 - WAKEUP_IRQHandler, // Wakeup PIO2.8 - WAKEUP_IRQHandler, // Wakeup PIO2.9 - WAKEUP_IRQHandler, // Wakeup PIO2.10 - WAKEUP_IRQHandler, // Wakeup PIO2.11 - WAKEUP_IRQHandler, // Wakeup PIO3.0 - WAKEUP_IRQHandler, // Wakeup PIO3.1 - WAKEUP_IRQHandler, // Wakeup PIO3.2 - WAKEUP_IRQHandler, // Wakeup PIO3.3 - I2C_IRQHandler, // I2C - TIMER16_0_IRQHandler, // 16-bit Counter-Timer 0 - TIMER16_1_IRQHandler, // 16-bit Counter-Timer 1 - TIMER32_0_IRQHandler, // 32-bit Counter-Timer 0 - TIMER32_1_IRQHandler, // 32-bit Counter-Timer 1 - SSP0_IRQHandler, // SSP0 - UART_IRQHandler, // UART - USB_IRQHandler, // USB IRQ - USB_FIQHandler, // USB FIQ - ADC_IRQHandler, // A/D Converter - WDT_IRQHandler, // Watchdog Timer - BOD_IRQHandler, // Brown Out Detect - FMC_IRQHandler, // IP2111 Flash Memory Controller - PIOINT3_IRQHandler, // PIO INT3 - PIOINT2_IRQHandler, // PIO INT2 - PIOINT1_IRQHandler, // PIO INT1 - PIOINT0_IRQHandler, // PIO INT0 - -#elif defined(CHIP_LPC1347) - PIN_INT0_IRQHandler, // All GPIO pin can be routed to PIN_INTx - PIN_INT1_IRQHandler, - PIN_INT2_IRQHandler, - PIN_INT3_IRQHandler, - PIN_INT4_IRQHandler, - PIN_INT5_IRQHandler, - PIN_INT6_IRQHandler, - PIN_INT7_IRQHandler, - GINT0_IRQHandler, - GINT1_IRQHandler, // PIO0 (0:7) - 0, - 0, - RIT_IRQHandler, - 0, - SSP1_IRQHandler, // SSP1 - I2C_IRQHandler, // I2C - TIMER16_0_IRQHandler, // 16-bit Counter-Timer 0 - TIMER16_1_IRQHandler, // 16-bit Counter-Timer 1 - TIMER32_0_IRQHandler, // 32-bit Counter-Timer 0 - TIMER32_1_IRQHandler, // 32-bit Counter-Timer 1 - SSP0_IRQHandler, // SSP0 - UART_IRQHandler, // UART - USB_IRQHandler, // USB IRQ - USB_FIQHandler, // USB FIQ - ADC_IRQHandler, // A/D Converter - WDT_IRQHandler, // Watchdog Timer - BOD_IRQHandler, // Brown Out Detect - FMC_IRQHandler, // IP2111 Flash Memory Controller - OSCFAIL_IRQHandler, // OSC FAIL - PVTCIRCUIT_IRQHandler, // PVT CIRCUIT - USBWakeup_IRQHandler, // USB wake up - 0, - -#else -#error No CHIP_13* device defined -#endif -}; - -//***************************************************************************** -// Functions to carry out the initialization of RW and BSS data sections. These -// are written as separate functions rather than being inlined within the -// ResetISR() function in order to cope with MCUs with multiple banks of -// memory. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void data_init(unsigned int romstart, unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int *pulSrc = (unsigned int*) romstart; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = *pulSrc++; -} - -__attribute__ ((section(".after_vectors"))) -void bss_init(unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = 0; -} - -#ifndef USE_OLD_STYLE_DATA_BSS_INIT -//***************************************************************************** -// The following symbols are constructs generated by the linker, indicating -// the location of various points in the "Global Section Table". This table is -// created by the linker via the Code Red managed linker script mechanism. It -// contains the load address, execution address and length of each RW data -// section and the execution and length of each BSS (zero initialized) section. -//***************************************************************************** -extern unsigned int __data_section_table; -extern unsigned int __data_section_table_end; -extern unsigned int __bss_section_table; -extern unsigned int __bss_section_table_end; -#else -//***************************************************************************** -// The following symbols are constructs generated by the linker, indicating -// the load address, execution address and length of the RW data section and -// the execution and length of the BSS (zero initialized) section. -// Note that these symbols are not normally used by the managed linker script -// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux). -// They are provide here simply so this startup code can be used with earlier -// versions of Red Suite which do not support the more advanced managed linker -// script mechanism introduced in the above version. To enable their use, -// define "USE_OLD_STYLE_DATA_BSS_INIT". -//***************************************************************************** -extern unsigned int _etext; -extern unsigned int _data; -extern unsigned int _edata; -extern unsigned int _bss; -extern unsigned int _ebss; -#endif - - -//***************************************************************************** -// Reset entry point for your code. -// Sets up a simple runtime environment and initializes the C/C++ -// library. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void -ResetISR(void) { - -#ifndef USE_OLD_STYLE_DATA_BSS_INIT - // - // Copy the data sections from flash to SRAM. - // - unsigned int LoadAddr, ExeAddr, SectionLen; - unsigned int *SectionTableAddr; - - // Load base address of Global Section Table - SectionTableAddr = &__data_section_table; - - // Copy the data sections from flash to SRAM. - while (SectionTableAddr < &__data_section_table_end) { - LoadAddr = *SectionTableAddr++; - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - data_init(LoadAddr, ExeAddr, SectionLen); - } - // At this point, SectionTableAddr = &__bss_section_table; - // Zero fill the bss segment - while (SectionTableAddr < &__bss_section_table_end) { - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - bss_init(ExeAddr, SectionLen); - } -#else - // Use Old Style Data and BSS section initialization. - // This will only initialize a single RAM bank. - unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen; - - // Copy the data segment from flash to SRAM. - LoadAddr = &_etext; - ExeAddr = &_data; - EndAddr = &_edata; - SectionLen = (void*)EndAddr - (void*)ExeAddr; - data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen); - // Zero fill the bss segment - ExeAddr = &_bss; - EndAddr = &_ebss; - SectionLen = (void*)EndAddr - (void*)ExeAddr; - bss_init ((unsigned int)ExeAddr, SectionLen); -#endif - - extern void SystemInit(void); - SystemInit(); - -#if defined (__cplusplus) - // - // Call C++ library initialisation - // - __libc_init_array(); -#endif - -#if defined (__REDLIB__) - // Call the Redlib library, which in turn calls main() - __main() ; -#else - main(); -#endif - // - // main() shouldn't return, but if it does, we'll just enter an infinite loop - // - while (1) { - ; - } -} - -//***************************************************************************** -// Default exception handlers. Override the ones here by defining your own -// handler routines in your application code. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void NMI_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void HardFault_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void SVC_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void PendSV_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void SysTick_Handler(void) -{ - while(1) - { - } -} - -//***************************************************************************** -// -// Processor ends up here if an unexpected interrupt occurs or a specific -// handler is not present in the application code. -// -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void IntDefaultHandler(void) -{ - while(1) - { - } -} - diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk index b0c537687..8bbc89138 100644 --- a/hw/bsp/lpcxpresso1769/board.mk +++ b/hw/bsp/lpcxpresso1769/board.mk @@ -20,7 +20,7 @@ LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - $(MCU_DIR)/../cr_startup_lpc175x_6x.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \ $(MCU_DIR)/src/chip_17xx_40xx.c \ $(MCU_DIR)/src/clock_17xx_40xx.c \ $(MCU_DIR)/src/gpio_17xx_40xx.c \ diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk index 0270f3b30..4e4cd1d8f 100644 --- a/hw/bsp/mbed1768/board.mk +++ b/hw/bsp/mbed1768/board.mk @@ -20,7 +20,7 @@ LD_FILE = hw/bsp/mbed1768/lpc1768.ld SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - $(MCU_DIR)/../cr_startup_lpc175x_6x.c \ + $(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \ $(MCU_DIR)/src/chip_17xx_40xx.c \ $(MCU_DIR)/src/clock_17xx_40xx.c \ $(MCU_DIR)/src/gpio_17xx_40xx.c \ diff --git a/hw/bsp/mcb1800/board.mk b/hw/bsp/mcb1800/board.mk index bd4a61e0d..4a59c043a 100644 --- a/hw/bsp/mcb1800/board.mk +++ b/hw/bsp/mcb1800/board.mk @@ -10,6 +10,8 @@ CFLAGS += \ # lpc_types.h cause following errors CFLAGS += -Wno-error=strict-prototypes +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc18xx/lpc_chip_18xx + # All source paths should be relative to the top level. LD_FILE = hw/bsp/mcb1800/lpc1857.ld @@ -17,15 +19,16 @@ LD_FILE = hw/bsp/mcb1800/lpc1857.ld SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c SRC_C += \ - hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/chip_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/clock_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/gpio_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/sysinit_18xx_43xx.c \ - hw/mcu/nxp/lpc_driver/lpc_chip_18xx/src/uart_18xx_43xx.c + $(MCU_DIR)/../gcc/cr_startup_lpc18xx.c \ + $(MCU_DIR)/src/chip_18xx_43xx.c \ + $(MCU_DIR)/src/clock_18xx_43xx.c \ + $(MCU_DIR)/src/gpio_18xx_43xx.c \ + $(MCU_DIR)/src/sysinit_18xx_43xx.c \ + $(MCU_DIR)/src/uart_18xx_43xx.c INC += \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_18xx/inc \ - $(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_18xx/inc/config_18xx + $(TOP)/$(MCU_DIR)/inc \ + $(TOP)/$(MCU_DIR)/inc/config_18xx # For TinyUSB port source VENDOR = nxp diff --git a/hw/bsp/mcb1800/cr_startup_lpc18xx.c b/hw/bsp/mcb1800/cr_startup_lpc18xx.c deleted file mode 100644 index 0962b111c..000000000 --- a/hw/bsp/mcb1800/cr_startup_lpc18xx.c +++ /dev/null @@ -1,477 +0,0 @@ -//***************************************************************************** -// LPC18xx Microcontroller Startup code for use with LPCXpresso IDE -// -// Version : 150706 -//***************************************************************************** -// -// Copyright(C) NXP Semiconductors, 2013-2015 -// All rights reserved. -// -// Software that is described herein is for illustrative purposes only -// which provides customers with programming information regarding the -// LPC products. This software is supplied "AS IS" without any warranties of -// any kind, and NXP Semiconductors and its licensor disclaim any and -// all warranties, express or implied, including all implied warranties of -// merchantability, fitness for a particular purpose and non-infringement of -// intellectual property rights. NXP Semiconductors assumes no responsibility -// or liability for the use of the software, conveys no license or rights under any -// patent, copyright, mask work right, or any other intellectual property rights in -// or to any products. NXP Semiconductors reserves the right to make changes -// in the software without notification. NXP Semiconductors also makes no -// representation or warranty that such application will be suitable for the -// specified use without further testing or modification. -// -// Permission to use, copy, modify, and distribute this software and its -// documentation is hereby granted, under NXP Semiconductors' and its -// licensor's relevant copyrights in the software, without fee, provided that it -// is used in conjunction with NXP Semiconductors microcontrollers. This -// copyright, permission, and disclaimer notice must appear in all copies of -// this code. -//***************************************************************************** - -#if defined (__cplusplus) -#ifdef __REDLIB__ -#error Redlib does not support C++ -#else -//***************************************************************************** -// -// The entry point for the C++ library startup -// -//***************************************************************************** -extern "C" { - extern void __libc_init_array(void); -} -#endif -#endif - -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) - -//***************************************************************************** -#if defined (__cplusplus) -extern "C" { -#endif - -//***************************************************************************** -#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) -// Declaration of external SystemInit function -extern void SystemInit(void); -#endif - -//***************************************************************************** -// -// Forward declaration of the default handlers. These are aliased. -// When the application defines a handler (with the same name), this will -// automatically take precedence over these weak definitions -// -//***************************************************************************** - void ResetISR(void); -WEAK void NMI_Handler(void); -WEAK void HardFault_Handler(void); -WEAK void MemManage_Handler(void); -WEAK void BusFault_Handler(void); -WEAK void UsageFault_Handler(void); -WEAK void SVC_Handler(void); -WEAK void DebugMon_Handler(void); -WEAK void PendSV_Handler(void); -WEAK void SysTick_Handler(void); -WEAK void IntDefaultHandler(void); - -//***************************************************************************** -// -// Forward declaration of the specific IRQ handlers. These are aliased -// to the IntDefaultHandler, which is a 'forever' loop. When the application -// defines a handler (with the same name), this will automatically take -// precedence over these weak definitions -// -//***************************************************************************** -void DAC_IRQHandler(void) ALIAS(IntDefaultHandler); -void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); -void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler); -void ETH_IRQHandler(void) ALIAS(IntDefaultHandler); -void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void LCD_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB0_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SCT_IRQHandler(void) ALIAS(IntDefaultHandler); -void RIT_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler); -void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART3_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler); -void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler); -void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler); -void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler); -void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler); -void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler); -void RTC_IRQHandler(void) ALIAS(IntDefaultHandler); -void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler); -void QEI_IRQHandler(void) ALIAS(IntDefaultHandler); - -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for Redlib based applications -// main() is the entry point for Newlib based applications -// -//***************************************************************************** -#if defined (__REDLIB__) -extern void __main(void); -#endif -extern int main(void); -//***************************************************************************** -// -// External declaration for the pointer to the stack top from the Linker Script -// -//***************************************************************************** -extern void _vStackTop(void); - -//***************************************************************************** -// -// External declaration for LPC MCU vector table checksum from Linker Script -// -//***************************************************************************** -WEAK extern void __valid_user_code_checksum(void); - -//***************************************************************************** -#if defined (__cplusplus) -} // extern "C" -#endif -//***************************************************************************** -// -// The vector table. -// This relies on the linker script to place at correct location in memory. -// -//***************************************************************************** -extern void (* const g_pfnVectors[])(void); -__attribute__ ((used,section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = { - // Core Level - CM3 - &_vStackTop, // The initial stack pointer - ResetISR, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - __valid_user_code_checksum, // LPC MCU Checksum - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - - // Chip Level - LPC18 - DAC_IRQHandler, // 16 - 0, // 17 - DMA_IRQHandler, // 18 - 0, // 19 - FLASH_EEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts - ETH_IRQHandler, // 21 - SDIO_IRQHandler, // 22 - LCD_IRQHandler, // 23 - USB0_IRQHandler, // 24 - USB1_IRQHandler, // 25 - SCT_IRQHandler, // 26 - RIT_IRQHandler, // 27 - TIMER0_IRQHandler, // 28 - TIMER1_IRQHandler, // 29 - TIMER2_IRQHandler, // 30 - TIMER3_IRQHandler, // 31 - MCPWM_IRQHandler, // 32 - ADC0_IRQHandler, // 33 - I2C0_IRQHandler, // 34 - I2C1_IRQHandler, // 35 - 0, // 36 - ADC1_IRQHandler, // 37 - SSP0_IRQHandler, // 38 - SSP1_IRQHandler, // 39 - UART0_IRQHandler, // 40 - UART1_IRQHandler, // 41 - UART2_IRQHandler, // 42 - UART3_IRQHandler, // 43 - I2S0_IRQHandler, // 44 - I2S1_IRQHandler, // 45 - SPIFI_IRQHandler, // 46 - SGPIO_IRQHandler, // 47 - GPIO0_IRQHandler, // 48 - GPIO1_IRQHandler, // 49 - GPIO2_IRQHandler, // 50 - GPIO3_IRQHandler, // 51 - GPIO4_IRQHandler, // 52 - GPIO5_IRQHandler, // 53 - GPIO6_IRQHandler, // 54 - GPIO7_IRQHandler, // 55 - GINT0_IRQHandler, // 56 - GINT1_IRQHandler, // 57 - EVRT_IRQHandler, // 58 - CAN1_IRQHandler, // 59 - 0, // 60 - 0, // 61 - ATIMER_IRQHandler, // 62 - RTC_IRQHandler, // 63 - 0, // 64 - WDT_IRQHandler, // 65 - 0, // 66 - CAN0_IRQHandler, // 67 - QEI_IRQHandler, // 68 -}; - -//***************************************************************************** -// Functions to carry out the initialization of RW and BSS data sections. These -// are written as separate functions rather than being inlined within the -// ResetISR() function in order to cope with MCUs with multiple banks of -// memory. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void data_init(unsigned int romstart, unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int *pulSrc = (unsigned int*) romstart; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = *pulSrc++; -} - -__attribute__ ((section(".after_vectors"))) -void bss_init(unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = 0; -} - -//***************************************************************************** -// The following symbols are constructs generated by the linker, indicating -// the location of various points in the "Global Section Table". This table is -// created by the linker via the Code Red managed linker script mechanism. It -// contains the load address, execution address and length of each RW data -// section and the execution and length of each BSS (zero initialized) section. -//***************************************************************************** -extern unsigned int __data_section_table; -extern unsigned int __data_section_table_end; -extern unsigned int __bss_section_table; -extern unsigned int __bss_section_table_end; - -//***************************************************************************** -// Reset entry point for your code. -// Sets up a simple runtime environment and initializes the C/C++ -// library. -// -//***************************************************************************** -void -ResetISR(void) { - -// ************************************************************* -// The following conditional block of code manually resets as -// much of the peripheral set of the LPC18 as possible. This is -// done because the LPC18 does not provide a means of triggering -// a full system reset under debugger control, which can cause -// problems in certain circumstances when debugging. -// -// You can prevent this code block being included if you require -// (for example when creating a final executable which you will -// not debug) by setting the define 'DONT_RESET_ON_RESTART'. -// -#ifndef DONT_RESET_ON_RESTART - - // Disable interrupts - __asm volatile ("cpsid i"); - // equivalent to CMSIS '__disable_irq()' function - - unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100; - // LPC_RGU->RESET_CTRL0 @ 0x40053100 - // LPC_RGU->RESET_CTRL1 @ 0x40053104 - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - - // Write to LPC_RGU->RESET_CTRL0 - *(RESET_CONTROL+0) = 0x10DF0000; - // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST| - // USB1_RST|USB0_RST|LCD_RST - - // Write to LPC_RGU->RESET_CTRL1 - *(RESET_CONTROL+1) = 0x00DFF7FF; - // CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST| - // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST| - // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST| - // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST - - // Clear all pending interrupts in the NVIC - volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280; - unsigned int irqpendloop; - for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) { - *(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF; - } - - // Reenable interrupts - __asm volatile ("cpsie i"); - // equivalent to CMSIS '__enable_irq()' function - -#endif // ifndef DONT_RESET_ON_RESTART -// ************************************************************* - - -#if defined (__USE_LPCOPEN) - SystemInit(); -#endif - - // - // Copy the data sections from flash to SRAM. - // - unsigned int LoadAddr, ExeAddr, SectionLen; - unsigned int *SectionTableAddr; - - // Load base address of Global Section Table - SectionTableAddr = &__data_section_table; - - // Copy the data sections from flash to SRAM. - while (SectionTableAddr < &__data_section_table_end) { - LoadAddr = *SectionTableAddr++; - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - data_init(LoadAddr, ExeAddr, SectionLen); - } - // At this point, SectionTableAddr = &__bss_section_table; - // Zero fill the bss segment - while (SectionTableAddr < &__bss_section_table_end) { - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - bss_init(ExeAddr, SectionLen); - } - - // ****************************** - // Check to see if we are running the code from a non-zero - // address (eg RAM, external flash), in which case we need - // to modify the VTOR register to tell the CPU that the - // vector table is located at a non-0x0 address. - - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08; - if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) { - // CMSIS : SCB->VTOR =
- *pSCB_VTOR = (unsigned int)g_pfnVectors; - } - -#if defined (__USE_CMSIS) - SystemInit(); -#endif - -#if defined (__cplusplus) - // - // Call C++ library initialisation - // - __libc_init_array(); -#endif - -#if defined (__REDLIB__) - // Call the Redlib library, which in turn calls main() - __main() ; -#else - main(); -#endif - - // - // main() shouldn't return, but if it does, we'll just enter an infinite loop - // - while (1) { - ; - } -} - -//***************************************************************************** -// Default exception handlers. Override the ones here by defining your own -// handler routines in your application code. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void NMI_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void HardFault_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void MemManage_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void BusFault_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void UsageFault_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void SVC_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void DebugMon_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void PendSV_Handler(void) { - while (1) { - } -} -__attribute__ ((section(".after_vectors"))) -void SysTick_Handler(void) { - while (1) { - } -} - -//***************************************************************************** -// -// Processor ends up here if an unexpected interrupt occurs or a specific -// handler is not present in the application code. -// -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void IntDefaultHandler(void) { - while (1) { - } -} - - - - - - diff --git a/hw/mcu/nxp/lpc_driver b/hw/mcu/nxp/lpc_driver index e25173760..7d2ca4123 160000 --- a/hw/mcu/nxp/lpc_driver +++ b/hw/mcu/nxp/lpc_driver @@ -1 +1 @@ -Subproject commit e2517376005feacdfe0cdd9bc8db9f4200be5421 +Subproject commit 7d2ca4123ec4fe04c6ea0aa2662d7a6aebc0c4f7 From 218aaf94dee63777f0cfdfd6ce5edf344de62407 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 13:19:00 +0700 Subject: [PATCH 04/35] more clean up --- docs/boards.md | 2 +- .../{board_stm32h743nucleo.c => stm32h743nucleo.c} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename hw/bsp/stm32h743nucleo/{board_stm32h743nucleo.c => stm32h743nucleo.c} (100%) diff --git a/docs/boards.md b/docs/boards.md index ef7f7a6fb..3054409f0 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -50,7 +50,7 @@ This code base already had supported for a handful of following boards If you don't possess any of supported board above. Don't worry you can easily implemented your own one by following this guide as long as the mcu is supported. - Create new makefile for your board at `hw/bsp//board.mk` and linker file as well if needed. -- Create new source file for your board at `hw/bsp//board_.c` and implement following APIs +- Create new source file for your board at `hw/bsp//.c` and implement following APIs ### Board APIs diff --git a/hw/bsp/stm32h743nucleo/board_stm32h743nucleo.c b/hw/bsp/stm32h743nucleo/stm32h743nucleo.c similarity index 100% rename from hw/bsp/stm32h743nucleo/board_stm32h743nucleo.c rename to hw/bsp/stm32h743nucleo/stm32h743nucleo.c From 3497dd02642c92ad6116f0f59d7890e341d82a08 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 16:47:57 +0700 Subject: [PATCH 05/35] adding ngx4330 --- hw/bsp/ngx4330/board.mk | 47 ++++++ hw/bsp/ngx4330/ngx4330.c | 271 ++++++++++++++++++++++++++++++ hw/bsp/ngx4330/ngx4330.ld | 343 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 661 insertions(+) create mode 100644 hw/bsp/ngx4330/board.mk create mode 100644 hw/bsp/ngx4330/ngx4330.c create mode 100644 hw/bsp/ngx4330/ngx4330.ld diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk new file mode 100644 index 000000000..a54675a7d --- /dev/null +++ b/hw/bsp/ngx4330/board.mk @@ -0,0 +1,47 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m4 \ + -nostdlib \ + -DCORE_M4 \ + -DCFG_TUSB_MCU=OPT_MCU_LPC43XX \ + -D__USE_LPCOPEN + +# lpc_types.h cause following errors +CFLAGS += -Wno-error=strict-prototypes + +MCU_DIR = hw/mcu/nxp/lpc_driver/lpc43xx/lpc_chip_43xx + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/$(BOARD)/ngx4330.ld + +# TODO remove later +SRC_C += src/portable/$(VENDOR)/$(CHIP_FAMILY)/hal_$(CHIP_FAMILY).c + +SRC_C += \ + $(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \ + $(MCU_DIR)/src/chip_18xx_43xx.c \ + $(MCU_DIR)/src/clock_18xx_43xx.c \ + $(MCU_DIR)/src/gpio_18xx_43xx.c \ + $(MCU_DIR)/src/sysinit_18xx_43xx.c \ + $(MCU_DIR)/src/i2c_18xx_43xx.c \ + $(MCU_DIR)/src/i2cm_18xx_43xx.c \ + $(MCU_DIR)/src/uart_18xx_43xx.c + +INC += \ + $(TOP)/$(MCU_DIR)/inc \ + $(TOP)/$(MCU_DIR)/inc/config_43xx + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = lpc18_43 + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM4 + +# For flash-jlink target +JLINK_DEVICE = LPC4330 +JLINK_IF = swd + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c new file mode 100644 index 000000000..12640ee7a --- /dev/null +++ b/hw/bsp/ngx4330/ngx4330.c @@ -0,0 +1,271 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "chip.h" +#include "../board.h" + +#define LED_PORT 1 +#define LED_PIN 12 +#define LED_STATE_ON 0 + +#define BUTTON_PORT 0 +#define BUTTON_PIN 7 +#define BUTTON_STATE_ACTIVE 0 + +#define BOARD_UART_PORT LPC_USART0 +#define BOARD_UART_PIN_PORT 0x0f +#define BOARD_UART_PIN_TX 10 // PF.10 : UART0_TXD +#define BOARD_UART_PIN_RX 11 // PF.11 : UART0_RXD + +/*------------------------------------------------------------------*/ +/* BOARD API + *------------------------------------------------------------------*/ + +/* System configuration variables used by chip driver */ +const uint32_t OscRateIn = 12000000; +const uint32_t ExtRateIn = 0; + +static const PINMUX_GRP_T pinmuxing[] = +{ + // LED P2.12 as GPIO 1.12 + {2, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_PULLDOWN | SCU_MODE_FUNC0)}, + + // Button P2.7 as GPIO 0.7 + {2, 7, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)}, + + // USB + + // SPIFI + {3, 3, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI CLK */ + {3, 4, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D3 */ + {3, 5, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D2 */ + {3, 6, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D1 */ + {3, 7, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI D0 */ + {3, 8, (SCU_PINIO_FAST | SCU_MODE_FUNC3)} /* SPIFI CS/SSEL */ +}; + +// Invoked by startup code +extern void (* const g_pfnVectors[])(void); +void SystemInit(void) +{ + // Remap isr vector + *((uint32_t *) 0xE000ED08) = (uint32_t) &g_pfnVectors; + + // Set up pinmux + Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); + + //------------- Set up clock -------------// + Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IRC, true, false); // change SPIFI to IRC during clock programming + LPC_SPIFI->CTRL |= SPIFI_CTRL_FBCLK(1); // and set FBCLK in SPIFI controller + + Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true); + + /* Reset and enable 32Khz oscillator */ + LPC_CREG->CREG0 &= ~((1 << 3) | (1 << 2)); + LPC_CREG->CREG0 |= (1 << 1) | (1 << 0); + + /* Setup a divider E for main PLL clock switch SPIFI clock to that divider. + Divide rate is based on CPU speed and speed of SPI FLASH part. */ +#if (MAX_CLOCK_FREQ > 180000000) + Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 5); +#else + Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 4); +#endif + Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false); + + /* Setup system base clocks and initial states. This won't enable and + disable individual clocks, but sets up the base clock sources for + each individual peripheral clock. */ + Chip_Clock_SetBaseClock(CLK_BASE_USB1, CLKIN_IDIVD, true, true); +} + +void board_init(void) +{ + SystemCoreClockUpdate(); + +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); +#endif + + Chip_GPIO_Init(LPC_GPIO_PORT); + + // LED + Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN); + + // Button + Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN); + +#if 0 +#if 0 + //------------- UART -------------// + scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1); + scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_RX, MD_PLN | MD_EZI | MD_ZI, FUNC1); + + UART_CFG_Type UARTConfigStruct; + UART_ConfigStructInit(&UARTConfigStruct); + UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE; + UARTConfigStruct.Clock_Speed = 0; + + UART_Init(BOARD_UART_PORT, &UARTConfigStruct); + UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit +#endif + + //------------- USB -------------// + enum { + USBMODE_DEVICE = 2, + USBMODE_HOST = 3 + }; + + enum { + USBMODE_VBUS_LOW = 0, + USBMODE_VBUS_HIGH = 1 + }; + + /* USB0 + * For USB Device operation; insert jumpers in position 1-2 in JP17/JP18/JP19. GPIO28 controls USB + * connect functionality and LED32 lights when the USB Device is connected. SJ4 has pads 1-2 shorted + * by default. LED33 is controlled by GPIO27 and signals USB-up state. GPIO54 is used for VBUS + * sensing. + * For USB Host operation; insert jumpers in position 2-3 in JP17/JP18/JP19. USB Host power is + * controlled via distribution switch U20 (found in schematic page 11). Signal GPIO26 is active low and + * enables +5V on VBUS2. LED35 light whenever +5V is present on VBUS2. GPIO55 is connected to + * status feedback from the distribution switch. GPIO54 is used for VBUS sensing. 15Kohm pull-down + * resistors are always active + */ +#if CFG_TUSB_RHPORT0_MODE + Chip_USB0_Init(); + + // Reset controller + LPC_USB0->USBCMD_D |= 0x02; + while( LPC_USB0->USBCMD_D & 0x02 ) {} + + // Set mode + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST + LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); + + LPC_USB0->PORTSC1_D |= (1<<24); // FIXME force full speed for debugging + #else // TODO OTG + LPC_USB0->USBMODE_D = USBMODE_DEVICE; + LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; + #endif +#endif + + /* USB1 + * When USB channel #1 is used as USB Host, 15Kohm pull-down resistors are needed on the USB data + * signals. These are activated inside the USB OTG chip (U31), and this has to be done via the I2C + * interface of GPIO52/GPIO53. + * J20 is the connector to use when USB Host is used. In order to provide +5V to the external USB + * device connected to this connector (J20), channel A of U20 must be enabled. It is enabled by default + * since SJ5 is normally connected between pin 1-2. LED34 lights green when +5V is available on J20. + * JP15 shall not be inserted. JP16 has no effect + * + * When USB channel #1 is used as USB Device, a 1.5Kohm pull-up resistor is needed on the USB DP + * data signal. There are two methods to create this. JP15 is inserted and the pull-up resistor is always + * enabled. Alternatively, the pull-up resistor is activated inside the USB OTG chip (U31), and this has to + * be done via the I2C interface of GPIO52/GPIO53. In the latter case, JP15 shall not be inserted. + * J19 is the connector to use when USB Device is used. Normally it should be a USB-B connector for + * creating a USB Device interface, but the mini-AB connector can also be used in this case. The status + * of VBUS can be read via U31. + * JP16 shall not be inserted. + */ +#if CFG_TUSB_RHPORT1_MODE + Chip_USB1_Init(); + + // Reset controller + LPC_USB1->USBCMD_D |= 0x02; + while( LPC_USB1->USBCMD_D & 0x02 ) {} + + // Set mode + #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST + LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); + #else // TODO OTG + LPC_USB1->USBMODE_D = USBMODE_DEVICE; + #endif + + // USB1 as fullspeed + LPC_USB1->PORTSC1_D |= (1<<24); +#endif + + // USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board) + Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7); + + #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE + // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low. + Chip_SCU_PinMuxSet(9, 5, SCU_MODE_PULLDOWN | SCU_MODE_FUNC4); + Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 18); + #endif + + // USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required + // TODO Remove R170, R171, solder a pair of 15K to USB1 D+/D- to test with USB1 Host +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + //return UART_ReceiveByte(BOARD_UART_PORT); + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + //UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING); + (void) buf; + (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif diff --git a/hw/bsp/ngx4330/ngx4330.ld b/hw/bsp/ngx4330/ngx4330.ld new file mode 100644 index 000000000..7bd363f08 --- /dev/null +++ b/hw/bsp/ngx4330/ngx4330.ld @@ -0,0 +1,343 @@ +/* + * GENERATED FILE - DO NOT EDIT + * Copyright (c) 2008-2013 Code Red Technologies Ltd, + * Copyright 2015, 2018-2019 NXP + * (c) NXP Semiconductors 2013-2019 + * Generated linker script file for LPC4330 + * Created from linkscript.ldt by FMCreateLinkLibraries + * Using Freemarker v2.3.23 + * MCUXpresso IDE v11.0.0 [Build 2516] [2019-06-05] on Sep 9, 2019 12:09:49 PM + */ + +MEMORY +{ + /* Define each memory region */ + RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */ + RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */ + RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */ + RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */ + RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */ + SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */ +} + + /* Define a symbol for the top of each memory region */ + __base_RamLoc128 = 0x10000000 ; /* RamLoc128 */ + __base_RAM = 0x10000000 ; /* RAM */ + __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */ + __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */ + __base_RamLoc72 = 0x10080000 ; /* RamLoc72 */ + __base_RAM2 = 0x10080000 ; /* RAM2 */ + __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */ + __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */ + __base_RamAHB32 = 0x20000000 ; /* RamAHB32 */ + __base_RAM3 = 0x20000000 ; /* RAM3 */ + __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */ + __base_RamAHB16 = 0x20008000 ; /* RamAHB16 */ + __base_RAM4 = 0x20008000 ; /* RAM4 */ + __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */ + __base_RamAHB_ETB16 = 0x2000c000 ; /* RamAHB_ETB16 */ + __base_RAM5 = 0x2000c000 ; /* RAM5 */ + __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */ + __base_SPIFI = 0x14000000 ; /* SPIFI */ + __base_Flash = 0x14000000 ; /* Flash */ + __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */ + __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */ + +ENTRY(ResetISR) + +SECTIONS +{ + /* MAIN TEXT SECTION */ + .text : ALIGN(4) + { + FILL(0xff) + __vectors_start__ = ABSOLUTE(.) ; + KEEP(*(.isr_vector)) + /* Global Section Table */ + . = ALIGN(4) ; + __section_table_start = .; + __data_section_table = .; + LONG(LOADADDR(.data)); + LONG( ADDR(.data)); + LONG( SIZEOF(.data)); + LONG(LOADADDR(.data_RAM2)); + LONG( ADDR(.data_RAM2)); + LONG( SIZEOF(.data_RAM2)); + LONG(LOADADDR(.data_RAM3)); + LONG( ADDR(.data_RAM3)); + LONG( SIZEOF(.data_RAM3)); + LONG(LOADADDR(.data_RAM4)); + LONG( ADDR(.data_RAM4)); + LONG( SIZEOF(.data_RAM4)); + LONG(LOADADDR(.data_RAM5)); + LONG( ADDR(.data_RAM5)); + LONG( SIZEOF(.data_RAM5)); + __data_section_table_end = .; + __bss_section_table = .; + LONG( ADDR(.bss)); + LONG( SIZEOF(.bss)); + LONG( ADDR(.bss_RAM2)); + LONG( SIZEOF(.bss_RAM2)); + LONG( ADDR(.bss_RAM3)); + LONG( SIZEOF(.bss_RAM3)); + LONG( ADDR(.bss_RAM4)); + LONG( SIZEOF(.bss_RAM4)); + LONG( ADDR(.bss_RAM5)); + LONG( SIZEOF(.bss_RAM5)); + __bss_section_table_end = .; + __section_table_end = . ; + /* End of Global Section Table */ + + *(.after_vectors*) + + } > SPIFI + + .text : ALIGN(4) + { + *(.text*) + *(.rodata .rodata.* .constdata .constdata.*) + . = ALIGN(4); + } > SPIFI + /* + * for exception handling/unwind - some Newlib functions (in common + * with C++ and STDC++) use this. + */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > SPIFI + + __exidx_start = .; + + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > SPIFI + __exidx_end = .; + + _etext = .; + + /* DATA section for RamLoc72 */ + + .data_RAM2 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM2 = .) ; + *(.ramfunc.$RAM2) + *(.ramfunc.$RamLoc72) + *(.data.$RAM2) + *(.data.$RamLoc72) + *(.data.$RAM2.*) + *(.data.$RamLoc72.*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM2 = .) ; + } > RamLoc72 AT>SPIFI + /* DATA section for RamAHB32 */ + + .data_RAM3 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM3 = .) ; + *(.ramfunc.$RAM3) + *(.ramfunc.$RamAHB32) + *(.data.$RAM3) + *(.data.$RamAHB32) + *(.data.$RAM3.*) + *(.data.$RamAHB32.*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM3 = .) ; + } > RamAHB32 AT>SPIFI + /* DATA section for RamAHB16 */ + + .data_RAM4 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM4 = .) ; + *(.ramfunc.$RAM4) + *(.ramfunc.$RamAHB16) + *(.data.$RAM4) + *(.data.$RamAHB16) + *(.data.$RAM4.*) + *(.data.$RamAHB16.*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM4 = .) ; + } > RamAHB16 AT>SPIFI + /* DATA section for RamAHB_ETB16 */ + + .data_RAM5 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM5 = .) ; + *(.ramfunc.$RAM5) + *(.ramfunc.$RamAHB_ETB16) + *(.data.$RAM5) + *(.data.$RamAHB_ETB16) + *(.data.$RAM5.*) + *(.data.$RamAHB_ETB16.*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM5 = .) ; + } > RamAHB_ETB16 AT>SPIFI + /* MAIN DATA SECTION */ + .uninit_RESERVED (NOLOAD) : + { + . = ALIGN(4) ; + KEEP(*(.bss.$RESERVED*)) + . = ALIGN(4) ; + _end_uninit_RESERVED = .; + } > RamLoc128 + + /* Main DATA section (RamLoc128) */ + .data : ALIGN(4) + { + FILL(0xff) + _data = . ; + *(vtable) + *(.ramfunc*) + *(.data*) + . = ALIGN(4) ; + _edata = . ; + } > RamLoc128 AT>SPIFI + + /* BSS section for RamLoc72 */ + .bss_RAM2 : + { + . = ALIGN(4) ; + PROVIDE(__start_bss_RAM2 = .) ; + *(.bss.$RAM2) + *(.bss.$RamLoc72) + *(.bss.$RAM2.*) + *(.bss.$RamLoc72.*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM2 = .) ; + } > RamLoc72 + + /* BSS section for RamAHB32 */ + .bss_RAM3 : + { + . = ALIGN(4) ; + PROVIDE(__start_bss_RAM3 = .) ; + *(.bss.$RAM3) + *(.bss.$RamAHB32) + *(.bss.$RAM3.*) + *(.bss.$RamAHB32.*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM3 = .) ; + } > RamAHB32 + + /* BSS section for RamAHB16 */ + .bss_RAM4 : + { + . = ALIGN(4) ; + PROVIDE(__start_bss_RAM4 = .) ; + *(.bss.$RAM4) + *(.bss.$RamAHB16) + *(.bss.$RAM4.*) + *(.bss.$RamAHB16.*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM4 = .) ; + } > RamAHB16 + + /* BSS section for RamAHB_ETB16 */ + .bss_RAM5 : + { + . = ALIGN(4) ; + PROVIDE(__start_bss_RAM5 = .) ; + *(.bss.$RAM5) + *(.bss.$RamAHB_ETB16) + *(.bss.$RAM5.*) + *(.bss.$RamAHB_ETB16.*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM5 = .) ; + } > RamAHB_ETB16 + + /* MAIN BSS SECTION */ + .bss : + { + . = ALIGN(4) ; + _bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4) ; + _ebss = .; + PROVIDE(end = .); + } > RamLoc128 + + /* NOINIT section for RamLoc72 */ + .noinit_RAM2 (NOLOAD) : + { + . = ALIGN(4) ; + *(.noinit.$RAM2) + *(.noinit.$RamLoc72) + *(.noinit.$RAM2.*) + *(.noinit.$RamLoc72.*) + . = ALIGN(4) ; + } > RamLoc72 + + /* NOINIT section for RamAHB32 */ + .noinit_RAM3 (NOLOAD) : + { + . = ALIGN(4) ; + *(.noinit.$RAM3) + *(.noinit.$RamAHB32) + *(.noinit.$RAM3.*) + *(.noinit.$RamAHB32.*) + . = ALIGN(4) ; + } > RamAHB32 + + /* NOINIT section for RamAHB16 */ + .noinit_RAM4 (NOLOAD) : + { + . = ALIGN(4) ; + *(.noinit.$RAM4) + *(.noinit.$RamAHB16) + *(.noinit.$RAM4.*) + *(.noinit.$RamAHB16.*) + . = ALIGN(4) ; + } > RamAHB16 + + /* NOINIT section for RamAHB_ETB16 */ + .noinit_RAM5 (NOLOAD) : + { + . = ALIGN(4) ; + *(.noinit.$RAM5) + *(.noinit.$RamAHB_ETB16) + *(.noinit.$RAM5.*) + *(.noinit.$RamAHB_ETB16.*) + . = ALIGN(4) ; + } > RamAHB_ETB16 + + /* DEFAULT NOINIT SECTION */ + .noinit (NOLOAD): + { + . = ALIGN(4) ; + _noinit = .; + *(.noinit*) + . = ALIGN(4) ; + _end_noinit = .; + } > RamLoc128 + PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); + PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc128 - 0); + + /* ## Create checksum value (used in startup) ## */ + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ + ) ); + + /* Provide basic symbols giving location and size of main text + * block, including initial values of RW data sections. Note that + * these will need extending to give a complete picture with + * complex images (e.g multiple Flash banks). + */ + _image_start = LOADADDR(.text); + _image_end = LOADADDR(.data) + SIZEOF(.data); + _image_size = _image_end - _image_start; +} \ No newline at end of file From b9b9f6769854ecd2814ee770e18c90e46170a2b4 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 17:00:35 +0700 Subject: [PATCH 06/35] ngx4330 usb0 work well --- hw/bsp/ngx4330/board.mk | 2 -- hw/bsp/ngx4330/ngx4330.c | 18 +++++------------- 2 files changed, 5 insertions(+), 15 deletions(-) diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk index a54675a7d..852c883b0 100644 --- a/hw/bsp/ngx4330/board.mk +++ b/hw/bsp/ngx4330/board.mk @@ -24,8 +24,6 @@ SRC_C += \ $(MCU_DIR)/src/clock_18xx_43xx.c \ $(MCU_DIR)/src/gpio_18xx_43xx.c \ $(MCU_DIR)/src/sysinit_18xx_43xx.c \ - $(MCU_DIR)/src/i2c_18xx_43xx.c \ - $(MCU_DIR)/src/i2cm_18xx_43xx.c \ $(MCU_DIR)/src/uart_18xx_43xx.c INC += \ diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c index 12640ee7a..0e39ea711 100644 --- a/hw/bsp/ngx4330/ngx4330.c +++ b/hw/bsp/ngx4330/ngx4330.c @@ -57,6 +57,9 @@ static const PINMUX_GRP_T pinmuxing[] = {2, 7, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)}, // USB + {2, 6, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC4)}, // USB1_PWR_EN + {2, 5, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2)}, // USB1_VBUS + {1, 7, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC4)}, // USB0_PWRN_EN // SPIFI {3, 3, (SCU_PINIO_FAST | SCU_MODE_FUNC3)}, /* SPIFI CLK */ @@ -122,7 +125,6 @@ void board_init(void) // Button Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN); -#if 0 #if 0 //------------- UART -------------// scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1); @@ -211,19 +213,9 @@ void board_init(void) // USB1 as fullspeed LPC_USB1->PORTSC1_D |= (1<<24); -#endif - // USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board) - Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7); - - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE - // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low. - Chip_SCU_PinMuxSet(9, 5, SCU_MODE_PULLDOWN | SCU_MODE_FUNC4); - Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 18); - #endif - - // USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required - // TODO Remove R170, R171, solder a pair of 15K to USB1 D+/D- to test with USB1 Host +// Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 5, 6); /* GPIO5[6] = USB1_PWR_EN */ +// Chip_GPIO_SetPinState(LPC_GPIO_PORT, 5, 6, true); /* GPIO5[6] output high */ #endif } From 3f5b17ef84b16d6671cd0c433e87ba3e7feecef9 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 9 Sep 2019 17:33:06 +0700 Subject: [PATCH 07/35] doc update --- docs/boards.md | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/boards.md b/docs/boards.md index 3054409f0..826100922 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -25,6 +25,7 @@ This code base already had supported for a handful of following boards - [LPCXpresso 1769](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc1769:OM13000) - [Keil MCB1800 Evaluation Board](http://www.keil.com/mcb1800) - [Embedded Artists LPC4088 Quick Start board](https://www.embeddedartists.com/products/lpc4088-quickstart-board) +- [NGX LPC4330-Xplorer](https://www.nxp.com/design/designs/lpc4330-xplorer-board:OM13027) - [Embedded Artists LPC4357 Developer Kit](http://www.embeddedartists.com/products/kits/lpc4357_kit.php) - [LPCXpresso 51U68](https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpcxpresso51u68-for-the-lpc51u68-mcus:OM40005) - [LPCXpresso 54114](https://www.nxp.com/design/microcontrollers-developer-resources/lpcxpresso-boards/lpcxpresso54114-board:OM13089) From 96bead4b2ab17d27067f7f32bde503b5dcac420a Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 13:24:08 -0400 Subject: [PATCH 08/35] Add dummy arguments to GET_NTH_ARG to make GCC happy (removes pedantic warnings) --- src/common/tusb_verify.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index b4f981d4a..2727ce043 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -105,7 +105,7 @@ #define TU_VERIFY_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, , false) #define TU_VERIFY_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, , _ret) -#define TU_VERIFY(...) GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS)(__VA_ARGS__) +#define TU_VERIFY(...) GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ @@ -116,7 +116,7 @@ #define TU_VERIFY_HDLR_2ARGS(_cond, _handler) TU_VERIFY_DEFINE(_cond, _handler, false) #define TU_VERIFY_HDLR_3ARGS(_cond, _handler, _ret) TU_VERIFY_DEFINE(_cond, _handler, _ret) -#define TU_VERIFY_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS)(__VA_ARGS__) +#define TU_VERIFY_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ @@ -127,7 +127,7 @@ #define TU_VERIFY_ERR_1ARGS(_error) TU_VERIFY_ERR_DEF2(_error, ) #define TU_VERIFY_ERR_2ARGS(_error, _ret) TU_VERIFY_ERR_DEF3(_error, ,_ret) -#define TU_VERIFY_ERR(...) GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_ERR_2ARGS, TU_VERIFY_ERR_1ARGS)(__VA_ARGS__) +#define TU_VERIFY_ERR(...) GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_ERR_2ARGS, TU_VERIFY_ERR_1ARGS,UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ /* TU_VERIFY STATUS WITH HANDLER @@ -137,7 +137,7 @@ #define TU_VERIFY_ERR_HDLR_2ARGS(_error, _handler) TU_VERIFY_ERR_DEF2(_error, _handler) #define TU_VERIFY_ERR_HDLR_3ARGS(_error, _handler, _ret) TU_VERIFY_ERR_DEF3(_error, _handler, _ret) -#define TU_VERIFY_ERR_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_ERR_HDLR_3ARGS, TU_VERIFY_ERR_HDLR_2ARGS)(__VA_ARGS__) +#define TU_VERIFY_ERR_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_ERR_HDLR_3ARGS, TU_VERIFY_ERR_HDLR_2ARGS,UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ @@ -149,7 +149,7 @@ #define ASSERT_1ARGS(_cond) TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), false) #define ASSERT_2ARGS(_cond, _ret) TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), _ret) -#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS)(__VA_ARGS__) +#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ /* ASSERT Error @@ -158,7 +158,7 @@ #define ASERT_ERR_1ARGS(_error) TU_VERIFY_ERR_DEF2(_error, TU_BREAKPOINT()) #define ASERT_ERR_2ARGS(_error, _ret) TU_VERIFY_ERR_DEF3(_error, TU_BREAKPOINT(), _ret) -#define TU_ASSERT_ERR(...) GET_3RD_ARG(__VA_ARGS__, ASERT_ERR_2ARGS, ASERT_ERR_1ARGS)(__VA_ARGS__) +#define TU_ASSERT_ERR(...) GET_3RD_ARG(__VA_ARGS__, ASERT_ERR_2ARGS, ASERT_ERR_1ARGS,UNUSED)(__VA_ARGS__) /*------------------------------------------------------------------*/ /* ASSERT HDLR From b4c8a09f2011088080b6a93d929cf0ee3b3bc487 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 13:29:26 -0400 Subject: [PATCH 09/35] Remove STM32 F3 port. --- src/portable/st/stm32f3/dcd_stm32f3.c | 85 --------------------------- src/tusb_option.h | 2 +- 2 files changed, 1 insertion(+), 86 deletions(-) delete mode 100644 src/portable/st/stm32f3/dcd_stm32f3.c diff --git a/src/portable/st/stm32f3/dcd_stm32f3.c b/src/portable/st/stm32f3/dcd_stm32f3.c deleted file mode 100644 index 7339863be..000000000 --- a/src/portable/st/stm32f3/dcd_stm32f3.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32F3 - -#include "device/dcd.h" -#include "stm32f3xx.h" - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ - -void dcd_init (uint8_t rhport) -{ -} - -// Enable device interrupt -void dcd_int_enable (uint8_t rhport) -{} - -// Disable device interrupt -void dcd_int_disable(uint8_t rhport) -{} - -// Receive Set Address request, mcu port must also include status IN response -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{} - -// Receive Set Config request -void dcd_set_config (uint8_t rhport, uint8_t config_num) -{} - -void dcd_remote_wakeup(uint8_t rhport) -{ - (void) rhport; -} - -//--------------------------------------------------------------------+ -// Endpoint API -//--------------------------------------------------------------------+ -bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) -{ - return false; -} - -bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) -{ - return false; -} - -void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) -{ -} - -void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) -{ -} - -#endif - diff --git a/src/tusb_option.h b/src/tusb_option.h index fbd48a8fa..e72c9540c 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -52,7 +52,7 @@ #define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51 #define OPT_MCU_STM32F4 300 ///< ST STM32F4 -#define OPT_MCU_STM32F3 301 ///< ST STM32F3 +#define OPT_MCU_STM32_FSDEV 301 ///< ST STM32F3 #define OPT_MCU_STM32H7 302 ///< ST STM32H7 /** @} */ From 4517d504b875022ecbf7b18447e26be7af5f4aa7 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 13:34:30 -0400 Subject: [PATCH 10/35] Fix typo of ENDOINT --- src/device/usbd_control.c | 4 ++-- src/tusb_option.h | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index f4b9d6219..4ec432185 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -51,7 +51,7 @@ typedef struct static usbd_control_xfer_t _control_state; -CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDOINT0_SIZE]; +CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; void usbd_control_reset (uint8_t rhport) { @@ -68,7 +68,7 @@ bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request) // Each transaction is up to endpoint0's max packet size static bool start_control_data_xact(uint8_t rhport) { - uint16_t const xact_len = tu_min16(_control_state.total_len - _control_state.total_transferred, CFG_TUD_ENDOINT0_SIZE); + uint16_t const xact_len = tu_min16(_control_state.total_len - _control_state.total_transferred, CFG_TUD_ENDPOINT0_SIZE); uint8_t ep_addr = EDPT_CTRL_OUT; diff --git a/src/tusb_option.h b/src/tusb_option.h index e72c9540c..0cd462ed1 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -145,8 +145,8 @@ // DEVICE OPTIONS //-------------------------------------------------------------------- -#ifndef CFG_TUD_ENDOINT0_SIZE - #define CFG_TUD_ENDOINT0_SIZE 64 +#ifndef CFG_TUD_ENDPOINT0_SIZE + #define CFG_TUD_ENDPOINT0_SIZE 64 #endif #ifndef CFG_TUD_CDC @@ -198,7 +198,7 @@ //------------------------------------------------------------------ // Configuration Validation //------------------------------------------------------------------ -#if CFG_TUD_ENDOINT0_SIZE > 64 +#if CFG_TUD_ENDPOINT0_SIZE > 64 #error Control Endpoint Max Packet Size cannot be larger than 64 #endif From 75a3f791e30554cce09a941622bf16d2b9d60c24 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 13:35:41 -0400 Subject: [PATCH 11/35] Remove some type conversion warnings (using GCC pedantic warnings) --- src/common/tusb_common.h | 2 +- src/common/tusb_types.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 4352505eb..c62a04128 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -117,7 +117,7 @@ static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000U static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); } //------------- Mathematics -------------// -static inline uint32_t tu_abs(int32_t value) { return (value < 0) ? (-value) : value; } +static inline uint32_t tu_abs(int32_t value) { return (uint32_t)((value < 0) ? (-value) : value); } /// inclusive range checking static inline bool tu_within(uint32_t lower, uint32_t value, uint32_t upper) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 9aea2d772..a50e89934 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -442,12 +442,12 @@ static inline tusb_dir_t tu_edpt_dir(uint8_t addr) // Get Endpoint number from address static inline uint8_t tu_edpt_number(uint8_t addr) { - return addr & (~TUSB_DIR_IN_MASK); + return (uint8_t)(addr & (~TUSB_DIR_IN_MASK)); } static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) { - return num | (dir ? TUSB_DIR_IN_MASK : 0); + return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0)); } //--------------------------------------------------------------------+ From 5ec59c2a30924e65a01b1130f0dc4ec6ef1ed954 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 13:38:10 -0400 Subject: [PATCH 12/35] Add STM32 FSDEV driver. --- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 729 ++++++++++++++++++ .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 232 ++++++ 2 files changed, 961 insertions(+) create mode 100644 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c create mode 100644 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c new file mode 100644 index 000000000..170a291e3 --- /dev/null +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -0,0 +1,729 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Nathan Conrad + * + * Portions: + * Copyright (c) 2016 STMicroelectronics + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/********************************************** + * This driver should work with minimal for the ST Micro "USB A" peripheral. This + * covers: + * + * F04x, F072, F078, 070x6/B 1024 byte buffer + * F102, F103 512 byte buffer; no internal D+ pull-up + * F302xB/C, F303xB/C, F373 512 byte buffer; no internal D+ pull-up + * F302x6/8, F302xD/E2, F303xD/E 1024 byte buffer; no internal D+ pull-up + * L0x2, L0x3 1024 byte buffer + * L1 512 byte buffer + * 2L4x2, 2L4x3 1024 byte buffer + * + * Assumptions of the driver: + * - dcd_fs_irqHandler() is called by the USB interrupt handler + * - USB clock enabled before usb_init() is called; Perhaps use __HAL_RCC_USB_CLK_ENABLE(); + * - You are not using CAN (it must share the packet buffer) + * - APB clock is >= 10 MHz + * - On some boards, series resistors are required, but not on others. + * - On some boards, D+ pull up resistor (1.5kohm) is required, but not on others. + * - You don't have long-running interrupts; some USB packets must be quickly responded to. + * - You have the ST CMSIS library linked into the project. HAL is not used. + * + * Current driver limitations (i.e., a list of features for you to add): + * - STALL handled, but not tested. + * - Does it work? No clue. + * - Only tested on F070RB; other models will have an #error during compilation + * - All EP BTABLE buffers are created as max 64 bytes. + * - Smaller can be requested, but it has to be an even number. + * - No isochronous endpoints + * - Endpoint index is the ID of the endpoint + * - This means that priority is given to endpoints with lower ID numbers + * - Code is mixing up EP IX with EP ID. Everywhere. + * - No way to close endpoints; Can a device be reconfigured without a reset? + * - Packet buffer memory is copied in the interrupt. + * - This is better for performance, but means interrupts are disabled for longer + * - DMA may be the best choice, but it could also be pushed to the USBD task. + * - No double-buffering + * - No DMA + * - No provision to control the D+ pull-up using GPIO on devices without an internal pull-up. + * - Minimal error handling + * - Perhaps error interrupts sholud be reported to the stack, or cause a device reset? + * - Assumes a single USB peripheral; I think that no hardware has multiple so this is fine. + * + * USB documentation and Reference implementations + * - STM32 Reference manuals + * - STM32 USB Hardware Guidelines AN4879 + * + * - STM32 HAL (much of this driver is based on this) + * - libopencm3/lib/stm32/common/st_usbfs_core.c + * - Keil USB Device http://www.keil.com/pack/doc/mw/USB/html/group__usbd.html + * + * - YouTube OpenTechLab 011; https://www.youtube.com/watch?v=4FOkJLp_PUw + * + * Advantages over HAL driver: + * - Tiny (saves RAM, assumes a single USB peripheral) + * + * Notes: + * - The buffer table is allocated as endpoints are opened. The allocation is only + * cleared when the device is reset. This may be bad if the USB device needs + * to be reconfigured. + */ + +#include "tusb_option.h" + +#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32_FSDEV + +// In order to reduce the dependance on HAL, we undefine this. +// Some definitions are copied to our private include file. +#undef USE_HAL_DRIVER + +#include "device/dcd.h" +#include "stm32f0xx.h" +#include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h" +#include "uart_util.h" + + +/***************************************************** + * Configuration + *****************************************************/ + +// HW supports max of 8 endpoints, but this can be reduced to save RAM +#ifndef MAX_EP_COUNT +# define MAX_EP_COUNT 8u +#endif + +// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it +// Both of these MUST be a multiple of 2, and are in byte units. +#ifndef DCD_STM32_BTABLE_BASE +# define DCD_STM32_BTABLE_BASE 0u +#endif + +#ifndef DCD_STM32_BTABLE_LENGTH +# define DCD_STM32_BTABLE_LENGTH (DCD_STM32_BTABLE_LENGTH - DCD_STM32_BTABLE_BASE) +#endif + +/*************************************************** + * Checks, structs, defines, function definitions, etc. + */ + +#if (MAX_EP_COUNT > 8) +# error Only 8 endpoints supported on the hardware +#endif + +#if ((BTABLE_BASE + BTABLE_LENGTH)>PMA_LENGTH) +# error BTABLE does not fit in PMA RAM +#endif + +// Max size of a USB FS packet is 64... +#define MAX_PACKET_SIZE 64 + + +// One of these for every EP IN & OUT, uses a bit of RAM.... +typedef struct +{ + uint8_t * buffer; + uint16_t total_len; + uint16_t queued_len; +} xfer_ctl_t; + +static xfer_ctl_t xfer_status[MAX_EP_COUNT][2]; +#define XFER_CTL_BASE(_epnum, _dir) &xfer_status[_epnum][_dir] + +static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6]; + +static uint8_t newDADDR; // Used to set the new device address during the CTR IRQ handler + +// EP Buffers assigned from end of memory location, to minimize their chance of crashing +// into the stack. +static uint16_t ep_buf_ptr; +static void dcd_handle_bus_reset(); +static void dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes); +static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes); +static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix); + +void dcd_init (uint8_t rhport) +{ + (void)rhport; + /* Clocks should already be enabled */ + /* Use __HAL_RCC_USB_CLK_ENABLE(); to enable the clocks before calling this function */ + + /* The RM mentions to use a special ordering of PDWN and FRES, but this isn't done in HAL. + * Here, the RM is followed. */ + + for(uint32_t i = 0; i<200; i++) // should be a few us + { + asm("NOP"); + } + // Perform USB peripheral reset + USB->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN; + for(uint32_t i = 0; i<200; i++) // should be a few us + { + asm("NOP"); + } + USB->CNTR &= ~(USB_CNTR_PDWN);// Remove powerdown + // Wait startup time, for F042 and F070, this is <= 1 us. + for(uint32_t i = 0; i<200; i++) // should be a few us + { + asm("NOP"); + } + USB->CNTR = 0; // Enable USB + + USB->BTABLE = DCD_STM32_BTABLE_BASE; + + USB->ISTR &= ~(USB_ISTR_ALL_EVENTS); // Clear pending interrupts + + // Clear all EPREG + for(uint16_t i=0; i<8; i++) + { + EPREG(0) = 0u; + } + + // Initialize the BTABLE for EP0 at this point (though setting up the EP0R is unneeded) + // This is actually not necessary, but helps debugging to start with a blank RAM area + for(uint16_t i=0;i<(PMA_LENGTH>>1); i++) + { + ((uint16_t*)USB_PMAADDR)[DCD_STM32_BTABLE_BASE + i] = 0u; + } + USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_SOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM; + dcd_handle_bus_reset(); + // And finally enable pull-up, which may trigger the RESET IRQ if the host is connected. + // (if this MCU has an internal pullup) +#if defined(USB_BCDR_DPPU) + USB->BCDR |= USB_BCDR_DPPU; +#endif +} + +// Enable device interrupt +void dcd_int_enable (uint8_t rhport) +{ + (void)rhport; + NVIC_SetPriority(USB_IRQn, 0); + NVIC_EnableIRQ(USB_IRQn); +} + +// Disable device interrupt +void dcd_int_disable(uint8_t rhport) +{ + (void)rhport; + NVIC_DisableIRQ(USB_IRQn); +} + +// Receive Set Address request, mcu port must also include status IN response +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{ + (void)rhport; + // We cannot immediatly change it; it must be queued to change after the STATUS packet is sent. + // (CTR handler will actually change the address once it sees that the transmission is complete) + newDADDR = dev_addr; + + // Respond with status + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); + +} + +// Receive Set Config request +void dcd_set_config (uint8_t rhport, uint8_t config_num) +{ + (void) rhport; + (void) config_num; + // Nothing to do? Handled by stack. +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + (void) rhport; +} + +// I'm getting a weird warning about missing braces here that I don't +// know how to fix. +#if defined(__GNUC__) && (__GNUC__ >= 7) +# pragma GCC diagnostic push +# pragma GCC diagnostic ignored "-Wmissing-braces" +#endif +static const tusb_desc_endpoint_t ep0OUT_desc = +{ + .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE, + .bDescriptorType = TUSB_XFER_CONTROL, + .bEndpointAddress = 0x00 +}; + +static const tusb_desc_endpoint_t ep0IN_desc = +{ + .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE, + .bDescriptorType = TUSB_XFER_CONTROL, + .bEndpointAddress = 0x80 +}; + +#pragma GCC diagnostic pop + +static void dcd_handle_bus_reset() +{ + //__IO uint16_t * const epreg = &(EPREG(0)); + USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag + + // Clear all EPREG (or maybe this is automatic? I'm not sure) + for(uint16_t i=0; i<8; i++) + { + EPREG(0) = 0u; + } + + ep_buf_ptr = 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each) + dcd_edpt_open (0, &ep0OUT_desc); + dcd_edpt_open (0, &ep0IN_desc); + newDADDR = 0; + USB->DADDR = USB_DADDR_EF; // Set enable flag, and leaving the device address as zero. + PCD_SET_EP_RX_STATUS(USB, 0, USB_EP_RX_VALID); // And start accepting SETUP on EP0 +} + +// FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed. +static uint16_t dcd_ep_ctr_handler() +{ + uint16_t count=0U; + uint8_t EPindex; + __IO uint16_t wIstr; + __IO uint16_t wEPVal = 0U; + + // stack variables to pass to USBD + + /* stay in loop while pending interrupts */ + while (((wIstr = USB->ISTR) & USB_ISTR_CTR) != 0U) + { + /* extract highest priority endpoint index */ + EPindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); + + if (EPindex == 0U) + { + /* Decode and service control endpoint interrupt */ + + /* DIR bit = origin of the interrupt */ + if ((wIstr & USB_ISTR_DIR) == 0U) + { + /* DIR = 0 => IN int */ + /* DIR = 0 implies that (EP_CTR_TX = 1) always */ + PCD_CLEAR_TX_EP_CTR(USB, 0); + + xfer_ctl_t * xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_IN); + + if((xfer->total_len == xfer->queued_len)) + { + dcd_event_xfer_complete(0u, (uint8_t)(0x80 + EPindex), xfer->total_len, XFER_RESULT_SUCCESS, true); + if((newDADDR != 0) && ( xfer->total_len == 0U)) + { + // Delayed setting of the DADDR after the 0-len DATA packet acking the request is sent. + USB->DADDR &= ~USB_DADDR_ADD; + USB->DADDR |= newDADDR; + newDADDR = 0; + } + if(xfer->total_len == 0) // Probably a status message? + { + PCD_CLEAR_RX_DTOG(USB,EPindex); + } + } + else + { + dcd_transmit_packet(xfer,EPindex); + } + } + else + { + /* DIR = 1 & CTR_RX => SETUP or OUT int */ + /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ + + xfer_ctl_t *xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_OUT); + + //ep = &hpcd->OUT_ep[0]; + wEPVal = PCD_GET_ENDPOINT(USB, EPindex); + + if ((wEPVal & USB_EP_SETUP) != 0U) // SETUP + { + // The setup_received function uses memcpy, so this must first copy the setup data into + // user memory, to allow for the 32-bit access that memcpy performs. + uint8_t userMemBuf[8]; + /* Get SETUP Packet*/ + count = PCD_GET_EP_RX_CNT(USB, EPindex); + //TU_ASSERT_ERR(count == 8); + dcd_read_packet_memory(userMemBuf, *PCD_EP_RX_ADDRESS(USB,EPindex), 8); + /* SETUP bit kept frozen while CTR_RX = 1*/ + dcd_event_setup_received(0, (uint8_t*)userMemBuf, true); + PCD_CLEAR_RX_EP_CTR(USB, EPindex); + } + else if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT + { + + PCD_CLEAR_RX_EP_CTR(USB, EPindex); + + /* Get Control Data OUT Packet */ + count = PCD_GET_EP_RX_CNT(USB,EPindex); + + if (count != 0U) + { + dcd_read_packet_memory(xfer->buffer, *PCD_EP_RX_ADDRESS(USB,EPindex), count); + xfer->queued_len = (uint16_t)(xfer->queued_len + count); + } + + /* Process Control Data OUT status Packet*/ + if(EPindex == 0 && xfer->total_len == 0) + { + PCD_CLEAR_EP_KIND(USB,0); // Good, so allow non-zero length packets now. + } + dcd_event_xfer_complete(0, EPindex, xfer->total_len, XFER_RESULT_SUCCESS, true); + + PCD_SET_EP_RX_CNT(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE); + if(EPindex == 0 && xfer->total_len == 0) + { + PCD_SET_EP_RX_STATUS(USB, EPindex, USB_EP_RX_VALID);// Await next SETUP + } + + } + + } + } + else /* Decode and service non control endpoints interrupt */ + { + + /* process related endpoint register */ + wEPVal = PCD_GET_ENDPOINT(USB, EPindex); + if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT + { + /* clear int flag */ + PCD_CLEAR_RX_EP_CTR(USB, EPindex); + + xfer_ctl_t * xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_OUT); + + //ep = &hpcd->OUT_ep[EPindex]; + + count = PCD_GET_EP_RX_CNT(USB, EPindex); + if (count != 0U) + { + dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), + *PCD_EP_RX_ADDRESS(USB,EPindex), count); + } + + /*multi-packet on the NON control OUT endpoint */ + xfer->queued_len = (uint16_t)(xfer->queued_len + count); + + if ((count < 64) || (xfer->queued_len == xfer->total_len)) + { + /* RX COMPLETE */ + dcd_event_xfer_complete(0, EPindex, xfer->queued_len, XFER_RESULT_SUCCESS, true); + // Though the host could still send, we don't know. + // Does the bulk pipe need to be reset to valid to allow for a ZLP? + } + else + { + uint16_t remaining = (uint16_t)(xfer->total_len - xfer->queued_len); + if(remaining >=64) { + PCD_SET_EP_RX_CNT(USB, EPindex,64); + } else { + PCD_SET_EP_RX_CNT(USB, EPindex,remaining); + } + + PCD_SET_EP_RX_STATUS(USB, EPindex, USB_EP_RX_VALID); + } + + } /* if((wEPVal & EP_CTR_RX) */ + + if ((wEPVal & USB_EP_CTR_TX) != 0U) // IN + { + /* clear int flag */ + PCD_CLEAR_TX_EP_CTR(USB, EPindex); + + xfer_ctl_t * xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_IN); + + if (xfer->queued_len != xfer->total_len) // data remaining in transfer? + { + dcd_transmit_packet(xfer, EPindex); + } else { + dcd_event_xfer_complete(0, (uint8_t)(0x80 + EPindex), xfer->total_len, XFER_RESULT_SUCCESS, true); + } + } + } + } + return 0; +} + +void dcd_fs_irqHandler(void) { + + uint16_t int_status = USB->ISTR; + // unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | USB_ISTR_ESOF | USB_ISTR_L1REQ ) + + if (int_status & USB_ISTR_CTR) + { + /* servicing of the endpoint correct transfer interrupt */ + /* clear of the CTR flag into the sub */ + dcd_ep_ctr_handler(); + USB->ISTR &= ~USB_ISTR_CTR; + } + if(int_status & USB_ISTR_RESET) { + // USBRST is start of reset. + USB->ISTR &= ~USB_ISTR_RESET; + dcd_handle_bus_reset(); + dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true); + } + if (int_status & USB_ISTR_WKUP) + { + + USB->CNTR &= ~USB_CNTR_LPMODE; + USB->CNTR &= ~USB_CNTR_FSUSP; + USB->ISTR &= ~USB_ISTR_WKUP; + } + + if (int_status & USB_ISTR_SUSP) + { + /* Force low-power mode in the macrocell */ + USB->CNTR |= USB_CNTR_FSUSP; + USB->CNTR |= USB_CNTR_LPMODE; + + /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ + USB->ISTR &= ~USB_ISTR_SUSP; + } + + if(int_status & USB_ISTR_SOF) { + USB->ISTR &= ~USB_ISTR_SOF; + dcd_event_bus_signal(0, DCD_EVENT_SOF, true); + } +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ + +// The STM32F0 doesn't seem to like |= or &= to manipulate the EP#R registers, +// so I'm using the #define from HAL here, instead. + +bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) +{ + (void)rhport; + uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); + uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); + + // Isochronous not supported (yet), and some other driver assumptions. + TU_ASSERT(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); + TU_ASSERT(p_endpoint_desc->wMaxPacketSize.size <= MAX_PACKET_SIZE); + TU_ASSERT(epnum < MAX_EP_COUNT); + TU_ASSERT((p_endpoint_desc->wMaxPacketSize.size %2) == 0); + + // __IO uint16_t * const epreg = &(EPREG(epnum)); + + // Set type + switch(p_endpoint_desc->bmAttributes.xfer) { + case TUSB_XFER_CONTROL: + PCD_SET_EPTYPE(USB, epnum, USB_EP_CONTROL); break; + case TUSB_XFER_ISOCHRONOUS: + PCD_SET_EPTYPE(USB, epnum, USB_EP_ISOCHRONOUS); break; + case TUSB_XFER_BULK: + PCD_SET_EPTYPE(USB, epnum, USB_EP_BULK); break; + case TUSB_XFER_INTERRUPT: + PCD_SET_EPTYPE(USB, epnum, USB_EP_INTERRUPT); break; + default: + TU_ASSERT(false); + } + + PCD_SET_EP_ADDRESS(USB, epnum, epnum); + PCD_CLEAR_EP_KIND(USB,0); // Be normal, for now, instead of only accepting zero-byte packets + + if(dir == TUSB_DIR_IN) + { + *PCD_EP_TX_ADDRESS(USB, epnum) = ep_buf_ptr; + PCD_SET_EP_RX_CNT(USB, epnum, p_endpoint_desc->wMaxPacketSize.size); + PCD_CLEAR_TX_DTOG(USB, epnum); + PCD_SET_EP_TX_STATUS(USB,epnum,USB_EP_TX_NAK); + } + else + { + *PCD_EP_RX_ADDRESS(USB, epnum) = ep_buf_ptr; + PCD_SET_EP_RX_CNT(USB, epnum, p_endpoint_desc->wMaxPacketSize.size); + PCD_CLEAR_RX_DTOG(USB, epnum); + PCD_SET_EP_RX_STATUS(USB, epnum, USB_EP_RX_NAK); + } + + ep_buf_ptr = (uint16_t)(ep_buf_ptr + p_endpoint_desc->wMaxPacketSize.size); // increment buffer pointer + + return true; +} + +// Currently, single-buffered, and only 64 bytes at a time (max) + +static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix) +{ + uint16_t len = (uint16_t)(xfer->total_len - xfer->queued_len); + + if(len > 64u) // max packet size for FS transfer + { + len = 64u; + } + dcd_write_packet_memory(*PCD_EP_TX_ADDRESS(USB,ep_ix), &(xfer->buffer[xfer->queued_len]), len); + xfer->queued_len = (uint16_t)(xfer->queued_len + len); + + PCD_SET_EP_TX_CNT(USB,ep_ix,len); + PCD_SET_EP_TX_STATUS(USB, ep_ix, USB_EP_TX_VALID) +} + +bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) +{ + (void) rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + xfer_ctl_t * xfer = XFER_CTL_BASE(epnum,dir); + + xfer->buffer = buffer; + xfer->total_len = total_bytes; + xfer->queued_len = 0; + + if ( dir == TUSB_DIR_OUT ) + { + // A setup token can occur immediately after an OUT STATUS packet so make sure we have a valid + // buffer for the control endpoint. + if (epnum == 0 && buffer == NULL) + { + xfer->buffer = (uint8_t*)_setup_packet; + PCD_SET_EP_KIND(USB,0); // Expect a zero-byte INPUT + } + if(total_bytes > 64) + { + PCD_SET_EP_RX_CNT(USB,epnum,64); + } else { + PCD_SET_EP_RX_CNT(USB,epnum,total_bytes); + } + PCD_SET_EP_RX_STATUS(USB, epnum, USB_EP_RX_VALID); + } + else // IN + { + dcd_transmit_packet(xfer,epnum); + } + return true; +} + +void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) +{ + (void)rhport; + + if (ep_addr == 0) { // CTRL EP0 (OUT for setup) + PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_STALL); + } + + if (ep_addr & 0x80) { // IN + ep_addr &= 0x7F; + PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_STALL); + } else { // OUT + PCD_SET_EP_RX_STATUS(USB,ep_addr, USB_EP_RX_STALL); + } +} + +void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) +{ + (void)rhport; + if (ep_addr == 0) + { + PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_NAK); + } + + if (ep_addr & 0x80) + { // IN + ep_addr &= 0x7F; + + PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_NAK); + + /* Reset to DATA0 if clearing stall condition. */ + PCD_CLEAR_TX_DTOG(USB,ep_addr); + } + else + { // OUT + /* Reset to DATA0 if clearing stall condition. */ + PCD_CLEAR_RX_DTOG(USB,ep_addr); + + PCD_SET_EP_RX_STATUS(USB,ep_addr, USB_EP_RX_VALID); + } +} + +// Packet buffer access can only be 8- or 16-bit. +/** + * @brief Copy a buffer from user memory area to packet memory area (PMA). + * This uses byte-access for user memory (so support non-aligned buffers) + * and 16-bit access for packet memory. + * @param dst, but not necessary in system-memory addressing + * @param pbUsrBuf pointer to user memory area. + * @param wPMABufAddr address into PMA. + * @param wNBytes no. of bytes to be copied. + * @retval None + */ +static void dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes) +{ + uint32_t n = ((uint32_t)((uint32_t)wNBytes + 1U)) >> 1U; + uint32_t i; + uint16_t temp1, temp2; + const uint8_t * srcVal; + // The GCC optimizer will combine access to 32-bit sizes if we let it. Force + // it volatile so that it won't do that. + __IO uint16_t *pdwVal; + + srcVal = src; + pdwVal = (__IO uint16_t*)( ((uint8_t*)USB) + 0x400U + dst ); + + for (i = n; i != 0; i--) + { + temp1 = (uint16_t) *srcVal; + srcVal++; + temp2 = temp1 | ((uint16_t)((uint16_t) ((*srcVal) << 8U))) ; + *pdwVal++ = temp2; + srcVal++; + } +} + +/** + * @brief Copy a buffer from user memory area to packet memory area (PMA). + * Uses byte-access of system memory and 16-bit access of packet memory + * @param wNBytes no. of bytes to be copied. + * @retval None + */ +static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes) +{ + uint32_t n = (uint32_t)wNBytes >> 1U; + uint32_t i; + // The GCC optimizer will combine access to 32-bit sizes if we let it. Force + // it volatile so that it won't do that. + __IO const uint16_t *pdwVal; + uint32_t temp; + + pdwVal = (__IO uint16_t*)( ((uint8_t*)USB) + 0x400U + src ); + uint8_t *dstVal = (uint8_t*)dst; + + for (i = n; i != 0U; i--) + { + temp = *pdwVal++; + *dstVal++ = ((temp >> 0) & 0xFF); + *dstVal++ = ((temp >> 8) & 0xFF); + } + + if (wNBytes % 2) + { + temp = *pdwVal++; + *dstVal++ = ((temp >> 0) & 0xFF); + } +} + +#endif + diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h new file mode 100644 index 000000000..030635b8b --- /dev/null +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -0,0 +1,232 @@ +/** + ****************************************************************************** + * @file dcd_stm32f0_pvt_st.h + * @brief DCD utilities from ST code + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ *

© parts COPYRIGHT(c) N Conrad

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + **********/ + +// This file contains source copied from ST's HAL, and thus should have their copyright statement. + + +#ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ +#define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ + +/* SetENDPOINT */ +#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue)) +/* GetENDPOINT */ +#define PCD_GET_ENDPOINT(USBx, bEpNum) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))) +#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ + (((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType))) | USB_EP_CTR_RX | USB_EP_CTR_TX))) +#define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD) + +/** + * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ + PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK)) +#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ + PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK)) +/** + * @brief gets counter of the tx buffer. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval Counter value + */ +#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) +#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) + +/** + * @brief Sets counter of rx buffer with no. of blocks. + * @param dwReg Register + * @param wCount Counter. + * @param wNBlocks no. of Blocks. + * @retval None + */ +#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ + (wNBlocks) = (uint32_t)((wCount) >> 5U);\ + if(((wCount) & 0x1fU) == 0U)\ + { \ + (wNBlocks)--;\ + } \ + *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \ + }/* PCD_CALC_BLK32 */ + + +#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ + (wNBlocks) = (uint32_t)((wCount) >> 1U); \ + if(((wCount) & 0x1U) != 0U)\ + { \ + (wNBlocks)++;\ + } \ + *pdwReg = (uint16_t)((wNBlocks) << 10U);\ + }/* PCD_CALC_BLK2 */ + + +#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ + uint32_t wNBlocks;\ + if((wCount) > 62U) \ + { \ + PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \ + } \ + else \ + { \ + PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \ + } \ + }/* PCD_SET_EP_CNT_RX_REG */ + + + +/** + * @brief Sets address in an endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param bAddr Address. + * @retval None + */ +#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ + USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr)) + + +#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u)+ ((uint32_t)(USBx) + 0x400U))))) +#define PCD_EP_TX_CNT(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u+2u)+ ((uint32_t)(USBx) + 0x400U))))) + +#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u+4u)+ ((uint32_t)(USBx) + 0x400U))))) +#define PCD_EP_RX_CNT(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u+6u)+ ((uint32_t)(USBx) + 0x400U))))) + +#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) +#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\ + __IO uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \ + PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\ + } while(0) + +/** + * @brief sets the status for tx transfer (bits STAT_TX[1:0]). + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wState new state + * @retval None + */ +#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ + \ + _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\ + /* toggle first bit ? */ \ + if((USB_EPTX_DTOG1 & (wState))!= 0U)\ + { \ + _wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \ + } \ + /* toggle second bit ? */ \ + if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \ + { \ + _wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \ + } \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\ + } /* PCD_SET_EP_TX_STATUS */ + +/** + * @brief sets the status for rx transfer (bits STAT_TX[1:0]) + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wState new state + * @retval None + */ +#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ + register uint16_t _wRegVal; \ + \ + _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\ + /* toggle first bit ? */ \ + if((USB_EPRX_DTOG1 & (wState))!= 0U) \ + { \ + _wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \ + } \ + /* toggle second bit ? */ \ + if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \ + { \ + _wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \ + } \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ + } /* PCD_SET_EP_RX_STATUS */ + +/** + * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ + USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK))) +#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ + USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK))) + +/** + * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\ + { \ + PCD_RX_DTOG((USBx),(bEpNum));\ + } +#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\ + {\ + PCD_TX_DTOG((USBx),(bEpNum));\ + } + +/** + * @brief set & clear EP_KIND bit. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ + (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK)))) + +#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ + (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))) + + +#define EPREG(n) (((__IO uint16_t*)USB_BASE)[n*2]) + +#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \ + USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ ) + + +// PMA_LENGTH is PMA buffer size in bytes. + +#if defined(STM32F070xB) | defined(STM32F070x6) +#define PMA_LENGTH 1024 +#else +#error You are using an untested or unimplemented STM32 variant +#endif + +#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */ From d1976a30b3929911a99667625ebc332ea0745c16 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 16:14:38 -0400 Subject: [PATCH 13/35] Update F3 BSP and create F070RB BSP. Both are untested (but compile). --- hw/bsp/stm32f070rbnucleo/board.mk | 50 +++ .../stm32f070rbnucleo/stm32F070rbtx_flash.ld | 200 +++++++++++ hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c | 150 ++++++++ hw/bsp/stm32f070rbnucleo/stm32f0xx_hal_conf.h | 324 ++++++++++++++++++ hw/bsp/stm32f303disco/board.mk | 4 +- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 33 +- .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 31 +- 7 files changed, 774 insertions(+), 18 deletions(-) create mode 100644 hw/bsp/stm32f070rbnucleo/board.mk create mode 100644 hw/bsp/stm32f070rbnucleo/stm32F070rbtx_flash.ld create mode 100644 hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c create mode 100644 hw/bsp/stm32f070rbnucleo/stm32f0xx_hal_conf.h diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk new file mode 100644 index 000000000..5206a6f91 --- /dev/null +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -0,0 +1,50 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 \ + -DSTM32F070xB \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m4 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV + +ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver +ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/stm32f070rbnucleo/stm32F070rbtx_flash.ld + +SRC_C += \ + $(ST_CMSIS)/Source/Templates/system_stm32f0xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_gpio.c + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f070xb.s + +INC += \ + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) + +# For TinyUSB port source +VENDOR = st +CHIP_FAMILY = stm32_fsdev + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM4F + +# For flash-jlink target +JLINK_DEVICE = stm32f303vc +JLINK_IF = swd + +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI + +# flash target using on-board stlink +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32f070rbnucleo/stm32F070rbtx_flash.ld b/hw/bsp/stm32f070rbnucleo/stm32F070rbtx_flash.ld new file mode 100644 index 000000000..7ae8e5960 --- /dev/null +++ b/hw/bsp/stm32f070rbnucleo/stm32F070rbtx_flash.ld @@ -0,0 +1,200 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32F070RBTx Device from STM32F0 series +** 128Kbytes FLASH +** 16Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20004000; /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x400; /* required amount of heap */ +_Min_Stack_Size = 0x600; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c new file mode 100644 index 000000000..8f864f739 --- /dev/null +++ b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c @@ -0,0 +1,150 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" + +#include "stm32f0xx.h" +#include "stm32f0xx_hal_conf.h" + +#define LED_PORT GPIOC +#define LED_PIN GPIO_PIN_13 +#define LED_STATE_ON 1 + +#define BUTTON_PORT GPIOA +#define BUTTON_PIN GPIO_PIN_5 +#define BUTTON_STATE_ACTIVE 1 + +void board_init(void) +{ + #if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + #endif + + /* Configure the system clock to 48 MHz */ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /* Enable HSE Oscillator and activate PLL with 8 MHz HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + (void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1); + + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + (void)HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ; + + // Notify runtime of frequency change. + SystemCoreClockUpdate(); + + // LED + __HAL_RCC_GPIOC_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + // Button + __HAL_RCC_GPIOA_CLK_ENABLE(); + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +void HardFault_Handler (void) +{ + asm("bkpt"); +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/stm32f070rbnucleo/stm32f0xx_hal_conf.h b/hw/bsp/stm32f070rbnucleo/stm32f0xx_hal_conf.h new file mode 100644 index 000000000..7e3721afc --- /dev/null +++ b/hw/bsp/stm32f070rbnucleo/stm32f0xx_hal_conf.h @@ -0,0 +1,324 @@ +/** + ****************************************************************************** + * @file GPIO/GPIO_IOToggle/Inc/stm32f3xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F0xx_HAL_CONF_H +#define __STM32F0xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_CEC_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_UART_MODULE_ENABLED */ +#define HAL_USART_MODULE_ENABLED +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_EXTI_MODULE_ENABLED */ +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +/** + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value + */ +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value + */ +#if !defined (HSI_STARTUP_TIMEOUT) + #define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */ +#endif /* HSI_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator for ADC (HSI14) value. + */ +#if !defined (HSI14_VALUE) +#define HSI14_VALUE ((uint32_t)14000000) /*!< Value of the Internal High Speed oscillator for ADC in Hz. + The real value may vary depending on the variations + in voltage and temperature. */ +#endif /* HSI14_VALUE */ + +/** + * @brief Internal High Speed oscillator for USB (HSI48) value. + */ +#if !defined (HSI48_VALUE) +#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal High Speed oscillator for USB in Hz. + The real value may vary depending on the variations + in voltage and temperature. */ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSI) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ + /* Warning: Must be set to higher priority for HAL_Delay() */ + /* and HAL_GetTick() usage under interrupt context */ +#define USE_RTOS 0 +#define PREFETCH_ENABLE 1 +#define INSTRUCTION_CACHE_ENABLE 0 +#define DATA_CACHE_ENABLE 0 +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ + #define USE_FULL_ASSERT 1U + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f0xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f0xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f0xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f0xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f0xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f0xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f0xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f0xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32f0xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f0xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f0xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f0xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f0xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f0xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f0xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f0xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f0xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f0xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f0xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f0xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32f0xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f0xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f0xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32f0xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f0xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f0xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f0xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F0xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index d1421f26d..718ff27a3 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -7,7 +7,7 @@ CFLAGS += \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F3 + -DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F3xx_HAL_Driver ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F3xx @@ -33,7 +33,7 @@ INC += \ # For TinyUSB port source VENDOR = st -CHIP_FAMILY = stm32f3 +CHIP_FAMILY = stm32_fsdev # For freeRTOS port source FREERTOS_PORT = ARM_CM4F diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 170a291e3..2411c1c37 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -99,9 +99,7 @@ #undef USE_HAL_DRIVER #include "device/dcd.h" -#include "stm32f0xx.h" #include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h" -#include "uart_util.h" /***************************************************** @@ -120,7 +118,7 @@ #endif #ifndef DCD_STM32_BTABLE_LENGTH -# define DCD_STM32_BTABLE_LENGTH (DCD_STM32_BTABLE_LENGTH - DCD_STM32_BTABLE_BASE) +# define DCD_STM32_BTABLE_LENGTH (PMA_LENGTH - DCD_STM32_BTABLE_BASE) #endif /*************************************************** @@ -131,7 +129,7 @@ # error Only 8 endpoints supported on the hardware #endif -#if ((BTABLE_BASE + BTABLE_LENGTH)>PMA_LENGTH) +#if ((DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH)>PMA_LENGTH) # error BTABLE does not fit in PMA RAM #endif @@ -157,10 +155,11 @@ static uint8_t newDADDR; // Used to set the new device address during the CTR IR // EP Buffers assigned from end of memory location, to minimize their chance of crashing // into the stack. static uint16_t ep_buf_ptr; -static void dcd_handle_bus_reset(); +static void dcd_handle_bus_reset(void); static void dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes); static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes); static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix); +static uint16_t dcd_ep_ctr_handler(void); void dcd_init (uint8_t rhport) { @@ -218,15 +217,35 @@ void dcd_init (uint8_t rhport) void dcd_int_enable (uint8_t rhport) { (void)rhport; +#if defined(STM32F0) NVIC_SetPriority(USB_IRQn, 0); NVIC_EnableIRQ(USB_IRQn); +#elif defined(STM32F3) +#warning need to check these since the F3 can have its USB interrupts remapped. + NVIC_SetPriority(USB_HP_CAN_TX_IRQn, 0); + NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0); + NVIC_SetPriority(USBWakeUp_IRQn, 0); + NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn); + NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); + NVIC_EnableIRQ(USBWakeUp_IRQn); + +#endif } // Disable device interrupt void dcd_int_disable(uint8_t rhport) { (void)rhport; +#if defined(STM32F0) NVIC_DisableIRQ(USB_IRQn); +#elif defined(STM32F3) +#warning need to check these since the F3 can have its USB interrupts remapped. + NVIC_DisableIRQ(USB_HP_CAN_TX_IRQn); + NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn); + NVIC_DisableIRQ(USBWakeUp_IRQn); +#else +#error Unknown arch in USB driver +#endif } // Receive Set Address request, mcu port must also include status IN response @@ -277,7 +296,7 @@ static const tusb_desc_endpoint_t ep0IN_desc = #pragma GCC diagnostic pop -static void dcd_handle_bus_reset() +static void dcd_handle_bus_reset(void) { //__IO uint16_t * const epreg = &(EPREG(0)); USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag @@ -297,7 +316,7 @@ static void dcd_handle_bus_reset() } // FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed. -static uint16_t dcd_ep_ctr_handler() +static uint16_t dcd_ep_ctr_handler(void) { uint16_t count=0U; uint8_t EPindex; diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 030635b8b..a6fccfd53 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -35,6 +35,21 @@ // This file contains source copied from ST's HAL, and thus should have their copyright statement. +// PMA_LENGTH is PMA buffer size in bytes. + +#if defined(STM32F070xB) | defined(STM32F070x6) +#include "stm32f0xx.h" +#define PMA_LENGTH 1024 +#elif defined(STM32F303xB) | defined(STM32F303xC) +#warning STM32F3 platform is untested. +#include "stm32f3xx.h" +#define PMA_LENGTH 512 +#else +#error You are using an untested or unimplemented STM32 variant +#endif + + + #ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ #define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ @@ -217,16 +232,14 @@ #define EPREG(n) (((__IO uint16_t*)USB_BASE)[n*2]) -#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \ - USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ ) - - -// PMA_LENGTH is PMA buffer size in bytes. - -#if defined(STM32F070xB) | defined(STM32F070x6) -#define PMA_LENGTH 1024 +#if defined(USB_ISTR_L1REQ) +#define USB_ISTR_L1REQ_FORCED USB_ISTR_L1REQ #else -#error You are using an untested or unimplemented STM32 variant +#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U) #endif +#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \ + USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED ) + + #endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */ From f7b0aeec523577d2ab5b3d486124979e093f5a45 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 19:20:26 -0400 Subject: [PATCH 14/35] Start clock on F0 and F0, and handle USB interrupts. --- hw/bsp/stm32f070rbnucleo/board.mk | 2 +- hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c | 8 +++++ hw/bsp/stm32f303disco/stm32f303disco.c | 29 +++++++++++++++++++ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 8 +++-- 4 files changed, 44 insertions(+), 3 deletions(-) diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk index 5206a6f91..a278b7b91 100644 --- a/hw/bsp/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -3,7 +3,7 @@ CFLAGS += \ -DSTM32F070xB \ -mthumb \ -mabi=aapcs-linux \ - -mcpu=cortex-m4 \ + -mcpu=cortex-m0 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV diff --git a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c index 8f864f739..9f3dd30dc 100644 --- a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c +++ b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c @@ -91,6 +91,14 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + // Start USB clock + __HAL_RCC_USB_CLK_ENABLE(); +} + +void dcd_fs_irqHandler(void); +void USB_IRQHandler(void) +{ + dcd_fs_irqHandler(); } //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index 45ba7a4f9..e8a647a99 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -86,6 +86,10 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + + // Start USB clock + __HAL_RCC_USB_CLK_ENABLE(); + #if 0 RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN; @@ -105,6 +109,31 @@ void board_init(void) #endif } +// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP) +// FIXME: Do all three need to be handled, or just the LP one? +void dcd_fs_irqHandler(void); +// USB high-priority interrupt (Channel 19): Triggered only by a correct +// transfer event for isochronous and double-buffer bulk transfer to reach +// the highest possible transfer rate. +void USB_HP_CAN_TX_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} + +// USB low-priority interrupt (Channel 20): Triggered by all USB events +// (Correct transfer, USB reset, etc.). The firmware has to check the +// interrupt source before serving the interrupt. +void USB_LP_CAN_RX0_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} +// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB +// Suspend mode. +void USBWakeUp_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} + //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 2411c1c37..8f809b6a7 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -125,14 +125,18 @@ * Checks, structs, defines, function definitions, etc. */ -#if (MAX_EP_COUNT > 8) +#if ((MAX_EP_COUNT) > 8) # error Only 8 endpoints supported on the hardware #endif -#if ((DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH)>PMA_LENGTH) +#if (((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))>(PMA_LENGTH)) # error BTABLE does not fit in PMA RAM #endif +#if (((DCD_STM32_BTABLE_BASE) % 8) != 0) +// per STM32F3 reference manual +#error BTABLE must be aligned to 8 bytes +#endif // Max size of a USB FS packet is 64... #define MAX_PACKET_SIZE 64 From 532abadb78e61f5ee8292f4e276f0ad1aae7d70a Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 19:21:29 -0400 Subject: [PATCH 15/35] Ignore build artifact files. --- .gitignore | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitignore b/.gitignore index e44eb8dc7..9864ea6be 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,5 @@ html latex -test/_build *.d *.o *.P @@ -14,4 +13,5 @@ test/_build .env /examples/*/*/build-* test_old/ -tests_obsolete/ \ No newline at end of file +tests_obsolete/ +_build From 8f3c0663adda2067a63157f132345daea9507f38 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Mon, 9 Sep 2019 19:40:08 -0400 Subject: [PATCH 16/35] Set MSC DISK DUAL readonly on F070. --- examples/device/msc_dual_lun/src/msc_disk_dual.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c index 4baf13fc5..faa90ee7b 100644 --- a/examples/device/msc_dual_lun/src/msc_disk_dual.c +++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c @@ -31,7 +31,7 @@ // Some MCU doesn't have enough 8KB SRAM to store the whole disk // We will use Flash as read-only disk // - LPC1347, LPC11uxx -#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) +#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || defined(STM32F070xB) #define DISK_READONLY #endif From bc2a65b20bce8f81ccc4a6ef645946d9c26d2083 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Tue, 10 Sep 2019 01:03:24 -0400 Subject: [PATCH 17/35] A few bug fixes, remove the unstested device notices, note supported boards in READMEs, and implement PMA access stride (used on MCU's with 512 byte USB buffers). --- README.md | 2 +- docs/boards.md | 2 +- src/common/tusb_common.h | 2 +- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 78 +++++++++++----- .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 89 ++++++++++++++----- 5 files changed, 123 insertions(+), 50 deletions(-) diff --git a/README.md b/README.md index f2b687714..7e998f248 100644 --- a/README.md +++ b/README.md @@ -55,7 +55,7 @@ The stack supports the following MCUs - **Nordic:** nRF52840 - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC18xx, LPC40xx, LPC43xx, LPC51Uxx - **MicroChip:** SAMD21, SAMD51 (device only) -- **ST:** STM32F4, STM32H7 (device only) +- **ST:** STM32F070xB, STM32F4, STM32H7 (device only) [Here is the list of supported Boards](docs/boards.md) diff --git a/docs/boards.md b/docs/boards.md index ef7f7a6fb..d3509c084 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -39,7 +39,7 @@ This code base already had supported for a handful of following boards - [Adafruit Metro M4 Express](https://www.adafruit.com/product/3382) ### ST STM32 - +- [STM32F070RB Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f070rb.html) - [STM32F407g Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) - [STM32F411e Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) - [STM32F412g Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index c62a04128..4f0105d13 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -89,7 +89,7 @@ static inline uint32_t tu_u32(uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4) static inline uint16_t tu_u16(uint8_t high, uint8_t low) { - return (((uint16_t) high) << 8) + low; + return (uint16_t)((((uint16_t) high) << 8) + low); } static inline uint8_t tu_u16_high(uint16_t u16) { return (uint8_t) (((uint16_t) (u16 >> 8)) & 0x00ff); } diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 8f809b6a7..2b4eea4cb 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -29,11 +29,17 @@ */ /********************************************** - * This driver should work with minimal for the ST Micro "USB A" peripheral. This - * covers: + * This driver has been tested with the following MCUs: + * + * + * STM32F070RB + * + * + * It also should work with minimal changes for any ST MCU with an "USB A" peripheral. This + * covers: * * F04x, F072, F078, 070x6/B 1024 byte buffer - * F102, F103 512 byte buffer; no internal D+ pull-up + * F102, F103 512 byte buffer; no internal D+ pull-up (maybe many more changes?) * F302xB/C, F303xB/C, F373 512 byte buffer; no internal D+ pull-up * F302x6/8, F302xD/E2, F303xD/E 1024 byte buffer; no internal D+ pull-up * L0x2, L0x3 1024 byte buffer @@ -70,6 +76,11 @@ * - Minimal error handling * - Perhaps error interrupts sholud be reported to the stack, or cause a device reset? * - Assumes a single USB peripheral; I think that no hardware has multiple so this is fine. + * - Add a callback for enabling/disabling the D+ PU on devices without an internal PU. + * - F3 models use three separate interrupts. I think we could only use the LP interrupt for + * everything? However, the interrupts are configurable so the DisableInt and EnableInt + * below functions could be adjusting the wrong interrupts (if they had been reconfigured) + * - LPM is not used correctly, or at all? * * USB documentation and Reference implementations * - STM32 Reference manuals @@ -92,7 +103,7 @@ #include "tusb_option.h" -#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32_FSDEV +#if (TUSB_OPT_DEVICE_ENABLED) && ((CFG_TUSB_MCU) == (OPT_MCU_STM32_FSDEV)) // In order to reduce the dependance on HAL, we undefine this. // Some definitions are copied to our private include file. @@ -137,6 +148,7 @@ // per STM32F3 reference manual #error BTABLE must be aligned to 8 bytes #endif + // Max size of a USB FS packet is 64... #define MAX_PACKET_SIZE 64 @@ -204,17 +216,21 @@ void dcd_init (uint8_t rhport) // Initialize the BTABLE for EP0 at this point (though setting up the EP0R is unneeded) // This is actually not necessary, but helps debugging to start with a blank RAM area - for(uint16_t i=0;i<(PMA_LENGTH>>1); i++) + for(uint16_t i=0;i<(DCD_STM32_BTABLE_LENGTH>>1); i++) { - ((uint16_t*)USB_PMAADDR)[DCD_STM32_BTABLE_BASE + i] = 0u; + pma[PMA_STRIDE*(DCD_STM32_BTABLE_BASE + i)] = 0u; } USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_SOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM; dcd_handle_bus_reset(); + // And finally enable pull-up, which may trigger the RESET IRQ if the host is connected. // (if this MCU has an internal pullup) #if defined(USB_BCDR_DPPU) USB->BCDR |= USB_BCDR_DPPU; +#else + // FIXME: callback to the user to ask them to twiddle a GPIO to disable/enable D+??? #endif + } // Enable device interrupt @@ -225,14 +241,12 @@ void dcd_int_enable (uint8_t rhport) NVIC_SetPriority(USB_IRQn, 0); NVIC_EnableIRQ(USB_IRQn); #elif defined(STM32F3) -#warning need to check these since the F3 can have its USB interrupts remapped. NVIC_SetPriority(USB_HP_CAN_TX_IRQn, 0); NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0); NVIC_SetPriority(USBWakeUp_IRQn, 0); NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn); NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn); NVIC_EnableIRQ(USBWakeUp_IRQn); - #endif } @@ -243,7 +257,6 @@ void dcd_int_disable(uint8_t rhport) #if defined(STM32F0) NVIC_DisableIRQ(USB_IRQn); #elif defined(STM32F3) -#warning need to check these since the F3 can have its USB interrupts remapped. NVIC_DisableIRQ(USB_HP_CAN_TX_IRQn); NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn); NVIC_DisableIRQ(USBWakeUp_IRQn); @@ -311,7 +324,7 @@ static void dcd_handle_bus_reset(void) EPREG(0) = 0u; } - ep_buf_ptr = 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each) + ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each) dcd_edpt_open (0, &ep0OUT_desc); dcd_edpt_open (0, &ep0IN_desc); newDADDR = 0; @@ -386,7 +399,7 @@ static uint16_t dcd_ep_ctr_handler(void) /* Get SETUP Packet*/ count = PCD_GET_EP_RX_CNT(USB, EPindex); //TU_ASSERT_ERR(count == 8); - dcd_read_packet_memory(userMemBuf, *PCD_EP_RX_ADDRESS(USB,EPindex), 8); + dcd_read_packet_memory(userMemBuf, *PCD_EP_RX_ADDRESS_PTR(USB,EPindex), 8); /* SETUP bit kept frozen while CTR_RX = 1*/ dcd_event_setup_received(0, (uint8_t*)userMemBuf, true); PCD_CLEAR_RX_EP_CTR(USB, EPindex); @@ -401,7 +414,7 @@ static uint16_t dcd_ep_ctr_handler(void) if (count != 0U) { - dcd_read_packet_memory(xfer->buffer, *PCD_EP_RX_ADDRESS(USB,EPindex), count); + dcd_read_packet_memory(xfer->buffer, *PCD_EP_RX_ADDRESS_PTR(USB,EPindex), count); xfer->queued_len = (uint16_t)(xfer->queued_len + count); } @@ -440,7 +453,7 @@ static uint16_t dcd_ep_ctr_handler(void) if (count != 0U) { dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), - *PCD_EP_RX_ADDRESS(USB,EPindex), count); + *PCD_EP_RX_ADDRESS_PTR(USB,EPindex), count); } /*multi-packet on the NON control OUT endpoint */ @@ -568,14 +581,14 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc if(dir == TUSB_DIR_IN) { - *PCD_EP_TX_ADDRESS(USB, epnum) = ep_buf_ptr; + *PCD_EP_TX_ADDRESS_PTR(USB, epnum) = ep_buf_ptr; PCD_SET_EP_RX_CNT(USB, epnum, p_endpoint_desc->wMaxPacketSize.size); PCD_CLEAR_TX_DTOG(USB, epnum); PCD_SET_EP_TX_STATUS(USB,epnum,USB_EP_TX_NAK); } else { - *PCD_EP_RX_ADDRESS(USB, epnum) = ep_buf_ptr; + *PCD_EP_RX_ADDRESS_PTR(USB, epnum) = ep_buf_ptr; PCD_SET_EP_RX_CNT(USB, epnum, p_endpoint_desc->wMaxPacketSize.size); PCD_CLEAR_RX_DTOG(USB, epnum); PCD_SET_EP_RX_STATUS(USB, epnum, USB_EP_RX_NAK); @@ -596,11 +609,11 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix) { len = 64u; } - dcd_write_packet_memory(*PCD_EP_TX_ADDRESS(USB,ep_ix), &(xfer->buffer[xfer->queued_len]), len); + dcd_write_packet_memory(*PCD_EP_TX_ADDRESS_PTR(USB,ep_ix), &(xfer->buffer[xfer->queued_len]), len); xfer->queued_len = (uint16_t)(xfer->queued_len + len); PCD_SET_EP_TX_CNT(USB,ep_ix,len); - PCD_SET_EP_TX_STATUS(USB, ep_ix, USB_EP_TX_VALID) + PCD_SET_EP_TX_STATUS(USB, ep_ix, USB_EP_TX_VALID); } bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) @@ -687,8 +700,8 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) * @brief Copy a buffer from user memory area to packet memory area (PMA). * This uses byte-access for user memory (so support non-aligned buffers) * and 16-bit access for packet memory. - * @param dst, but not necessary in system-memory addressing - * @param pbUsrBuf pointer to user memory area. + * @param dst, byte address in PMA; must be 16-bit aligned + * @param src pointer to user memory area. * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None @@ -699,19 +712,27 @@ static void dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si uint32_t i; uint16_t temp1, temp2; const uint8_t * srcVal; + +#ifdef DEBUG + if(((dst%2) != 0) || + (dst < DCD_STM32_BTABLE_BASE) || + dst >= (DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH)) + while(1) TU_BREAKPOINT(); +#endif // The GCC optimizer will combine access to 32-bit sizes if we let it. Force // it volatile so that it won't do that. __IO uint16_t *pdwVal; srcVal = src; - pdwVal = (__IO uint16_t*)( ((uint8_t*)USB) + 0x400U + dst ); + pdwVal = &pma[PMA_STRIDE*(dst>>1)]; for (i = n; i != 0; i--) { temp1 = (uint16_t) *srcVal; srcVal++; temp2 = temp1 | ((uint16_t)((uint16_t) ((*srcVal) << 8U))) ; - *pdwVal++ = temp2; + *pdwVal = temp2; + pdwVal += PMA_STRIDE; srcVal++; } } @@ -731,19 +752,28 @@ static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN __IO const uint16_t *pdwVal; uint32_t temp; - pdwVal = (__IO uint16_t*)( ((uint8_t*)USB) + 0x400U + src ); +#ifdef DEBUG + if((src%2) != 0 || + (src < DCD_STM32_BTABLE_BASE) || + src >= (DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH)) + while(1) TU_BREAKPOINT(); +#endif + + pdwVal = &pma[PMA_STRIDE*(src>>1)]; uint8_t *dstVal = (uint8_t*)dst; for (i = n; i != 0U; i--) { - temp = *pdwVal++; + temp = *pdwVal; + pdwVal += PMA_STRIDE; *dstVal++ = ((temp >> 0) & 0xFF); *dstVal++ = ((temp >> 8) & 0xFF); } if (wNBytes % 2) { - temp = *pdwVal++; + temp = *pdwVal; + pdwVal += PMA_STRIDE; *dstVal++ = ((temp >> 0) & 0xFF); } } diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index a6fccfd53..27b8920a3 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -34,25 +34,65 @@ // This file contains source copied from ST's HAL, and thus should have their copyright statement. - // PMA_LENGTH is PMA buffer size in bytes. - -#if defined(STM32F070xB) | defined(STM32F070x6) -#include "stm32f0xx.h" -#define PMA_LENGTH 1024 -#elif defined(STM32F303xB) | defined(STM32F303xC) -#warning STM32F3 platform is untested. -#include "stm32f3xx.h" -#define PMA_LENGTH 512 -#else -#error You are using an untested or unimplemented STM32 variant -#endif - - +// On 512-byte devices, access with a stride of two words (use every other 16-bit address) +// On 1024-byte devices, access with a stride of one word (use every 16-bit address) #ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ #define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ +#if defined(STM32F042x6) | \ + defined(STM32F070x6) | defined(STM32F070xB) | \ + defined(STM32F072xB) | \ + defined(STM32F078xx) +#include "stm32f0xx.h" +#define PMA_LENGTH 1024 +// F0x2 models are crystal-less +// All have internal D+ pull-up +// 070RB: 2 x 16 bits/word memory LPM Support, BCD Support +// PMA dedicated to USB (no sharing with CAN) +#elif defined(STM32F102x6) | defined(STM32F102x6) | \ + defined(STM32F103x6) | defined(STM32F103xB) | \ + defined(STM32F103xE) | defined(STM32F103xB) +#include "stm32f1xx.h" +#define PMA_LENGTH 512u +// NO internal Pull-ups +// *B, and *C: 2 x 16 bits/word +#error The F102/F103 driver is expected not to work, but it might? Try it? + +#elif defined(STM32F302xB) | defined(STM32F302xC) | \ + defined(STM32F303xB) | defined(STM32F303xC) | \ //good + defined(STM32F373xC) +#include "stm32f3xx.h" +#define PMA_LENGTH 512u +// NO internal Pull-ups +// *B, and *C: 1 x 16 bits/word +// PMA dedicated to USB (no sharing with CAN) +#elif defined(STM32F302x6) | defined(STM32F302x8) | \ + defined(STM32F302xD) | defined(STM32F302xE) | \ + defined(STM32F303xD) | defined(STM32F303xE) | \ //good +#include "stm32f3xx.h" +#define PMA_LENGTH 1024u +// NO internal Pull-ups +// *6, *8, *D, and *E: 2 x 16 bits/word LPM Support +// When CAN clock is enabled, USB can use first 768 bytes ONLY. +#else +#error You are using an untested or unimplemented STM32 variant. Please update the driver. +// This includes for L0x2, L0x3, L1, L4x2 and L4x3 +#endif + +// For purposes of accessing the packet +#if ((PMA_LENGTH) == 512u) +# define PMA_STRIDE (2u) +#elif ((PMA_LENGTH) == 1024u) +# define PMA_STRIDE (1u) +#endif + +// And for type-safety create a new macro for the volatile address of PMAADDR +// The compiler should warn us if we cast it to a non-volatile type? +// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden) +static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR; + /* SetENDPOINT */ #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue)) /* GetENDPOINT */ @@ -77,8 +117,8 @@ * @param bEpNum Endpoint Number. * @retval Counter value */ -#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) -#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) +#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT_PTR((USBx), (bEpNum))) & 0x3ffU) +#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT_PTR((USBx), (bEpNum))) & 0x3ffU) /** * @brief Sets counter of rx buffer with no. of blocks. @@ -131,16 +171,18 @@ #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr)) +#define PCD_BTABLE_WORD_PTR(USBx,x) (&(pma[PMA_STRIDE*((((USBx)->BTABLE)>>1) + x)])) -#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u)+ ((uint32_t)(USBx) + 0x400U))))) -#define PCD_EP_TX_CNT(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u+2u)+ ((uint32_t)(USBx) + 0x400U))))) +// Pointers to the PMA table entries (using the ARM address space) +#define PCD_EP_TX_ADDRESS_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 0u)) +#define PCD_EP_TX_CNT_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 1u)) -#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u+4u)+ ((uint32_t)(USBx) + 0x400U))))) -#define PCD_EP_RX_CNT(USBx, bEpNum) ((__IO uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8u+6u)+ ((uint32_t)(USBx) + 0x400U))))) +#define PCD_EP_RX_ADDRESS_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 2u)) +#define PCD_EP_RX_CNT_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 3u)) -#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) +#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT_PTR((USBx), (bEpNum)) = (wCount)) #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\ - __IO uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \ + __IO uint16_t *pdwReg =PCD_EP_RX_CNT_PTR((USBx),(bEpNum)); \ PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\ } while(0) @@ -232,8 +274,9 @@ #define EPREG(n) (((__IO uint16_t*)USB_BASE)[n*2]) +// This checks if the device has "LPM" #if defined(USB_ISTR_L1REQ) -#define USB_ISTR_L1REQ_FORCED USB_ISTR_L1REQ +#define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ) #else #define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U) #endif From 49c58be4ce2cc55bfc09feebc1307ef3390ebb6f Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Tue, 10 Sep 2019 01:31:14 -0400 Subject: [PATCH 18/35] Fix silly typo in the F3xx support. --- src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 27b8920a3..1e3c90b6d 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -61,7 +61,7 @@ #error The F102/F103 driver is expected not to work, but it might? Try it? #elif defined(STM32F302xB) | defined(STM32F302xC) | \ - defined(STM32F303xB) | defined(STM32F303xC) | \ //good + defined(STM32F303xB) | defined(STM32F303xC) | \ defined(STM32F373xC) #include "stm32f3xx.h" #define PMA_LENGTH 512u @@ -70,7 +70,7 @@ // PMA dedicated to USB (no sharing with CAN) #elif defined(STM32F302x6) | defined(STM32F302x8) | \ defined(STM32F302xD) | defined(STM32F302xE) | \ - defined(STM32F303xD) | defined(STM32F303xE) | \ //good + defined(STM32F303xD) | defined(STM32F303xE) | \ #include "stm32f3xx.h" #define PMA_LENGTH 1024u // NO internal Pull-ups From 2cf2f35fa30a4e29582a88a2d5b070dd9e2c0752 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Tue, 10 Sep 2019 08:28:56 -0400 Subject: [PATCH 19/35] Correct JLINK_DEVICE and FREERTOS_PORT in F070RB make file. FreeRTOS and j-link are untested. --- hw/bsp/stm32f070rbnucleo/board.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk index a278b7b91..b8044acc2 100644 --- a/hw/bsp/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -36,10 +36,10 @@ VENDOR = st CHIP_FAMILY = stm32_fsdev # For freeRTOS port source -FREERTOS_PORT = ARM_CM4F +FREERTOS_PORT = ARM_CM0 # For flash-jlink target -JLINK_DEVICE = stm32f303vc +JLINK_DEVICE = stm32f070rb JLINK_IF = swd # Path to STM32 Cube Programmer CLI, should be added into system path From 65e72de7ce0209683896393d982448088f7609d8 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Tue, 10 Sep 2019 09:35:52 -0400 Subject: [PATCH 20/35] Move interrupt handler into device driver, and rename the OPT_MCU_STM32 constants. --- hw/bsp/stm32f070rbnucleo/board.mk | 2 +- hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c | 6 -- hw/bsp/stm32f303disco/board.mk | 2 +- hw/bsp/stm32f303disco/stm32f303disco.c | 25 -------- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 64 ++++++++++++++++++- src/tusb_option.h | 22 ++++++- 6 files changed, 86 insertions(+), 35 deletions(-) diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk index b8044acc2..a9fca5f8d 100644 --- a/hw/bsp/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -6,7 +6,7 @@ CFLAGS += \ -mcpu=cortex-m0 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV + -DCFG_TUSB_MCU=OPT_MCU_STM32F0x0 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx diff --git a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c index 9f3dd30dc..50f174b34 100644 --- a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c +++ b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c @@ -95,12 +95,6 @@ void board_init(void) __HAL_RCC_USB_CLK_ENABLE(); } -void dcd_fs_irqHandler(void); -void USB_IRQHandler(void) -{ - dcd_fs_irqHandler(); -} - //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index 718ff27a3..7a1899a18 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -7,7 +7,7 @@ CFLAGS += \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV + -DCFG_TUSB_MCU=OPT_MCU_STM32F3x3 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F3xx_HAL_Driver ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F3xx diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index e8a647a99..509110d7d 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -109,31 +109,6 @@ void board_init(void) #endif } -// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP) -// FIXME: Do all three need to be handled, or just the LP one? -void dcd_fs_irqHandler(void); -// USB high-priority interrupt (Channel 19): Triggered only by a correct -// transfer event for isochronous and double-buffer bulk transfer to reach -// the highest possible transfer rate. -void USB_HP_CAN_TX_IRQHandler(void) -{ - dcd_fs_irqHandler(); -} - -// USB low-priority interrupt (Channel 20): Triggered by all USB events -// (Correct transfer, USB reset, etc.). The firmware has to check the -// interrupt source before serving the interrupt. -void USB_LP_CAN_RX0_IRQHandler(void) -{ - dcd_fs_irqHandler(); -} -// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB -// Suspend mode. -void USBWakeUp_IRQHandler(void) -{ - dcd_fs_irqHandler(); -} - //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 2b4eea4cb..5e8226563 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -103,7 +103,18 @@ #include "tusb_option.h" -#if (TUSB_OPT_DEVICE_ENABLED) && ((CFG_TUSB_MCU) == (OPT_MCU_STM32_FSDEV)) +#if (TUSB_OPT_DEVICE_ENABLED) && ( \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x1)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x2)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x3)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x3)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x4)) \ + ) // In order to reduce the dependance on HAL, we undefine this. // Some definitions are copied to our private include file. @@ -778,5 +789,56 @@ static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN } } + +// Interrupt handlers +#if ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2)) +void USB_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} + +#elif ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) +void USB_HP_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} +void USB_LP_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} +void USBWakeUp_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} +#elif((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) +// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP) +// FIXME: Do all three need to be handled, or just the LP one? +// USB high-priority interrupt (Channel 19): Triggered only by a correct +// transfer event for isochronous and double-buffer bulk transfer to reach +// the highest possible transfer rate. +void USB_HP_CAN_TX_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} + +// USB low-priority interrupt (Channel 20): Triggered by all USB events +// (Correct transfer, USB reset, etc.). The firmware has to check the +// interrupt source before serving the interrupt. +void USB_LP_CAN_RX0_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} +// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB +// Suspend mode. +void USBWakeUp_IRQHandler(void) +{ + dcd_fs_irqHandler(); +} +#else +#error Which IRQ handler do you need? +#endif + #endif diff --git a/src/tusb_option.h b/src/tusb_option.h index 0cd462ed1..9ca4fc56f 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -51,9 +51,29 @@ #define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21 #define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51 +// ST Synopsis OTG devices #define OPT_MCU_STM32F4 300 ///< ST STM32F4 -#define OPT_MCU_STM32_FSDEV 301 ///< ST STM32F3 #define OPT_MCU_STM32H7 302 ///< ST STM32H7 +// ST FSDEV Devices +#define OPT_MCU_STM32F0x0 330 ///< ST STM32F0x0 +#define OPT_MCU_STM32F0x2 331 ///< ST STM32F0x2 +#define OPT_MCU_STM32F0x8 332 ///< ST STM32F0x8 +#define OPT_MCU_STM32F1x2 333 ///< ST STM32F1x2 +#define OPT_MCU_STM32F1x3 334 ///< ST STM32F1x3 +#define OPT_MCU_STM32F3x2 335 ///< ST STM32F3x2 +#define OPT_MCU_STM32F3x3 336 ///< ST STM32F3x3 +#define OPT_MCU_STM32L0x1 337 ///< ST STM32L3x1 +#define OPT_MCU_STM32L0x2 338 ///< ST STM32L3x2 +#define OPT_MCU_STM32L1x0 339 ///< ST STM32L1x0 +#define OPT_MCU_STM32L1x1 340 ///< ST STM32L1x1 +#define OPT_MCU_STM32L1x2 341 ///< ST STM32L1x2 +#define OPT_MCU_STM32L4x2 342 ///< ST STM32L4x2 +#define OPT_MCU_STM32L4x3 343 ///< ST STM32L4x3 +#define OPT_MCU_STM32G4x1 344 ///< ST STM32G4x1 +#define OPT_MCU_STM32G4x3 345 ///< ST STM32G4x3 +#define OPT_MCU_STM32G4x4 346 ///< ST STM32G4x4 + + /** @} */ From 23d39f2b15807f3f2fe295f0d0da469e9535d202 Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Tue, 10 Sep 2019 12:13:36 -0400 Subject: [PATCH 21/35] Remove OPT_MCU_STM for L and G series. --- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 15 ++++----------- .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 2 +- src/tusb_option.h | 11 ----------- 3 files changed, 5 insertions(+), 23 deletions(-) diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 5e8226563..389acb176 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -35,7 +35,7 @@ * STM32F070RB * * - * It also should work with minimal changes for any ST MCU with an "USB A" peripheral. This + * It also should work with minimal changes for any ST MCU with an "USB A"/"PCD"/"HCD" peripheral. This * covers: * * F04x, F072, F078, 070x6/B 1024 byte buffer @@ -44,7 +44,7 @@ * F302x6/8, F302xD/E2, F303xD/E 1024 byte buffer; no internal D+ pull-up * L0x2, L0x3 1024 byte buffer * L1 512 byte buffer - * 2L4x2, 2L4x3 1024 byte buffer + * L4x2, L4x3 1024 byte buffer * * Assumptions of the driver: * - dcd_fs_irqHandler() is called by the USB interrupt handler @@ -107,13 +107,7 @@ ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \ ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \ ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x1)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32L1x2)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L4x3)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x3)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32G1x4)) \ + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) \ ) // In order to reduce the dependance on HAL, we undefine this. @@ -792,8 +786,7 @@ static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN // Interrupt handlers #if ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x1)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32L0x2)) + ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) void USB_IRQHandler(void) { dcd_fs_irqHandler(); diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h index 1e3c90b6d..4f46e81c4 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h @@ -78,7 +78,7 @@ // When CAN clock is enabled, USB can use first 768 bytes ONLY. #else #error You are using an untested or unimplemented STM32 variant. Please update the driver. -// This includes for L0x2, L0x3, L1, L4x2 and L4x3 +// This includes L0x2, L0x3, L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4 #endif // For purposes of accessing the packet diff --git a/src/tusb_option.h b/src/tusb_option.h index 9ca4fc56f..af2df19c9 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -62,17 +62,6 @@ #define OPT_MCU_STM32F1x3 334 ///< ST STM32F1x3 #define OPT_MCU_STM32F3x2 335 ///< ST STM32F3x2 #define OPT_MCU_STM32F3x3 336 ///< ST STM32F3x3 -#define OPT_MCU_STM32L0x1 337 ///< ST STM32L3x1 -#define OPT_MCU_STM32L0x2 338 ///< ST STM32L3x2 -#define OPT_MCU_STM32L1x0 339 ///< ST STM32L1x0 -#define OPT_MCU_STM32L1x1 340 ///< ST STM32L1x1 -#define OPT_MCU_STM32L1x2 341 ///< ST STM32L1x2 -#define OPT_MCU_STM32L4x2 342 ///< ST STM32L4x2 -#define OPT_MCU_STM32L4x3 343 ///< ST STM32L4x3 -#define OPT_MCU_STM32G4x1 344 ///< ST STM32G4x1 -#define OPT_MCU_STM32G4x3 345 ///< ST STM32G4x3 -#define OPT_MCU_STM32G4x4 346 ///< ST STM32G4x4 - /** @} */ From b6a5cf83c45b2641aa860c19022eaa0de78d41e3 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 10 Sep 2019 23:55:45 +0700 Subject: [PATCH 22/35] update st_driver --- hw/mcu/st/st_driver | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mcu/st/st_driver b/hw/mcu/st/st_driver index 4279a02b8..3fc2e0f3d 160000 --- a/hw/mcu/st/st_driver +++ b/hw/mcu/st/st_driver @@ -1 +1 @@ -Subproject commit 4279a02b87d3b327f058b5d6b53132e5dcc0cf17 +Subproject commit 3fc2e0f3db155b33177bb0705e0dd65cadb58412 From 4f6bedeac9a683ffd11efded8650f1aa95dc2f5d Mon Sep 17 00:00:00 2001 From: Nathan Conrad Date: Tue, 10 Sep 2019 12:57:43 -0400 Subject: [PATCH 23/35] Rename the STM32 MCU options. --- hw/bsp/stm32f070rbnucleo/board.mk | 2 +- hw/bsp/stm32f303disco/board.mk | 2 +- src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 19 +++++++++++-------- src/tusb_option.h | 11 +++-------- 4 files changed, 16 insertions(+), 18 deletions(-) diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk index a9fca5f8d..e4036982e 100644 --- a/hw/bsp/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -6,7 +6,7 @@ CFLAGS += \ -mcpu=cortex-m0 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F0x0 + -DCFG_TUSB_MCU=OPT_MCU_STM32F0 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index 7a1899a18..f8f689a92 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -7,7 +7,7 @@ CFLAGS += \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F3x3 + -DCFG_TUSB_MCU=OPT_MCU_STM32F3 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F3xx_HAL_Driver ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F3xx diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 389acb176..1681d6412 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -104,10 +104,13 @@ #include "tusb_option.h" #if (TUSB_OPT_DEVICE_ENABLED) && ( \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) \ + ((CFG_TUSB_MCU) == OPT_MCU_STM32F0) || \ + (((CFG_TUSB_MCU) == OPT_MCU_STM32F1) && ( \ + defined(stm32f102x6) || defined(stm32f102xb) || \ + defined(stm32f103x6) || defined(stm32f103xb) || \ + defined(stm32f103xe) || defined(stm32f103xg) \ + )) || \ + ((CFG_TUSB_MCU) == OPT_MCU_STM32F3) \ ) // In order to reduce the dependance on HAL, we undefine this. @@ -785,14 +788,13 @@ static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN // Interrupt handlers -#if ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x0)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x2)) || \ - ((CFG_TUSB_MCU) == (OPT_MCU_STM32F0x8)) +#if (CFG_TUSB_MCU) == (OPT_MCU_STM32F0) void USB_IRQHandler(void) { dcd_fs_irqHandler(); } -#elif ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F1x3)) +#elif (CFG_TUSB_MCU) == (OPT_MCU_STM32F1) void USB_HP_IRQHandler(void) { dcd_fs_irqHandler(); @@ -805,7 +807,8 @@ void USBWakeUp_IRQHandler(void) { dcd_fs_irqHandler(); } -#elif((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x2)) || ((CFG_TUSB_MCU) == (OPT_MCU_STM32F3x3)) + +#elif (CFG_TUSB_MCU) == (OPT_MCU_STM32F3) // USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP) // FIXME: Do all three need to be handled, or just the LP one? // USB high-priority interrupt (Channel 19): Triggered only by a correct diff --git a/src/tusb_option.h b/src/tusb_option.h index af2df19c9..dc76ce5f6 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -53,15 +53,10 @@ // ST Synopsis OTG devices #define OPT_MCU_STM32F4 300 ///< ST STM32F4 +#define OPT_MCU_STM32F3 301 ///< ST STM32F0x0 #define OPT_MCU_STM32H7 302 ///< ST STM32H7 -// ST FSDEV Devices -#define OPT_MCU_STM32F0x0 330 ///< ST STM32F0x0 -#define OPT_MCU_STM32F0x2 331 ///< ST STM32F0x2 -#define OPT_MCU_STM32F0x8 332 ///< ST STM32F0x8 -#define OPT_MCU_STM32F1x2 333 ///< ST STM32F1x2 -#define OPT_MCU_STM32F1x3 334 ///< ST STM32F1x3 -#define OPT_MCU_STM32F3x2 335 ///< ST STM32F3x2 -#define OPT_MCU_STM32F3x3 336 ///< ST STM32F3x3 +#define OPT_MCU_STM32F0 303 ///< ST STM32F0 +#define OPT_MCU_STM32F1 304 ///< ST STM32F1 /** @} */ From 6c6a597465c7052cd4ecbdeab577bdce3855439d Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 10:47:07 +0700 Subject: [PATCH 24/35] fix #132 --- src/class/cdc/cdc_device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index 82932ef7d..b8b3c864d 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -135,7 +135,7 @@ static inline uint8_t tud_cdc_get_line_state (void) static inline void tud_cdc_get_line_coding (cdc_line_coding_t* coding) { - return tud_cdc_n_get_line_coding(0, coding); + tud_cdc_n_get_line_coding(0, coding); } static inline void tud_cdc_set_wanted_char (char wanted) From 34b76898da16ea33897d6cb5b908611d81ab5855 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 11:41:47 +0700 Subject: [PATCH 25/35] adding stm32f072disco board, board_test example running --- hw/bsp/stm32f072disco/STM32F072RBTx_FLASH.ld | 169 ++++++++++ hw/bsp/stm32f072disco/board.mk | 50 +++ hw/bsp/stm32f072disco/stm32f072disco.c | 165 ++++++++++ hw/bsp/stm32f072disco/stm32f0xx_hal_conf.h | 324 +++++++++++++++++++ 4 files changed, 708 insertions(+) create mode 100644 hw/bsp/stm32f072disco/STM32F072RBTx_FLASH.ld create mode 100644 hw/bsp/stm32f072disco/board.mk create mode 100644 hw/bsp/stm32f072disco/stm32f072disco.c create mode 100644 hw/bsp/stm32f072disco/stm32f0xx_hal_conf.h diff --git a/hw/bsp/stm32f072disco/STM32F072RBTx_FLASH.ld b/hw/bsp/stm32f072disco/STM32F072RBTx_FLASH.ld new file mode 100644 index 000000000..8d31f6a00 --- /dev/null +++ b/hw/bsp/stm32f072disco/STM32F072RBTx_FLASH.ld @@ -0,0 +1,169 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F072RBTx Device with +** 128KByte FLASH, 16KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +** (c)Copyright Ac6. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Ac6 permit registered System Workbench for MCU users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the System Workbench for MCU toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20004000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/hw/bsp/stm32f072disco/board.mk b/hw/bsp/stm32f072disco/board.mk new file mode 100644 index 000000000..e16212fe3 --- /dev/null +++ b/hw/bsp/stm32f072disco/board.mk @@ -0,0 +1,50 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 \ + -DSTM32F072xB \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0 \ + -mfloat-abi=soft \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F0 + +ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver +ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/$(BOARD)/STM32F072RBTx_FLASH.ld + +SRC_C += \ + $(ST_CMSIS)/Source/Templates/system_stm32f0xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f0xx_hal_gpio.c + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s + +INC += \ + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) + +# For TinyUSB port source +VENDOR = st +CHIP_FAMILY = stm32_fsdev + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = stm32f072rb +JLINK_IF = swd + +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI + +# flash target using on-board stlink +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32f072disco/stm32f072disco.c b/hw/bsp/stm32f072disco/stm32f072disco.c new file mode 100644 index 000000000..1e2e2b855 --- /dev/null +++ b/hw/bsp/stm32f072disco/stm32f072disco.c @@ -0,0 +1,165 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" + +#include "stm32f0xx.h" +#include "stm32f0xx_hal_conf.h" + +#define LED_PORT GPIOC +#define LED_PIN GPIO_PIN_6 +#define LED_STATE_ON 1 + +#define BUTTON_PORT GPIOA +#define BUTTON_PIN GPIO_PIN_0 +#define BUTTON_STATE_ACTIVE 1 + + +/** + * @brief System Clock Configuration + * The system Clock is configured as follow : + * System Clock source = PLL (HSI48) + * SYSCLK(Hz) = 48000000 + * HCLK(Hz) = 48000000 + * AHB Prescaler = 1 + * APB1 Prescaler = 1 + * HSI Frequency(Hz) = 48000000 + * PREDIV = 2 + * PLLMUL = 2 + * Flash Latency(WS) = 1 + * @param None + * @retval None + */ +static void SystemClock_Config(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Select HSI48 Oscillator as PLL source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI48; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV2; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK and PCLK1 clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1); +} + +void board_init(void) +{ + #if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + #endif + + SystemClock_Config(); + + // Notify runtime of frequency change. + SystemCoreClockUpdate(); + + // LED + __HAL_RCC_GPIOC_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + // Button + __HAL_RCC_GPIOA_CLK_ENABLE(); + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + + // Start USB clock + __HAL_RCC_USB_CLK_ENABLE(); +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + +uint32_t board_button_read(void) +{ + return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +void HardFault_Handler (void) +{ + asm("bkpt"); +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/stm32f072disco/stm32f0xx_hal_conf.h b/hw/bsp/stm32f072disco/stm32f0xx_hal_conf.h new file mode 100644 index 000000000..7e3721afc --- /dev/null +++ b/hw/bsp/stm32f072disco/stm32f0xx_hal_conf.h @@ -0,0 +1,324 @@ +/** + ****************************************************************************** + * @file GPIO/GPIO_IOToggle/Inc/stm32f3xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F0xx_HAL_CONF_H +#define __STM32F0xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_CEC_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_UART_MODULE_ENABLED */ +#define HAL_USART_MODULE_ENABLED +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_EXTI_MODULE_ENABLED */ +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +/** + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value + */ +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value + */ +#if !defined (HSI_STARTUP_TIMEOUT) + #define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */ +#endif /* HSI_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator for ADC (HSI14) value. + */ +#if !defined (HSI14_VALUE) +#define HSI14_VALUE ((uint32_t)14000000) /*!< Value of the Internal High Speed oscillator for ADC in Hz. + The real value may vary depending on the variations + in voltage and temperature. */ +#endif /* HSI14_VALUE */ + +/** + * @brief Internal High Speed oscillator for USB (HSI48) value. + */ +#if !defined (HSI48_VALUE) +#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal High Speed oscillator for USB in Hz. + The real value may vary depending on the variations + in voltage and temperature. */ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSI) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ + /* Warning: Must be set to higher priority for HAL_Delay() */ + /* and HAL_GetTick() usage under interrupt context */ +#define USE_RTOS 0 +#define PREFETCH_ENABLE 1 +#define INSTRUCTION_CACHE_ENABLE 0 +#define DATA_CACHE_ENABLE 0 +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ + #define USE_FULL_ASSERT 1U + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f0xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f0xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f0xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f0xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f0xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f0xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f0xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f0xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32f0xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f0xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f0xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f0xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f0xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f0xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f0xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f0xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f0xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f0xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f0xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f0xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32f0xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f0xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f0xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32f0xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f0xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f0xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f0xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F0xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ From 3f02c359832ec19400265a5ee335e30fde10d24d Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 11:55:16 +0700 Subject: [PATCH 26/35] fix #130 --- examples/device/cdc_msc_hid/src/msc_disk.c | 11 ++++------- examples/device/cdc_msc_hid_freertos/src/msc_disk.c | 11 ++++------- examples/device/msc_dual_lun/src/msc_disk_dual.c | 13 +++++-------- hw/bsp/lpcxpresso11u37/board.mk | 1 + hw/bsp/lpcxpresso1347/board.mk | 1 + hw/bsp/stm32f070rbnucleo/board.mk | 1 + hw/bsp/stm32f072disco/board.mk | 1 + 7 files changed, 17 insertions(+), 22 deletions(-) diff --git a/examples/device/cdc_msc_hid/src/msc_disk.c b/examples/device/cdc_msc_hid/src/msc_disk.c index bc61f5d67..5aa7befc9 100644 --- a/examples/device/cdc_msc_hid/src/msc_disk.c +++ b/examples/device/cdc_msc_hid/src/msc_disk.c @@ -29,11 +29,8 @@ #if CFG_TUD_MSC // Some MCU doesn't have enough 8KB SRAM to store the whole disk -// We will use Flash as read-only disk -// - LPC1347, LPC11uxx -#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) -#define DISK_READONLY -#endif +// We will use Flash as read-only disk with board that has +// CFG_EXAMPLE_MSC_READONLY defined #define README_CONTENTS \ "This is tinyusb's MassStorage Class demo.\r\n\r\n\ @@ -46,7 +43,7 @@ enum DISK_BLOCK_SIZE = 512 }; -#ifdef DISK_READONLY +#ifdef CFG_EXAMPLE_MSC_READONLY const #endif uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = @@ -193,7 +190,7 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* { (void) lun; -#ifndef DISK_READONLY +#ifndef CFG_EXAMPLE_MSC_READONLY uint8_t* addr = msc_disk[lba] + offset; memcpy(addr, buffer, bufsize); #else diff --git a/examples/device/cdc_msc_hid_freertos/src/msc_disk.c b/examples/device/cdc_msc_hid_freertos/src/msc_disk.c index 184602cdd..b4986fbb7 100644 --- a/examples/device/cdc_msc_hid_freertos/src/msc_disk.c +++ b/examples/device/cdc_msc_hid_freertos/src/msc_disk.c @@ -29,11 +29,8 @@ #if CFG_TUD_MSC // Some MCU doesn't have enough 8KB SRAM to store the whole disk -// We will use Flash as read-only disk -// - LPC1347, LPC11uxx -#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) -#define DISK_READONLY -#endif +// We will use Flash as read-only disk with board that has +// CFG_EXAMPLE_MSC_READONLY defined #define README_CONTENTS \ "This is tinyusb's MassStorage Class demo.\r\n\r\n\ @@ -46,7 +43,7 @@ enum DISK_BLOCK_SIZE = 512 }; -#ifdef DISK_READONLY +#ifdef CFG_EXAMPLE_MSC_READONLY const #endif uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = @@ -193,7 +190,7 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* { (void) lun; -#ifndef DISK_READONLY +#ifndef CFG_EXAMPLE_MSC_READONLY uint8_t* addr = msc_disk[lba] + offset; memcpy(addr, buffer, bufsize); #else diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c index faa90ee7b..2ab050da8 100644 --- a/examples/device/msc_dual_lun/src/msc_disk_dual.c +++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c @@ -29,11 +29,8 @@ #if CFG_TUD_MSC // Some MCU doesn't have enough 8KB SRAM to store the whole disk -// We will use Flash as read-only disk -// - LPC1347, LPC11uxx -#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || defined(STM32F070xB) -#define DISK_READONLY -#endif +// We will use Flash as read-only disk with board that has +// CFG_EXAMPLE_MSC_READONLY defined enum { @@ -51,7 +48,7 @@ If you find any bugs or get any questions, feel free to file an\r\n\ issue at github.com/hathach/tinyusb" -#ifdef DISK_READONLY +#ifdef CFG_EXAMPLE_MSC_READONLY const #endif uint8_t msc_disk0[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = @@ -132,7 +129,7 @@ uint8_t msc_disk0[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = If you find any bugs or get any questions, feel free to file an\r\n\ issue at github.com/hathach/tinyusb" -#ifdef DISK_READONLY +#ifdef CFG_EXAMPLE_MSC_READONLY const #endif uint8_t msc_disk1[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = @@ -281,7 +278,7 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff // Process data in buffer to disk's storage and return number of written bytes int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) { -#ifndef DISK_READONLY +#ifndef CFG_EXAMPLE_MSC_READONLY uint8_t* addr = (lun ? msc_disk1[lba] : msc_disk0[lba]) + offset; memcpy(addr, buffer, bufsize); #else diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk index 2a7a9f74a..228765550 100644 --- a/hw/bsp/lpcxpresso11u37/board.mk +++ b/hw/bsp/lpcxpresso11u37/board.mk @@ -5,6 +5,7 @@ CFLAGS += \ -nostdlib \ -DCORE_M0 \ -D__USE_LPCOPEN \ + -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk index edae27c61..4e0c70392 100644 --- a/hw/bsp/lpcxpresso1347/board.mk +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -5,6 +5,7 @@ CFLAGS += \ -nostdlib \ -DCORE_M3 \ -D__USE_LPCOPEN \ + -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk index e4036982e..b53aac5bb 100644 --- a/hw/bsp/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f070rbnucleo/board.mk @@ -6,6 +6,7 @@ CFLAGS += \ -mcpu=cortex-m0 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ + -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_STM32F0 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver diff --git a/hw/bsp/stm32f072disco/board.mk b/hw/bsp/stm32f072disco/board.mk index e16212fe3..0a58a5654 100644 --- a/hw/bsp/stm32f072disco/board.mk +++ b/hw/bsp/stm32f072disco/board.mk @@ -6,6 +6,7 @@ CFLAGS += \ -mcpu=cortex-m0 \ -mfloat-abi=soft \ -nostdlib -nostartfiles \ + -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_TUSB_MCU=OPT_MCU_STM32F0 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver From ec50b274fc7cea2d2c37e75f6bc75ae2871c3c31 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 12:05:55 +0700 Subject: [PATCH 27/35] added stm32f072disco board close #104 --- hw/bsp/stm32f072disco/stm32f072disco.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/bsp/stm32f072disco/stm32f072disco.c b/hw/bsp/stm32f072disco/stm32f072disco.c index 1e2e2b855..cb9a1ddb5 100644 --- a/hw/bsp/stm32f072disco/stm32f072disco.c +++ b/hw/bsp/stm32f072disco/stm32f072disco.c @@ -104,7 +104,15 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); - // Start USB clock + // USB Pins + // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // USB Clock enable __HAL_RCC_USB_CLK_ENABLE(); } From a337b2a0cb86471541c2b97f7d8c9c668c3a4d8d Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 12:08:45 +0700 Subject: [PATCH 28/35] update docs --- README.md | 2 +- docs/boards.md | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 7e998f248..732fcb26d 100644 --- a/README.md +++ b/README.md @@ -55,7 +55,7 @@ The stack supports the following MCUs - **Nordic:** nRF52840 - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC18xx, LPC40xx, LPC43xx, LPC51Uxx - **MicroChip:** SAMD21, SAMD51 (device only) -- **ST:** STM32F070xB, STM32F4, STM32H7 (device only) +- **ST:** STM32F0, STM32F4, STM32H7 (device only) [Here is the list of supported Boards](docs/boards.md) diff --git a/docs/boards.md b/docs/boards.md index 56410ee4d..410104e54 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -41,6 +41,7 @@ This code base already had supported for a handful of following boards ### ST STM32 - [STM32F070RB Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f070rb.html) +- [STM32F072b Discovery](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html) - [STM32F407g Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) - [STM32F411e Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) - [STM32F412g Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html) From cbf9f6e0dc4419cd19d5e2bae1f2f104faca2b9b Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 13:00:15 +0700 Subject: [PATCH 29/35] added new example hid_composite --- examples/device/cdc_msc_hid_mynewt/readme.md | 1 - examples/device/hid_composite/Makefile | 12 + examples/device/hid_composite/src/main.c | 205 ++++++++++++++++++ .../device/hid_composite/src/tusb_config.h | 88 ++++++++ .../hid_composite/src/usb_descriptors.c | 167 ++++++++++++++ .../hid_composite/src/usb_descriptors.h | 34 +++ .../hid_generic_inout/src/usb_descriptors.c | 4 - 7 files changed, 506 insertions(+), 5 deletions(-) delete mode 100644 examples/device/cdc_msc_hid_mynewt/readme.md create mode 100644 examples/device/hid_composite/Makefile create mode 100644 examples/device/hid_composite/src/main.c create mode 100644 examples/device/hid_composite/src/tusb_config.h create mode 100644 examples/device/hid_composite/src/usb_descriptors.c create mode 100644 examples/device/hid_composite/src/usb_descriptors.h diff --git a/examples/device/cdc_msc_hid_mynewt/readme.md b/examples/device/cdc_msc_hid_mynewt/readme.md deleted file mode 100644 index 0dac39a88..000000000 --- a/examples/device/cdc_msc_hid_mynewt/readme.md +++ /dev/null @@ -1 +0,0 @@ -Please check out this repo https://github.com/hathach/mynewt-tinyusb-example For mynewt example \ No newline at end of file diff --git a/examples/device/hid_composite/Makefile b/examples/device/hid_composite/Makefile new file mode 100644 index 000000000..69b633fea --- /dev/null +++ b/examples/device/hid_composite/Makefile @@ -0,0 +1,12 @@ +include ../../../tools/top.mk +include ../../make.mk + +INC += \ + src \ + $(TOP)/hw \ + +# Example source +EXAMPLE_SOURCE += $(wildcard src/*.c) +SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) + +include ../../rules.mk diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c new file mode 100644 index 000000000..4529e24f1 --- /dev/null +++ b/examples/device/hid_composite/src/main.c @@ -0,0 +1,205 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#include +#include +#include + +#include "bsp/board.h" +#include "tusb.h" + +#include "usb_descriptors.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF PROTYPES +//--------------------------------------------------------------------+ + +/* Blink pattern + * - 250 ms : device not mounted + * - 1000 ms : device mounted + * - 2500 ms : device is suspended + */ +enum { + BLINK_NOT_MOUNTED = 250, + BLINK_MOUNTED = 1000, + BLINK_SUSPENDED = 2500, +}; + +static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED; + +void led_blinking_task(void); +void hid_task(void); + +/*------------- MAIN -------------*/ +int main(void) +{ + board_init(); + + tusb_init(); + + while (1) + { + tud_task(); // tinyusb device task + led_blinking_task(); + + hid_task(); + } + + return 0; +} + +//--------------------------------------------------------------------+ +// Device callbacks +//--------------------------------------------------------------------+ + +// Invoked when device is mounted +void tud_mount_cb(void) +{ + blink_interval_ms = BLINK_MOUNTED; +} + +// Invoked when device is unmounted +void tud_umount_cb(void) +{ + blink_interval_ms = BLINK_NOT_MOUNTED; +} + +// Invoked when usb bus is suspended +// remote_wakeup_en : if host allow us to perform remote wakeup +// Within 7ms, device must draw an average of current less than 2.5 mA from bus +void tud_suspend_cb(bool remote_wakeup_en) +{ + (void) remote_wakeup_en; + blink_interval_ms = BLINK_SUSPENDED; +} + +// Invoked when usb bus is resumed +void tud_resume_cb(void) +{ + blink_interval_ms = BLINK_MOUNTED; +} + +//--------------------------------------------------------------------+ +// USB HID +//--------------------------------------------------------------------+ + +void hid_task(void) +{ + // Poll every 10ms + const uint32_t interval_ms = 10; + static uint32_t start_ms = 0; + + if ( board_millis() - start_ms < interval_ms) return; // not enough time + start_ms += interval_ms; + + uint32_t const btn = board_button_read(); + + // Remote wakeup + if ( tud_suspended() && btn ) + { + // Wake up host if we are in suspend mode + // and REMOTE_WAKEUP feature is enabled by host + tud_remote_wakeup(); + } + + /*------------- Mouse -------------*/ + if ( tud_hid_ready() ) + { + if ( btn ) + { + int8_t const delta = 5; + + // no button, right + down, no scroll pan + tud_hid_mouse_report(REPORT_ID_MOUSE, 0x00, delta, delta, 0, 0); + + // delay a bit before attempt to send keyboard report + board_delay(10); + } + } + + /*------------- Keyboard -------------*/ + if ( tud_hid_ready() ) + { + // use to avoid send multiple consecutive zero report for keyboard + static bool has_key = false; + + if ( btn ) + { + uint8_t keycode[6] = { 0 }; + keycode[0] = HID_KEY_A; + + tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, keycode); + + has_key = true; + }else + { + // send empty key report if previously has key pressed + if (has_key) tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, NULL); + has_key = false; + } + } +} + + +// Invoked when received GET_REPORT control request +// Application must fill buffer report's content and return its length. +// Return zero will cause the stack to STALL request +uint16_t tud_hid_get_report_cb(uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen) +{ + // TODO not Implemented + (void) report_id; + (void) report_type; + (void) buffer; + (void) reqlen; + + return 0; +} + +// Invoked when received SET_REPORT control request or +// received data on OUT endpoint ( Report ID = 0, Type = 0 ) +void tud_hid_set_report_cb(uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize) +{ + // TODO set LED based on CAPLOCK, NUMLOCK etc... + (void) report_id; + (void) report_type; + (void) buffer; + (void) bufsize; +} + +//--------------------------------------------------------------------+ +// BLINKING TASK +//--------------------------------------------------------------------+ +void led_blinking_task(void) +{ + static uint32_t start_ms = 0; + static bool led_state = false; + + // Blink every interval ms + if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time + start_ms += blink_interval_ms; + + board_led_write(led_state); + led_state = 1 - led_state; // toggle +} diff --git a/examples/device/hid_composite/src/tusb_config.h b/examples/device/hid_composite/src/tusb_config.h new file mode 100644 index 000000000..57fcbd595 --- /dev/null +++ b/examples/device/hid_composite/src/tusb_config.h @@ -0,0 +1,88 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#ifndef _TUSB_CONFIG_H_ +#define _TUSB_CONFIG_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +//-------------------------------------------------------------------- +// COMMON CONFIGURATION +//-------------------------------------------------------------------- + +// defined by compiler flags for flexibility +#ifndef CFG_TUSB_MCU + #error CFG_TUSB_MCU must be defined +#endif + +#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX +#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | OPT_MODE_HIGH_SPEED) +#else +#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE +#endif + +#define CFG_TUSB_OS OPT_OS_NONE + +// CFG_TUSB_DEBUG is defined by compiler in DEBUG build +// #define CFG_TUSB_DEBUG 0 + +/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. + * Tinyusb use follows macros to declare transferring memory so that they can be put + * into those specific section. + * e.g + * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) + * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) + */ +#ifndef CFG_TUSB_MEM_SECTION +#define CFG_TUSB_MEM_SECTION +#endif + +#ifndef CFG_TUSB_MEM_ALIGN +#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#endif + +//-------------------------------------------------------------------- +// DEVICE CONFIGURATION +//-------------------------------------------------------------------- + +#define CFG_TUD_ENDOINT0_SIZE 64 + +//------------- CLASS -------------// +#define CFG_TUD_HID 1 +#define CFG_TUD_CDC 0 +#define CFG_TUD_MSC 0 +#define CFG_TUD_MIDI 0 +#define CFG_TUD_VENDOR 0 + +// HID buffer size Should be sufficient to hold ID (if any) + Data +#define CFG_TUD_HID_BUFSIZE 16 + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_CONFIG_H_ */ diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c new file mode 100644 index 000000000..678b7528b --- /dev/null +++ b/examples/device/hid_composite/src/usb_descriptors.c @@ -0,0 +1,167 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#include "tusb.h" +#include "usb_descriptors.h" + +/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug. + * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC. + * + * Auto ProductID layout's Bitmap: + * [MSB] HID | MSC | CDC [LSB] + */ +#define _PID_MAP(itf, n) ( (CFG_TUD_##itf) << (n) ) +#define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \ + _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) ) + +//--------------------------------------------------------------------+ +// Device Descriptors +//--------------------------------------------------------------------+ +tusb_desc_device_t const desc_device = +{ + .bLength = sizeof(tusb_desc_device_t), + .bDescriptorType = TUSB_DESC_DEVICE, + .bcdUSB = 0x0200, + .bDeviceClass = 0x00, + .bDeviceSubClass = 0x00, + .bDeviceProtocol = 0x00, + .bMaxPacketSize0 = CFG_TUD_ENDOINT0_SIZE, + + .idVendor = 0xCafe, + .idProduct = USB_PID, + .bcdDevice = 0x0100, + + .iManufacturer = 0x01, + .iProduct = 0x02, + .iSerialNumber = 0x03, + + .bNumConfigurations = 0x01 +}; + +// Invoked when received GET DEVICE DESCRIPTOR +// Application return pointer to descriptor +uint8_t const * tud_descriptor_device_cb(void) +{ + return (uint8_t const *) &desc_device; +} + +//--------------------------------------------------------------------+ +// HID Report Descriptor +//--------------------------------------------------------------------+ + +uint8_t const desc_hid_report[] = +{ + TUD_HID_REPORT_DESC_KEYBOARD( HID_REPORT_ID(REPORT_ID_KEYBOARD), ), + TUD_HID_REPORT_DESC_MOUSE ( HID_REPORT_ID(REPORT_ID_MOUSE), ) +}; + +// Invoked when received GET HID REPORT DESCRIPTOR +// Application return pointer to descriptor +// Descriptor contents must exist long enough for transfer to complete +uint8_t const * tud_hid_descriptor_report_cb(void) +{ + return desc_hid_report; +} + +//--------------------------------------------------------------------+ +// Configuration Descriptor +//--------------------------------------------------------------------+ + +enum +{ + ITF_NUM_HID, + ITF_NUM_TOTAL +}; + +#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_HID_DESC_LEN) + +#define EPNUM_HID 0x81 + +uint8_t const desc_configuration[] = +{ + // interface count, string index, total length, attribute, power in mA + TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100), + + // Interface number, string index, protocol, report descriptor len, EP In & Out address, size & polling interval + TUD_HID_DESCRIPTOR(ITF_NUM_HID, 0, HID_PROTOCOL_NONE, sizeof(desc_hid_report), EPNUM_HID, CFG_TUD_HID_BUFSIZE, 10) +}; + +// Invoked when received GET CONFIGURATION DESCRIPTOR +// Application return pointer to descriptor +// Descriptor contents must exist long enough for transfer to complete +uint8_t const * tud_descriptor_configuration_cb(uint8_t index) +{ + (void) index; // for multiple configurations + return desc_configuration; +} + +//--------------------------------------------------------------------+ +// String Descriptors +//--------------------------------------------------------------------+ + +// array of pointer to string descriptors +char const* string_desc_arr [] = +{ + (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409) + "TinyUSB", // 1: Manufacturer + "TinyUSB Device", // 2: Product + "123456", // 3: Serials, should use chip ID +}; + +static uint16_t _desc_str[32]; + +// Invoked when received GET STRING DESCRIPTOR request +// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete +uint16_t const* tud_descriptor_string_cb(uint8_t index) +{ + uint8_t chr_count; + + if ( index == 0) + { + memcpy(&_desc_str[1], string_desc_arr[0], 2); + chr_count = 1; + }else + { + // Convert ASCII string into UTF-16 + + if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL; + + const char* str = string_desc_arr[index]; + + // Cap at max char + chr_count = strlen(str); + if ( chr_count > 31 ) chr_count = 31; + + for(uint8_t i=0; i Date: Wed, 11 Sep 2019 13:07:11 +0700 Subject: [PATCH 30/35] remove hid in cdc_msc_hid demo since many of stm32 mcu doesn't have enough endpoint to run this example --- examples/device/cdc_msc_hid/src/main.c | 101 ------------------ examples/device/cdc_msc_hid/src/tusb_config.h | 10 +- .../device/cdc_msc_hid/src/usb_descriptors.c | 50 +-------- .../device/cdc_msc_hid/src/usb_descriptors.h | 34 ------ 4 files changed, 2 insertions(+), 193 deletions(-) delete mode 100644 examples/device/cdc_msc_hid/src/usb_descriptors.h diff --git a/examples/device/cdc_msc_hid/src/main.c b/examples/device/cdc_msc_hid/src/main.c index 65ef1dcbd..c6ed4a922 100644 --- a/examples/device/cdc_msc_hid/src/main.c +++ b/examples/device/cdc_msc_hid/src/main.c @@ -30,8 +30,6 @@ #include "bsp/board.h" #include "tusb.h" -#include "usb_descriptors.h" - //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF PROTYPES //--------------------------------------------------------------------+ @@ -52,7 +50,6 @@ static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED; void led_blinking_task(void); void cdc_task(void); -void hid_task(void); /*------------- MAIN -------------*/ int main(void) @@ -66,13 +63,7 @@ int main(void) tud_task(); // tinyusb device task led_blinking_task(); -#if CFG_TUD_CDC cdc_task(); -#endif - -#if CFG_TUD_HID - hid_task(); -#endif } return 0; @@ -113,7 +104,6 @@ void tud_resume_cb(void) //--------------------------------------------------------------------+ // USB CDC //--------------------------------------------------------------------+ -#if CFG_TUD_CDC void cdc_task(void) { if ( tud_cdc_connected() ) @@ -157,97 +147,6 @@ void tud_cdc_rx_cb(uint8_t itf) (void) itf; } -#endif - -//--------------------------------------------------------------------+ -// USB HID -//--------------------------------------------------------------------+ -#if CFG_TUD_HID - -void hid_task(void) -{ - // Poll every 10ms - const uint32_t interval_ms = 10; - static uint32_t start_ms = 0; - - if ( board_millis() - start_ms < interval_ms) return; // not enough time - start_ms += interval_ms; - - uint32_t const btn = board_button_read(); - - // Remote wakeup - if ( tud_suspended() && btn ) - { - // Wake up host if we are in suspend mode - // and REMOTE_WAKEUP feature is enabled by host - tud_remote_wakeup(); - } - - /*------------- Mouse -------------*/ - if ( tud_hid_ready() ) - { - if ( btn ) - { - int8_t const delta = 5; - - // no button, right + down, no scroll pan - tud_hid_mouse_report(REPORT_ID_MOUSE, 0x00, delta, delta, 0, 0); - - // delay a bit before attempt to send keyboard report - board_delay(10); - } - } - - /*------------- Keyboard -------------*/ - if ( tud_hid_ready() ) - { - // use to avoid send multiple consecutive zero report for keyboard - static bool has_key = false; - - if ( btn ) - { - uint8_t keycode[6] = { 0 }; - keycode[0] = HID_KEY_A; - - tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, keycode); - - has_key = true; - }else - { - // send empty key report if previously has key pressed - if (has_key) tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, NULL); - has_key = false; - } - } -} - -// Invoked when received GET_REPORT control request -// Application must fill buffer report's content and return its length. -// Return zero will cause the stack to STALL request -uint16_t tud_hid_get_report_cb(uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen) -{ - // TODO not Implemented - (void) report_id; - (void) report_type; - (void) buffer; - (void) reqlen; - - return 0; -} - -// Invoked when received SET_REPORT control request or -// received data on OUT endpoint ( Report ID = 0, Type = 0 ) -void tud_hid_set_report_cb(uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize) -{ - // TODO not Implemented - (void) report_id; - (void) report_type; - (void) buffer; - (void) bufsize; -} - -#endif - //--------------------------------------------------------------------+ // BLINKING TASK //--------------------------------------------------------------------+ diff --git a/examples/device/cdc_msc_hid/src/tusb_config.h b/examples/device/cdc_msc_hid/src/tusb_config.h index 6eb6c10f1..ff7fafd8f 100644 --- a/examples/device/cdc_msc_hid/src/tusb_config.h +++ b/examples/device/cdc_msc_hid/src/tusb_config.h @@ -74,15 +74,7 @@ //------------- CLASS -------------// #define CFG_TUD_CDC 1 #define CFG_TUD_MSC 1 - -// Some STM32 MCUs does not have enough endpoints (4, including control -// endpoint) to enable CDC, MSC, and HID simultaneously, so disable HID as a compromise. -#if CFG_TUSB_MCU == OPT_MCU_STM32F4 - #include "stm32f4xx.h" - #define CFG_TUD_HID ((USB_OTG_FS_MAX_IN_ENDPOINTS > 4) ? 1 : 0) -#else - #define CFG_TUD_HID 1 -#endif +#define CFG_TUD_HID 0 #define CFG_TUD_MIDI 0 #define CFG_TUD_VENDOR 0 diff --git a/examples/device/cdc_msc_hid/src/usb_descriptors.c b/examples/device/cdc_msc_hid/src/usb_descriptors.c index 34f391dfb..ac8214e37 100644 --- a/examples/device/cdc_msc_hid/src/usb_descriptors.c +++ b/examples/device/cdc_msc_hid/src/usb_descriptors.c @@ -24,7 +24,6 @@ */ #include "tusb.h" -#include "usb_descriptors.h" /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug. * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC. @@ -45,17 +44,11 @@ tusb_desc_device_t const desc_device = .bDescriptorType = TUSB_DESC_DEVICE, .bcdUSB = 0x0200, - #if CFG_TUD_CDC // Use Interface Association Descriptor (IAD) for CDC // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1) .bDeviceClass = TUSB_CLASS_MISC, .bDeviceSubClass = MISC_SUBCLASS_COMMON, .bDeviceProtocol = MISC_PROTOCOL_IAD, - #else - .bDeviceClass = 0x00, - .bDeviceSubClass = 0x00, - .bDeviceProtocol = 0x00, - #endif .bMaxPacketSize0 = CFG_TUD_ENDOINT0_SIZE, @@ -77,50 +70,19 @@ uint8_t const * tud_descriptor_device_cb(void) return (uint8_t const *) &desc_device; } -//--------------------------------------------------------------------+ -// HID Report Descriptor -//--------------------------------------------------------------------+ -#if CFG_TUD_HID - -uint8_t const desc_hid_report[] = -{ - TUD_HID_REPORT_DESC_KEYBOARD( HID_REPORT_ID(REPORT_ID_KEYBOARD), ), - TUD_HID_REPORT_DESC_MOUSE ( HID_REPORT_ID(REPORT_ID_MOUSE), ) -}; - -// Invoked when received GET HID REPORT DESCRIPTOR -// Application return pointer to descriptor -// Descriptor contents must exist long enough for transfer to complete -uint8_t const * tud_hid_descriptor_report_cb(void) -{ - return desc_hid_report; -} - -#endif - //--------------------------------------------------------------------+ // Configuration Descriptor //--------------------------------------------------------------------+ enum { -#if CFG_TUD_CDC ITF_NUM_CDC = 0, ITF_NUM_CDC_DATA, -#endif - -#if CFG_TUD_MSC ITF_NUM_MSC, -#endif - -#if CFG_TUD_HID - ITF_NUM_HID, -#endif - ITF_NUM_TOTAL }; -#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + CFG_TUD_CDC*TUD_CDC_DESC_LEN + CFG_TUD_MSC*TUD_MSC_DESC_LEN + CFG_TUD_HID*TUD_HID_DESC_LEN) +#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN) #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number @@ -137,20 +99,11 @@ uint8_t const desc_configuration[] = // Interface count, string index, total length, attribute, power in mA TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100), -#if CFG_TUD_CDC // Interface number, string index, EP notification address and size, EP data address (out, in) and size. TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, 0x81, 8, 0x02, 0x82, 64), -#endif -#if CFG_TUD_MSC // Interface number, string index, EP Out & EP In address, EP size TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC, 0x80 | EPNUM_MSC, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64), -#endif - -#if CFG_TUD_HID - // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval - TUD_HID_DESCRIPTOR(ITF_NUM_HID, 6, HID_PROTOCOL_NONE, sizeof(desc_hid_report), 0x84, 16, 10) -#endif }; @@ -176,7 +129,6 @@ char const* string_desc_arr [] = "123456", // 3: Serials, should use chip ID "TinyUSB CDC", // 4: CDC Interface "TinyUSB MSC", // 5: MSC Interface - "TinyUSB HID" // 6: HID }; static uint16_t _desc_str[32]; diff --git a/examples/device/cdc_msc_hid/src/usb_descriptors.h b/examples/device/cdc_msc_hid/src/usb_descriptors.h deleted file mode 100644 index 6992d3349..000000000 --- a/examples/device/cdc_msc_hid/src/usb_descriptors.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef USB_DESCRIPTORS_H_ -#define USB_DESCRIPTORS_H_ - -enum -{ - REPORT_ID_KEYBOARD = 1, - REPORT_ID_MOUSE -}; - -#endif /* USB_DESCRIPTORS_H_ */ From 7599541c1a33cc55b2a33fc160252e93811abe81 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 13:09:14 +0700 Subject: [PATCH 31/35] rename cdc_msc_hid to cdc_msc, hid has its own example hid_composite now --- examples/device/{cdc_msc_hid => cdc_msc}/Makefile | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/cdc_msc_hid.emProject | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC1100_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC1100_Target.js | 0 .../ses/lpc11u6x/LPC11U68_MemoryMap.xml | 0 .../ses/lpc11u6x/LPC11U6x_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC11U6x_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/lpc11u6x.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/thumb_crt0.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC1300_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC1300_Target.js | 0 .../ses/lpc13xx/LPC1347FBD64_MemoryMap.xml | 0 .../ses/lpc13xx/LPC13Uxx_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC13Uxx_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc13xx/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc13xx/lpc13xx.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/thumb_crt0.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC1700_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC1700_Target.js | 0 .../ses/lpc175x_6x/LPC1769_MemoryMap.xml | 0 .../ses/lpc175x_6x/LPC176x5x_Registers.xml | 0 .../ses/lpc175x_6x/LPC176x5x_Vectors.s | 0 .../ses/lpc175x_6x/flash_placement.xml | 0 .../ses/lpc175x_6x/lpc175x_6x.emProject | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/thumb_crt0.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC1800_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC1800_Target.js | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC1857_MemoryMap.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC18xx_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC18xx_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc18xx/lpc18xx.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/thumb_crt0.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC4000_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC4000_Target.js | 0 .../ses/lpc40xx/LPC4088FBD208_MemoryMap.xml | 0 .../ses/lpc40xx/LPC408x_7x_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC408x_7x_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc40xx/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc40xx/lpc40xx.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/thumb_crt0.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC4300_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC4300_Target.js | 0 .../ses/lpc43xx/LPC4357 Cortex-M4_MemoryMap.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC43xx_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC43xx_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc43xx/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/lpc43xx/lpc43xx.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/thumb_crt0.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/nrf5x/flash_placement.xml | 0 .../ses/nrf5x/nRF52840_xxAA_MemoryMap.xml | 0 .../ses/nrf5x/nRF52840_xxAA_s140v6_MemoryMap.xml | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nRF_Target.js | 0 .../{cdc_msc_hid => cdc_msc}/ses/nrf5x/nrf52840_Registers.xml | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nrf5x.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/thumb_crt0.s | 0 .../ses/samd21/ATSAMD21G18A_MemoryMap.xml | 0 .../ses/samd21/ATSAMD21G18A_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd21/ATSAMD21G18A_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd21/SAMD21_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd21/SAMD21_Target.js | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd21/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd21/samd21.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/samd21/thumb_crt0.s | 0 .../ses/samd51/ATSAMD51J19A_MemoryMap.xml | 0 .../ses/samd51/ATSAMD51J19A_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd51/ATSAMD51J19A_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd51/SAMD51_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd51/SAMD51_Target.js | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd51/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/samd51/samd51.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/samd51/thumb_crt0.s | 0 .../ses/stm32f4/STM32F407VG_MemoryMap.xml | 0 .../ses/stm32f4/STM32F40x_Registers.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F40x_Vectors.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F4xx_Startup.s | 0 .../{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F4xx_Target.js | 0 .../{cdc_msc_hid => cdc_msc}/ses/stm32f4/flash_placement.xml | 0 .../{cdc_msc_hid => cdc_msc}/ses/stm32f4/stm32f4.emProject | 0 .../device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/thumb_crt0.s | 0 examples/device/{cdc_msc_hid => cdc_msc}/src/main.c | 0 examples/device/{cdc_msc_hid => cdc_msc}/src/msc_disk.c | 0 examples/device/{cdc_msc_hid => cdc_msc}/src/tusb_config.h | 0 examples/device/{cdc_msc_hid => cdc_msc}/src/usb_descriptors.c | 0 tools/build_all.py | 3 --- 86 files changed, 3 deletions(-) rename examples/device/{cdc_msc_hid => cdc_msc}/Makefile (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/cdc_msc_hid.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC1100_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC1100_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC11U68_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC11U6x_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/LPC11U6x_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/lpc11u6x.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc11u6x/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC1300_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC1300_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC1347FBD64_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC13Uxx_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/LPC13Uxx_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/lpc13xx.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc13xx/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC1700_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC1700_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC1769_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC176x5x_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/LPC176x5x_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/lpc175x_6x.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc175x_6x/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC1800_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC1800_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC1857_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC18xx_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/LPC18xx_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/lpc18xx.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc18xx/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC4000_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC4000_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC4088FBD208_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC408x_7x_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/LPC408x_7x_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/lpc40xx.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc40xx/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC4300_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC4300_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC4357 Cortex-M4_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC43xx_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/LPC43xx_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/lpc43xx.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/lpc43xx/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nRF52840_xxAA_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nRF52840_xxAA_s140v6_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nRF_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nrf52840_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/nrf5x.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/nrf5x/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/ATSAMD21G18A_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/ATSAMD21G18A_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/ATSAMD21G18A_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/SAMD21_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/SAMD21_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/samd21.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd21/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/ATSAMD51J19A_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/ATSAMD51J19A_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/ATSAMD51J19A_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/SAMD51_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/SAMD51_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/samd51.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/samd51/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F407VG_MemoryMap.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F40x_Registers.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F40x_Vectors.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F4xx_Startup.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/STM32F4xx_Target.js (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/flash_placement.xml (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/stm32f4.emProject (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/ses/stm32f4/thumb_crt0.s (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/src/main.c (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/src/msc_disk.c (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/src/tusb_config.h (100%) rename examples/device/{cdc_msc_hid => cdc_msc}/src/usb_descriptors.c (100%) diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc/Makefile similarity index 100% rename from examples/device/cdc_msc_hid/Makefile rename to examples/device/cdc_msc/Makefile diff --git a/examples/device/cdc_msc_hid/ses/cdc_msc_hid.emProject b/examples/device/cdc_msc/ses/cdc_msc_hid.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/cdc_msc_hid.emProject rename to examples/device/cdc_msc/ses/cdc_msc_hid.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/LPC1100_Startup.s b/examples/device/cdc_msc/ses/lpc11u6x/LPC1100_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/LPC1100_Startup.s rename to examples/device/cdc_msc/ses/lpc11u6x/LPC1100_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/LPC1100_Target.js b/examples/device/cdc_msc/ses/lpc11u6x/LPC1100_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/LPC1100_Target.js rename to examples/device/cdc_msc/ses/lpc11u6x/LPC1100_Target.js diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U68_MemoryMap.xml b/examples/device/cdc_msc/ses/lpc11u6x/LPC11U68_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U68_MemoryMap.xml rename to examples/device/cdc_msc/ses/lpc11u6x/LPC11U68_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U6x_Registers.xml b/examples/device/cdc_msc/ses/lpc11u6x/LPC11U6x_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U6x_Registers.xml rename to examples/device/cdc_msc/ses/lpc11u6x/LPC11U6x_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U6x_Vectors.s b/examples/device/cdc_msc/ses/lpc11u6x/LPC11U6x_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/LPC11U6x_Vectors.s rename to examples/device/cdc_msc/ses/lpc11u6x/LPC11U6x_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/flash_placement.xml b/examples/device/cdc_msc/ses/lpc11u6x/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/flash_placement.xml rename to examples/device/cdc_msc/ses/lpc11u6x/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject b/examples/device/cdc_msc/ses/lpc11u6x/lpc11u6x.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject rename to examples/device/cdc_msc/ses/lpc11u6x/lpc11u6x.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/thumb_crt0.s b/examples/device/cdc_msc/ses/lpc11u6x/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc11u6x/thumb_crt0.s rename to examples/device/cdc_msc/ses/lpc11u6x/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/LPC1300_Startup.s b/examples/device/cdc_msc/ses/lpc13xx/LPC1300_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/LPC1300_Startup.s rename to examples/device/cdc_msc/ses/lpc13xx/LPC1300_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/LPC1300_Target.js b/examples/device/cdc_msc/ses/lpc13xx/LPC1300_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/LPC1300_Target.js rename to examples/device/cdc_msc/ses/lpc13xx/LPC1300_Target.js diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/LPC1347FBD64_MemoryMap.xml b/examples/device/cdc_msc/ses/lpc13xx/LPC1347FBD64_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/LPC1347FBD64_MemoryMap.xml rename to examples/device/cdc_msc/ses/lpc13xx/LPC1347FBD64_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/LPC13Uxx_Registers.xml b/examples/device/cdc_msc/ses/lpc13xx/LPC13Uxx_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/LPC13Uxx_Registers.xml rename to examples/device/cdc_msc/ses/lpc13xx/LPC13Uxx_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/LPC13Uxx_Vectors.s b/examples/device/cdc_msc/ses/lpc13xx/LPC13Uxx_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/LPC13Uxx_Vectors.s rename to examples/device/cdc_msc/ses/lpc13xx/LPC13Uxx_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/flash_placement.xml b/examples/device/cdc_msc/ses/lpc13xx/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/flash_placement.xml rename to examples/device/cdc_msc/ses/lpc13xx/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject b/examples/device/cdc_msc/ses/lpc13xx/lpc13xx.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject rename to examples/device/cdc_msc/ses/lpc13xx/lpc13xx.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/thumb_crt0.s b/examples/device/cdc_msc/ses/lpc13xx/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc13xx/thumb_crt0.s rename to examples/device/cdc_msc/ses/lpc13xx/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s b/examples/device/cdc_msc/ses/lpc175x_6x/LPC1700_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s rename to examples/device/cdc_msc/ses/lpc175x_6x/LPC1700_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js b/examples/device/cdc_msc/ses/lpc175x_6x/LPC1700_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js rename to examples/device/cdc_msc/ses/lpc175x_6x/LPC1700_Target.js diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml b/examples/device/cdc_msc/ses/lpc175x_6x/LPC1769_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml rename to examples/device/cdc_msc/ses/lpc175x_6x/LPC1769_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml b/examples/device/cdc_msc/ses/lpc175x_6x/LPC176x5x_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml rename to examples/device/cdc_msc/ses/lpc175x_6x/LPC176x5x_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s b/examples/device/cdc_msc/ses/lpc175x_6x/LPC176x5x_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s rename to examples/device/cdc_msc/ses/lpc175x_6x/LPC176x5x_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml b/examples/device/cdc_msc/ses/lpc175x_6x/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml rename to examples/device/cdc_msc/ses/lpc175x_6x/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject b/examples/device/cdc_msc/ses/lpc175x_6x/lpc175x_6x.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject rename to examples/device/cdc_msc/ses/lpc175x_6x/lpc175x_6x.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s b/examples/device/cdc_msc/ses/lpc175x_6x/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s rename to examples/device/cdc_msc/ses/lpc175x_6x/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/LPC1800_Startup.s b/examples/device/cdc_msc/ses/lpc18xx/LPC1800_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/LPC1800_Startup.s rename to examples/device/cdc_msc/ses/lpc18xx/LPC1800_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/LPC1800_Target.js b/examples/device/cdc_msc/ses/lpc18xx/LPC1800_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/LPC1800_Target.js rename to examples/device/cdc_msc/ses/lpc18xx/LPC1800_Target.js diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/LPC1857_MemoryMap.xml b/examples/device/cdc_msc/ses/lpc18xx/LPC1857_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/LPC1857_MemoryMap.xml rename to examples/device/cdc_msc/ses/lpc18xx/LPC1857_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/LPC18xx_Registers.xml b/examples/device/cdc_msc/ses/lpc18xx/LPC18xx_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/LPC18xx_Registers.xml rename to examples/device/cdc_msc/ses/lpc18xx/LPC18xx_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/LPC18xx_Vectors.s b/examples/device/cdc_msc/ses/lpc18xx/LPC18xx_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/LPC18xx_Vectors.s rename to examples/device/cdc_msc/ses/lpc18xx/LPC18xx_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/flash_placement.xml b/examples/device/cdc_msc/ses/lpc18xx/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/flash_placement.xml rename to examples/device/cdc_msc/ses/lpc18xx/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject b/examples/device/cdc_msc/ses/lpc18xx/lpc18xx.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject rename to examples/device/cdc_msc/ses/lpc18xx/lpc18xx.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/thumb_crt0.s b/examples/device/cdc_msc/ses/lpc18xx/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc18xx/thumb_crt0.s rename to examples/device/cdc_msc/ses/lpc18xx/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/LPC4000_Startup.s b/examples/device/cdc_msc/ses/lpc40xx/LPC4000_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/LPC4000_Startup.s rename to examples/device/cdc_msc/ses/lpc40xx/LPC4000_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/LPC4000_Target.js b/examples/device/cdc_msc/ses/lpc40xx/LPC4000_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/LPC4000_Target.js rename to examples/device/cdc_msc/ses/lpc40xx/LPC4000_Target.js diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/LPC4088FBD208_MemoryMap.xml b/examples/device/cdc_msc/ses/lpc40xx/LPC4088FBD208_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/LPC4088FBD208_MemoryMap.xml rename to examples/device/cdc_msc/ses/lpc40xx/LPC4088FBD208_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/LPC408x_7x_Registers.xml b/examples/device/cdc_msc/ses/lpc40xx/LPC408x_7x_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/LPC408x_7x_Registers.xml rename to examples/device/cdc_msc/ses/lpc40xx/LPC408x_7x_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/LPC408x_7x_Vectors.s b/examples/device/cdc_msc/ses/lpc40xx/LPC408x_7x_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/LPC408x_7x_Vectors.s rename to examples/device/cdc_msc/ses/lpc40xx/LPC408x_7x_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/flash_placement.xml b/examples/device/cdc_msc/ses/lpc40xx/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/flash_placement.xml rename to examples/device/cdc_msc/ses/lpc40xx/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject b/examples/device/cdc_msc/ses/lpc40xx/lpc40xx.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject rename to examples/device/cdc_msc/ses/lpc40xx/lpc40xx.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/thumb_crt0.s b/examples/device/cdc_msc/ses/lpc40xx/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc40xx/thumb_crt0.s rename to examples/device/cdc_msc/ses/lpc40xx/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/LPC4300_Startup.s b/examples/device/cdc_msc/ses/lpc43xx/LPC4300_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/LPC4300_Startup.s rename to examples/device/cdc_msc/ses/lpc43xx/LPC4300_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/LPC4300_Target.js b/examples/device/cdc_msc/ses/lpc43xx/LPC4300_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/LPC4300_Target.js rename to examples/device/cdc_msc/ses/lpc43xx/LPC4300_Target.js diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/LPC4357 Cortex-M4_MemoryMap.xml b/examples/device/cdc_msc/ses/lpc43xx/LPC4357 Cortex-M4_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/LPC4357 Cortex-M4_MemoryMap.xml rename to examples/device/cdc_msc/ses/lpc43xx/LPC4357 Cortex-M4_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/LPC43xx_Registers.xml b/examples/device/cdc_msc/ses/lpc43xx/LPC43xx_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/LPC43xx_Registers.xml rename to examples/device/cdc_msc/ses/lpc43xx/LPC43xx_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/LPC43xx_Vectors.s b/examples/device/cdc_msc/ses/lpc43xx/LPC43xx_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/LPC43xx_Vectors.s rename to examples/device/cdc_msc/ses/lpc43xx/LPC43xx_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/flash_placement.xml b/examples/device/cdc_msc/ses/lpc43xx/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/flash_placement.xml rename to examples/device/cdc_msc/ses/lpc43xx/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject b/examples/device/cdc_msc/ses/lpc43xx/lpc43xx.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject rename to examples/device/cdc_msc/ses/lpc43xx/lpc43xx.emProject diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/thumb_crt0.s b/examples/device/cdc_msc/ses/lpc43xx/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/lpc43xx/thumb_crt0.s rename to examples/device/cdc_msc/ses/lpc43xx/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/flash_placement.xml b/examples/device/cdc_msc/ses/nrf5x/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/flash_placement.xml rename to examples/device/cdc_msc/ses/nrf5x/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nRF52840_xxAA_MemoryMap.xml b/examples/device/cdc_msc/ses/nrf5x/nRF52840_xxAA_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/nRF52840_xxAA_MemoryMap.xml rename to examples/device/cdc_msc/ses/nrf5x/nRF52840_xxAA_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nRF52840_xxAA_s140v6_MemoryMap.xml b/examples/device/cdc_msc/ses/nrf5x/nRF52840_xxAA_s140v6_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/nRF52840_xxAA_s140v6_MemoryMap.xml rename to examples/device/cdc_msc/ses/nrf5x/nRF52840_xxAA_s140v6_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nRF_Target.js b/examples/device/cdc_msc/ses/nrf5x/nRF_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/nRF_Target.js rename to examples/device/cdc_msc/ses/nrf5x/nRF_Target.js diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nrf52840_Registers.xml b/examples/device/cdc_msc/ses/nrf5x/nrf52840_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/nrf52840_Registers.xml rename to examples/device/cdc_msc/ses/nrf5x/nrf52840_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject b/examples/device/cdc_msc/ses/nrf5x/nrf5x.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject rename to examples/device/cdc_msc/ses/nrf5x/nrf5x.emProject diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/thumb_crt0.s b/examples/device/cdc_msc/ses/nrf5x/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/nrf5x/thumb_crt0.s rename to examples/device/cdc_msc/ses/nrf5x/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/samd21/ATSAMD21G18A_MemoryMap.xml b/examples/device/cdc_msc/ses/samd21/ATSAMD21G18A_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/ATSAMD21G18A_MemoryMap.xml rename to examples/device/cdc_msc/ses/samd21/ATSAMD21G18A_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/samd21/ATSAMD21G18A_Registers.xml b/examples/device/cdc_msc/ses/samd21/ATSAMD21G18A_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/ATSAMD21G18A_Registers.xml rename to examples/device/cdc_msc/ses/samd21/ATSAMD21G18A_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/samd21/ATSAMD21G18A_Vectors.s b/examples/device/cdc_msc/ses/samd21/ATSAMD21G18A_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/ATSAMD21G18A_Vectors.s rename to examples/device/cdc_msc/ses/samd21/ATSAMD21G18A_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/samd21/SAMD21_Startup.s b/examples/device/cdc_msc/ses/samd21/SAMD21_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/SAMD21_Startup.s rename to examples/device/cdc_msc/ses/samd21/SAMD21_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/samd21/SAMD21_Target.js b/examples/device/cdc_msc/ses/samd21/SAMD21_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/SAMD21_Target.js rename to examples/device/cdc_msc/ses/samd21/SAMD21_Target.js diff --git a/examples/device/cdc_msc_hid/ses/samd21/flash_placement.xml b/examples/device/cdc_msc/ses/samd21/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/flash_placement.xml rename to examples/device/cdc_msc/ses/samd21/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject b/examples/device/cdc_msc/ses/samd21/samd21.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/samd21.emProject rename to examples/device/cdc_msc/ses/samd21/samd21.emProject diff --git a/examples/device/cdc_msc_hid/ses/samd21/thumb_crt0.s b/examples/device/cdc_msc/ses/samd21/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd21/thumb_crt0.s rename to examples/device/cdc_msc/ses/samd21/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/samd51/ATSAMD51J19A_MemoryMap.xml b/examples/device/cdc_msc/ses/samd51/ATSAMD51J19A_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/ATSAMD51J19A_MemoryMap.xml rename to examples/device/cdc_msc/ses/samd51/ATSAMD51J19A_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/samd51/ATSAMD51J19A_Registers.xml b/examples/device/cdc_msc/ses/samd51/ATSAMD51J19A_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/ATSAMD51J19A_Registers.xml rename to examples/device/cdc_msc/ses/samd51/ATSAMD51J19A_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/samd51/ATSAMD51J19A_Vectors.s b/examples/device/cdc_msc/ses/samd51/ATSAMD51J19A_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/ATSAMD51J19A_Vectors.s rename to examples/device/cdc_msc/ses/samd51/ATSAMD51J19A_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/samd51/SAMD51_Startup.s b/examples/device/cdc_msc/ses/samd51/SAMD51_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/SAMD51_Startup.s rename to examples/device/cdc_msc/ses/samd51/SAMD51_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/samd51/SAMD51_Target.js b/examples/device/cdc_msc/ses/samd51/SAMD51_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/SAMD51_Target.js rename to examples/device/cdc_msc/ses/samd51/SAMD51_Target.js diff --git a/examples/device/cdc_msc_hid/ses/samd51/flash_placement.xml b/examples/device/cdc_msc/ses/samd51/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/flash_placement.xml rename to examples/device/cdc_msc/ses/samd51/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject b/examples/device/cdc_msc/ses/samd51/samd51.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/samd51.emProject rename to examples/device/cdc_msc/ses/samd51/samd51.emProject diff --git a/examples/device/cdc_msc_hid/ses/samd51/thumb_crt0.s b/examples/device/cdc_msc/ses/samd51/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/samd51/thumb_crt0.s rename to examples/device/cdc_msc/ses/samd51/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F407VG_MemoryMap.xml b/examples/device/cdc_msc/ses/stm32f4/STM32F407VG_MemoryMap.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/STM32F407VG_MemoryMap.xml rename to examples/device/cdc_msc/ses/stm32f4/STM32F407VG_MemoryMap.xml diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Registers.xml b/examples/device/cdc_msc/ses/stm32f4/STM32F40x_Registers.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Registers.xml rename to examples/device/cdc_msc/ses/stm32f4/STM32F40x_Registers.xml diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Vectors.s b/examples/device/cdc_msc/ses/stm32f4/STM32F40x_Vectors.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Vectors.s rename to examples/device/cdc_msc/ses/stm32f4/STM32F40x_Vectors.s diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Startup.s b/examples/device/cdc_msc/ses/stm32f4/STM32F4xx_Startup.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Startup.s rename to examples/device/cdc_msc/ses/stm32f4/STM32F4xx_Startup.s diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Target.js b/examples/device/cdc_msc/ses/stm32f4/STM32F4xx_Target.js similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Target.js rename to examples/device/cdc_msc/ses/stm32f4/STM32F4xx_Target.js diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/flash_placement.xml b/examples/device/cdc_msc/ses/stm32f4/flash_placement.xml similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/flash_placement.xml rename to examples/device/cdc_msc/ses/stm32f4/flash_placement.xml diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject b/examples/device/cdc_msc/ses/stm32f4/stm32f4.emProject similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject rename to examples/device/cdc_msc/ses/stm32f4/stm32f4.emProject diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/thumb_crt0.s b/examples/device/cdc_msc/ses/stm32f4/thumb_crt0.s similarity index 100% rename from examples/device/cdc_msc_hid/ses/stm32f4/thumb_crt0.s rename to examples/device/cdc_msc/ses/stm32f4/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/src/main.c b/examples/device/cdc_msc/src/main.c similarity index 100% rename from examples/device/cdc_msc_hid/src/main.c rename to examples/device/cdc_msc/src/main.c diff --git a/examples/device/cdc_msc_hid/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c similarity index 100% rename from examples/device/cdc_msc_hid/src/msc_disk.c rename to examples/device/cdc_msc/src/msc_disk.c diff --git a/examples/device/cdc_msc_hid/src/tusb_config.h b/examples/device/cdc_msc/src/tusb_config.h similarity index 100% rename from examples/device/cdc_msc_hid/src/tusb_config.h rename to examples/device/cdc_msc/src/tusb_config.h diff --git a/examples/device/cdc_msc_hid/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c similarity index 100% rename from examples/device/cdc_msc_hid/src/usb_descriptors.c rename to examples/device/cdc_msc/src/usb_descriptors.c diff --git a/tools/build_all.py b/tools/build_all.py index 9c379d0dc..e327da221 100644 --- a/tools/build_all.py +++ b/tools/build_all.py @@ -19,9 +19,6 @@ for entry in os.scandir("examples/device"): if entry.is_dir(): all_examples.append(entry.name) -# mynewt has its own example repo -all_examples.remove("cdc_msc_hid_mynewt") - # TODO update freeRTOS example to work with all boards (only nrf52840 now) all_examples.remove("cdc_msc_hid_freertos") From 8a2b228c3ff4586548bedd56e263a62279be811f Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 16:56:26 +0700 Subject: [PATCH 32/35] ported stm32f3, close #67 --- README.md | 2 +- docs/boards.md | 12 +++-- hw/bsp/stm32f303disco/board.mk | 3 +- hw/bsp/stm32f303disco/stm32f303disco.c | 75 ++++++++++++++++---------- 4 files changed, 57 insertions(+), 35 deletions(-) diff --git a/README.md b/README.md index 732fcb26d..d6aed0b57 100644 --- a/README.md +++ b/README.md @@ -55,7 +55,7 @@ The stack supports the following MCUs - **Nordic:** nRF52840 - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC18xx, LPC40xx, LPC43xx, LPC51Uxx - **MicroChip:** SAMD21, SAMD51 (device only) -- **ST:** STM32F0, STM32F4, STM32H7 (device only) +- **ST:** STM32F0, STM32F3, STM32F4, STM32H7 (device only) [Here is the list of supported Boards](docs/boards.md) diff --git a/docs/boards.md b/docs/boards.md index 410104e54..8cb22788a 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -40,11 +40,13 @@ This code base already had supported for a handful of following boards - [Adafruit Metro M4 Express](https://www.adafruit.com/product/3382) ### ST STM32 -- [STM32F070RB Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f070rb.html) -- [STM32F072b Discovery](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html) -- [STM32F407g Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) -- [STM32F411e Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) -- [STM32F412g Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html) + +- [STM32F070rb Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f070rb.html) +- [STM32F072rb Discovery](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html) +- [STM32F303vc Discovery](https://www.st.com/en/evaluation-tools/stm32f3discovery.html) +- [STM32F407vg Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) +- [STM32F411ve Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) +- [STM32F412zg Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html) - [Nucleo H743zi](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html) ## Add your own board diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk index f8f689a92..a214b1f14 100644 --- a/hw/bsp/stm32f303disco/board.mk +++ b/hw/bsp/stm32f303disco/board.mk @@ -2,7 +2,7 @@ CFLAGS += \ -DHSE_VALUE=8000000 \ -DSTM32F303xC \ -mthumb \ - -mabi=aapcs-linux \ + -mabi=aapcs \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ @@ -20,6 +20,7 @@ SRC_C += \ $(ST_HAL_DRIVER)/Src/stm32f3xx_hal.c \ $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_cortex.c \ $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc_ex.c \ $(ST_HAL_DRIVER)/Src/stm32f3xx_hal_gpio.c SRC_S += \ diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index 509110d7d..f5b3da899 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -37,16 +37,28 @@ #define BUTTON_PIN GPIO_PIN_0 #define BUTTON_STATE_ACTIVE 1 -void board_init(void) -{ - #if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); - #endif - /* Configure the system clock to 72 MHz */ +/** + * @brief System Clock Configuration + * The system Clock is configured as follow : + * System Clock source = PLL (HSE) + * SYSCLK(Hz) = 72000000 + * HCLK(Hz) = 72000000 + * AHB Prescaler = 1 + * APB1 Prescaler = 2 + * APB2 Prescaler = 1 + * HSE Frequency(Hz) = 8000000 + * HSE PREDIV = 1 + * PLLMUL = RCC_PLL_MUL9 (9) + * Flash Latency(WS) = 2 + * @param None + * @retval None + */ +static void SystemClock_Config(void) +{ RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit; /* Enable HSE Oscillator and activate PLL with HSE as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; @@ -57,14 +69,32 @@ void board_init(void) RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; HAL_RCC_OscConfig(&RCC_OscInitStruct); + /* Configures the USB clock */ + HAL_RCCEx_GetPeriphCLKConfig(&RCC_PeriphClkInit); + RCC_PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; + HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit); + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 - clocks dividers */ + clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - (void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + + /* Enable Power Clock */ + __HAL_RCC_PWR_CLK_ENABLE(); +} + +void board_init(void) +{ + #if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + #endif + + SystemClock_Config(); // Notify runtime of frequency change. SystemCoreClockUpdate(); @@ -86,27 +116,16 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + /* Configure USB DM and DP pins */ + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF14_USB; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - // Start USB clock + // Enable USB clock __HAL_RCC_USB_CLK_ENABLE(); - -#if 0 - RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN; - - // USB Pin Init - // PA9- VUSB, PA10- ID, PA11- DM, PA12- DP - // PC0- Power on - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; - GPIOA->MODER |= GPIO_MODER_MODE9_1 | GPIO_MODER_MODE10_1 | \ - GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1; - GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL9_Pos) | \ - (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | \ - (10 << GPIO_AFRH_AFSEL12_Pos); - - // Pullup required on ID, despite the manual claiming there's an - // internal pullup already (page 1245, Rev 17) - GPIOA->PUPDR |= GPIO_PUPDR_PUPD10_0; -#endif } //--------------------------------------------------------------------+ From de659be83e0c479179a077325371b7c7e2b15e84 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 17:37:23 +0700 Subject: [PATCH 33/35] tested all the stm32f4 board, work great --- hw/bsp/stm32f072disco/stm32f072disco.c | 1 + hw/bsp/stm32f303disco/stm32f303disco.c | 3 ++- hw/bsp/stm32f407disco/stm32f407disco.c | 14 +++++--------- hw/bsp/stm32f411disco/stm32f411disco.c | 6 +++--- hw/bsp/stm32f412disco/stm32f412disco.c | 8 ++++---- hw/bsp/stm32h743nucleo/board.mk | 7 +++++++ hw/bsp/stm32h743nucleo/stm32h743nucleo.c | 2 ++ 7 files changed, 24 insertions(+), 17 deletions(-) diff --git a/hw/bsp/stm32f072disco/stm32f072disco.c b/hw/bsp/stm32f072disco/stm32f072disco.c index cb9a1ddb5..2faa00db9 100644 --- a/hw/bsp/stm32f072disco/stm32f072disco.c +++ b/hw/bsp/stm32f072disco/stm32f072disco.c @@ -106,6 +106,7 @@ void board_init(void) // USB Pins // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c index f5b3da899..ae369ed5b 100644 --- a/hw/bsp/stm32f303disco/stm32f303disco.c +++ b/hw/bsp/stm32f303disco/stm32f303disco.c @@ -83,7 +83,7 @@ static void SystemClock_Config(void) RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); - /* Enable Power Clock */ + /* Enable Power Clock */ __HAL_RCC_PWR_CLK_ENABLE(); } @@ -117,6 +117,7 @@ void board_init(void) HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); /* Configure USB DM and DP pins */ + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; diff --git a/hw/bsp/stm32f407disco/stm32f407disco.c b/hw/bsp/stm32f407disco/stm32f407disco.c index 2eb5148d2..16cec3e9a 100644 --- a/hw/bsp/stm32f407disco/stm32f407disco.c +++ b/hw/bsp/stm32f407disco/stm32f407disco.c @@ -106,14 +106,10 @@ void board_init(void) // Notify runtime of frequency change. SystemCoreClockUpdate(); - __HAL_RCC_GPIOA_CLK_ENABLE(); // button, USB D+/D- - __HAL_RCC_GPIOD_CLK_ENABLE(); // LED - GPIO_InitTypeDef GPIO_InitStruct; // LED __HAL_RCC_GPIOD_CLK_ENABLE(); - GPIO_InitStruct.Pin = LED_PIN; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; @@ -123,20 +119,17 @@ void board_init(void) board_led_write(false); // Button + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = BUTTON_PIN; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLDOWN; GPIO_InitStruct.Speed = GPIO_SPEED_FAST; HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); - // Enable USB OTG clock - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - // USB Pin Init // PA9- VUSB, PA10- ID, PA11- DM, PA12- DP - __HAL_RCC_GPIOA_CLK_ENABLE(); - /* Configure DM DP Pins */ + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; @@ -157,6 +150,9 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // Enable USB OTG clock + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); } //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32f411disco/stm32f411disco.c b/hw/bsp/stm32f411disco/stm32f411disco.c index 541416c22..ce8753432 100644 --- a/hw/bsp/stm32f411disco/stm32f411disco.c +++ b/hw/bsp/stm32f411disco/stm32f411disco.c @@ -106,12 +106,10 @@ void board_init(void) // Notify runtime of frequency change. SystemCoreClockUpdate(); - __HAL_RCC_GPIOA_CLK_ENABLE(); // button, USB D+/D- - __HAL_RCC_GPIOD_CLK_ENABLE(); // LED - GPIO_InitTypeDef GPIO_InitStruct; // LED + __HAL_RCC_GPIOD_CLK_ENABLE(); GPIO_InitStruct.Pin = LED_PIN; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; @@ -121,6 +119,7 @@ void board_init(void) board_led_write(false); // Button + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = BUTTON_PIN; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLDOWN; @@ -132,6 +131,7 @@ void board_init(void) /* Configure USB FS GPIOs */ /* Configure USB D+ D- Pins */ + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; diff --git a/hw/bsp/stm32f412disco/stm32f412disco.c b/hw/bsp/stm32f412disco/stm32f412disco.c index a4a687f95..0a3ae7365 100644 --- a/hw/bsp/stm32f412disco/stm32f412disco.c +++ b/hw/bsp/stm32f412disco/stm32f412disco.c @@ -126,13 +126,10 @@ void board_init(void) //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif - __HAL_RCC_GPIOA_CLK_ENABLE(); // button, USB D+/D- - __HAL_RCC_GPIOE_CLK_ENABLE(); // LED - __HAL_RCC_GPIOG_CLK_ENABLE(); // USB power switch IO pin - GPIO_InitTypeDef GPIO_InitStruct; // LED + __HAL_RCC_GPIOE_CLK_ENABLE(); GPIO_InitStruct.Pin = LED_PIN; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; @@ -142,6 +139,7 @@ void board_init(void) board_led_write(false); // Button + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = BUTTON_PIN; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLDOWN; @@ -150,6 +148,7 @@ void board_init(void) /* Configure USB FS GPIOs */ /* Configure USB D+ D- Pins */ + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; @@ -172,6 +171,7 @@ void board_init(void) HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* Configure POWER_SWITCH IO pin */ + __HAL_RCC_GPIOG_CLK_ENABLE(); GPIO_InitStruct.Pin = GPIO_PIN_8; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; GPIO_InitStruct.Pull = GPIO_NOPULL; diff --git a/hw/bsp/stm32h743nucleo/board.mk b/hw/bsp/stm32h743nucleo/board.mk index ae1ea4366..8a5013b82 100644 --- a/hw/bsp/stm32h743nucleo/board.mk +++ b/hw/bsp/stm32h743nucleo/board.mk @@ -39,3 +39,10 @@ INC += \ # For TinyUSB port source VENDOR = st CHIP_FAMILY = synopsys + +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI + +# flash target using on-board stlink +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32h743nucleo/stm32h743nucleo.c b/hw/bsp/stm32h743nucleo/stm32h743nucleo.c index 9f4c50692..2e02786ee 100644 --- a/hw/bsp/stm32h743nucleo/stm32h743nucleo.c +++ b/hw/bsp/stm32h743nucleo/stm32h743nucleo.c @@ -158,6 +158,7 @@ void board_init(void) GPIO_InitStruct.Alternate = GPIO_AF10_OTG2_HS; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + // LED __HAL_RCC_GPIOB_CLK_ENABLE(); GPIO_InitStruct.Pin = LED_PIN; @@ -166,6 +167,7 @@ void board_init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + // Button __HAL_RCC_GPIOC_CLK_ENABLE(); GPIO_InitStruct.Pin = BUTTON_PIN; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; From a3f1c269e9f16d86e82862be09d119a882b059c4 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 18:02:27 +0700 Subject: [PATCH 34/35] added stm32f767nucleo board, board_test works --- hw/bsp/stm32f767nucleo/STM32F767ZITx_FLASH.ld | 169 +++++++ hw/bsp/stm32f767nucleo/board.mk | 48 ++ hw/bsp/stm32f767nucleo/stm32f767nucleo.c | 209 ++++++++ hw/bsp/stm32f767nucleo/stm32f7xx_hal_conf.h | 472 ++++++++++++++++++ hw/bsp/stm32h743nucleo/board.mk | 3 - src/tusb_option.h | 12 +- 6 files changed, 905 insertions(+), 8 deletions(-) create mode 100644 hw/bsp/stm32f767nucleo/STM32F767ZITx_FLASH.ld create mode 100644 hw/bsp/stm32f767nucleo/board.mk create mode 100644 hw/bsp/stm32f767nucleo/stm32f767nucleo.c create mode 100644 hw/bsp/stm32f767nucleo/stm32f7xx_hal_conf.h diff --git a/hw/bsp/stm32f767nucleo/STM32F767ZITx_FLASH.ld b/hw/bsp/stm32f767nucleo/STM32F767ZITx_FLASH.ld new file mode 100644 index 000000000..0b6d5a494 --- /dev/null +++ b/hw/bsp/stm32f767nucleo/STM32F767ZITx_FLASH.ld @@ -0,0 +1,169 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F767ZITx Device with +** 2048KByte FLASH, 512KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +** (c)Copyright Ac6. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Ac6 permit registered System Workbench for MCU users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the System Workbench for MCU toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20080000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/hw/bsp/stm32f767nucleo/board.mk b/hw/bsp/stm32f767nucleo/board.mk new file mode 100644 index 000000000..62a31d894 --- /dev/null +++ b/hw/bsp/stm32f767nucleo/board.mk @@ -0,0 +1,48 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 \ + -DSTM32F767xx \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m7 \ + -mfloat-abi=hard \ + -mfpu=fpv5-d16 \ + -nostdlib -nostartfiles \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F7 + +# The -Wno-error=sign-compare line is required due to STM32F7xx_HAL_Driver. +CFLAGS += -Wno-error=shadow + +ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F7xx_HAL_Driver +ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F7xx + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/$(BOARD)/STM32F767ZITx_FLASH.ld + +SRC_C += \ + $(ST_CMSIS)/Source/Templates/system_stm32f7xx.c \ + $(ST_HAL_DRIVER)/Src/stm32f7xx_hal.c \ + $(ST_HAL_DRIVER)/Src/stm32f7xx_hal_cortex.c \ + $(ST_HAL_DRIVER)/Src/stm32f7xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32f7xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32f7xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32f7xx_hal_pwr_ex.c + +SRC_S += \ + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s + +INC += \ + $(TOP)/hw/mcu/st/st_driver/CMSIS/Include \ + $(TOP)/$(ST_CMSIS)/Include \ + $(TOP)/$(ST_HAL_DRIVER)/Inc \ + $(TOP)/hw/bsp/$(BOARD) + +# For TinyUSB port source +VENDOR = st +CHIP_FAMILY = synopsys + +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI + +# flash target using on-board stlink +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32f767nucleo/stm32f767nucleo.c b/hw/bsp/stm32f767nucleo/stm32f767nucleo.c new file mode 100644 index 000000000..5ac2ddb72 --- /dev/null +++ b/hw/bsp/stm32f767nucleo/stm32f767nucleo.c @@ -0,0 +1,209 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 William D. Jones (thor0505@comcast.net), + * Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" + +#include "stm32f7xx.h" +#include "stm32f7xx_hal_conf.h" + +#define LED_PORT GPIOB +#define LED_PIN GPIO_PIN_14 +#define LED_STATE_ON 1 + +#define BUTTON_PORT GPIOC +#define BUTTON_PIN GPIO_PIN_13 +#define BUTTON_STATE_ACTIVE 1 + +/** + * @brief System Clock Configuration + * The system Clock is configured as follow : + * System Clock source = PLL (HSE) + * SYSCLK(Hz) = 216000000 + * HCLK(Hz) = 216000000 + * AHB Prescaler = 1 + * APB1 Prescaler = 4 + * APB2 Prescaler = 2 + * HSE Frequency(Hz) = 8000000 + * PLL_M = 8 + * PLL_N = 432 + * PLL_P = 2 + * PLL_Q = 9 + * PLL_R = 7 + * VDD(V) = 3.3 + * Main regulator output voltage = Scale1 mode + * Flash Latency(WS) = 7 + * The USB clock configuration from PLLSAI: + * PLLSAIP = 8 + * PLLSAIN = 384 + * PLLSAIQ = 7 + * @param None + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 432; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 9; + RCC_OscInitStruct.PLL.PLLR = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Activate the OverDrive to reach the 216 MHz Frequency */ + HAL_PWREx_EnableOverDrive(); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7); +} + +void board_init(void) +{ + #if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + #endif + + SystemClock_Config(); + + SystemCoreClockUpdate(); + + GPIO_InitTypeDef GPIO_InitStruct; + + // LED + __HAL_RCC_GPIOB_CLK_ENABLE(); + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + + // Button + __HAL_RCC_GPIOC_CLK_ENABLE(); + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + + /* Configure USB FS GPIOs */ + /* Configure DM DP Pins */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure VBUS Pin */ + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure ID pin */ + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Enable USB FS Clocks */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + HAL_GPIO_WritePin(LED_PORT, LED_PIN, state); +} + +uint32_t board_button_read(void) +{ + return HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN); +} + +int board_uart_read(uint8_t* buf, int len) +{ + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + return 0; +} + + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +void HardFault_Handler (void) +{ + asm("bkpt"); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/stm32f767nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f767nucleo/stm32f7xx_hal_conf.h new file mode 100644 index 000000000..44093d69c --- /dev/null +++ b/hw/bsp/stm32f767nucleo/stm32f7xx_hal_conf.h @@ -0,0 +1,472 @@ +/** + ****************************************************************************** + * @file stm32f7xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F7xx_HAL_CONF_H +#define __STM32F7xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +/* #define HAL_ADC_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +#define HAL_FLASH_MODULE_ENABLED +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +/* #define HAL_I2C_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +#define HAL_PWR_MODULE_ENABLED +/* #define HAL_QSPI_MODULE_ENABLED */ +#define HAL_RCC_MODULE_ENABLED +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_SPI_MODULE_ENABLED */ +/* #define HAL_TIM_MODULE_ENABLED */ +/* #define HAL_UART_MODULE_ENABLED */ +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_CORTEX_MODULE_ENABLED +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_MDIOS_MODULE_ENABLED */ + + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */ + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1 */ + +/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ +/* LAN8742A PHY Address*/ +#define LAN8742A_PHY_ADDRESS 0x00 +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) + +#define PHY_READ_TO ((uint32_t)0x0000FFFF) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ + +#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */ + + +#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ +#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 1U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f7xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f7xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f7xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f7xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f7xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f7xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "stm32f7xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f7xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f7xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f7xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f7xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f7xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f7xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f7xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f7xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f7xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f7xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f7xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f7xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f7xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f7xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f7xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f7xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f7xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f7xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f7xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f7xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f7xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f7xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f7xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f7xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f7xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f7xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f7xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f7xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f7xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f7xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f7xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f7xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f7xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f7xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f7xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f7xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_JPEG_MODULE_ENABLED + #include "stm32f7xx_hal_jpeg.h" +#endif /* HAL_JPEG_MODULE_ENABLED */ + +#ifdef HAL_MDIOS_MODULE_ENABLED + #include "stm32f7xx_hal_mdios.h" +#endif /* HAL_MDIOS_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F7xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32h743nucleo/board.mk b/hw/bsp/stm32h743nucleo/board.mk index 8a5013b82..1ecb311ab 100644 --- a/hw/bsp/stm32h743nucleo/board.mk +++ b/hw/bsp/stm32h743nucleo/board.mk @@ -9,9 +9,6 @@ CFLAGS += \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32H7 -# The -Wno-error=sign-compare line is required due to STM32H7xx_HAL_Driver. -CFLAGS += -Wno-error=sign-compare - ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32H7xx_HAL_Driver ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32H7xx diff --git a/src/tusb_option.h b/src/tusb_option.h index dc76ce5f6..eccb4245c 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -52,11 +52,13 @@ #define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51 // ST Synopsis OTG devices -#define OPT_MCU_STM32F4 300 ///< ST STM32F4 -#define OPT_MCU_STM32F3 301 ///< ST STM32F0x0 -#define OPT_MCU_STM32H7 302 ///< ST STM32H7 -#define OPT_MCU_STM32F0 303 ///< ST STM32F0 -#define OPT_MCU_STM32F1 304 ///< ST STM32F1 +#define OPT_MCU_STM32F0 300 ///< ST STM32F0 +#define OPT_MCU_STM32F1 301 ///< ST STM32F1 +#define OPT_MCU_STM32F2 302 ///< ST STM32F2 +#define OPT_MCU_STM32F3 303 ///< ST STM32F3 +#define OPT_MCU_STM32F4 304 ///< ST STM32F4 +#define OPT_MCU_STM32F7 305 ///< ST STM32F7 +#define OPT_MCU_STM32H7 306 ///< ST STM32H7 /** @} */ From 7f166d860deb3da6d538fe356c026446cb2d48e1 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 11 Sep 2019 21:34:04 +0700 Subject: [PATCH 35/35] stm32f7 work with dcd synopsis close #124 --- README.md | 2 +- docs/boards.md | 1 + src/portable/st/synopsys/dcd_synopsys.c | 18 +++++++++++++----- 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/README.md b/README.md index d6aed0b57..9a5cc3af9 100644 --- a/README.md +++ b/README.md @@ -55,7 +55,7 @@ The stack supports the following MCUs - **Nordic:** nRF52840 - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC18xx, LPC40xx, LPC43xx, LPC51Uxx - **MicroChip:** SAMD21, SAMD51 (device only) -- **ST:** STM32F0, STM32F3, STM32F4, STM32H7 (device only) +- **ST:** STM32F0, STM32F3, STM32F4, STM32F7, STM32H7 (device only) [Here is the list of supported Boards](docs/boards.md) diff --git a/docs/boards.md b/docs/boards.md index 8cb22788a..48cb333b9 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -47,6 +47,7 @@ This code base already had supported for a handful of following boards - [STM32F407vg Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) - [STM32F411ve Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html) - [STM32F412zg Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html) +- [Nucleo STM32F767zi](https://www.st.com/en/evaluation-tools/nucleo-f767zi.html) - [Nucleo H743zi](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html) ## Add your own board diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c index 57f01d1ac..56660643d 100644 --- a/src/portable/st/synopsys/dcd_synopsys.c +++ b/src/portable/st/synopsys/dcd_synopsys.c @@ -28,20 +28,28 @@ #include "tusb_option.h" #if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_STM32F4 || \ - CFG_TUSB_MCU == OPT_MCU_STM32H7 ) + CFG_TUSB_MCU == OPT_MCU_STM32H7 || \ + CFG_TUSB_MCU == OPT_MCU_STM32F7) +// TODO Support OTG_HS +// EP_MAX : Max number of bi-directional endpoints including EP0 +// EP_FIFO_SIZE : Size of dedicated USB SRAM #if CFG_TUSB_MCU == OPT_MCU_STM32F4 #include "stm32f4xx.h" - // TODO Merge with OTG_HS - // Max endpoints for each direction + #define EP_MAX USB_OTG_FS_MAX_IN_ENDPOINTS #define EP_FIFO_SIZE USB_OTG_FS_TOTAL_FIFO_SIZE #elif CFG_TUSB_MCU == OPT_MCU_STM32H7 #include "stm32h7xx.h" - // TODO There is no equivalent macro for max endpoints in H7 header. - #define EP_MAX 8 + + #define EP_MAX 9 #define EP_FIFO_SIZE 4096 // TODO The official name of the USB FS peripheral on H7 is "USB2_OTG_FS". +#else + #include "stm32f7xx.h" + + #define EP_MAX 6 + #define EP_FIFO_SIZE 1280 #endif #include "device/dcd.h"