From 4c9c13c767bb41b3cb3cb36810f5898fb966caae Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 26 Nov 2019 18:21:46 +0700
Subject: [PATCH] add uart sync support

---
 hw/bsp/samg55xplained/board.mk         |  2 ++
 hw/bsp/samg55xplained/samg55xplained.c | 30 ++++++++++++++++++++++++--
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk
index 8d4d11df3..1fd137465 100644
--- a/hw/bsp/samg55xplained/board.mk
+++ b/hw/bsp/samg55xplained/board.mk
@@ -20,10 +20,12 @@ SRC_C += \
 	$(ASF_DIR)/samg55/gcc/gcc/startup_samg55j19.c \
 	$(ASF_DIR)/samg55/gcc/system_samg55j19.c \
 	$(ASF_DIR)/hpl/core/hpl_init.c \
+	$(ASF_DIR)/hpl/usart/hpl_usart.c \
 	$(ASF_DIR)/hpl/pmc/hpl_pmc.c \
 	$(ASF_DIR)/hal/src/hal_atomic.c
 
 INC += \
+  $(TOP)/hw/bsp/$(BOARD) \
 	$(TOP)/$(ASF_DIR) \
 	$(TOP)/$(ASF_DIR)/config \
 	$(TOP)/$(ASF_DIR)/samg55/include \
diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c
index 8377424fe..b66b906a0 100644
--- a/hw/bsp/samg55xplained/samg55xplained.c
+++ b/hw/bsp/samg55xplained/samg55xplained.c
@@ -26,6 +26,7 @@
 #include "sam.h"
 #include "peripheral_clk_config.h"
 #include "hal/include/hal_init.h"
+#include "hal/include/hpl_usart_sync.h"
 #include "hpl/pmc/hpl_pmc.h"
 #include "hal/include/hal_gpio.h"
 
@@ -41,6 +42,15 @@
 #define BUTTON_STATE_ACTIVE   0
 
 
+#define UART_TX_PIN           GPIO(GPIO_PORTA, 28)
+#define UART_RX_PIN           GPIO(GPIO_PORTA, 27)
+
+//struct usart_async_descriptor _edbg_com;
+//static uint8_t _edbg_com_buf[64];
+
+struct _usart_sync_device _edbg_com;
+
+
 //------------- IMPLEMENTATION -------------//
 void board_init(void)
 {
@@ -61,6 +71,17 @@ void board_init(void)
 	gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
 	gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
 
+	// Uart via EDBG Com
+	_pmc_enable_periph_clock(ID_FLEXCOM7);
+	gpio_set_pin_function(UART_RX_PIN, MUX_PA27B_FLEXCOM7_RXD);
+	gpio_set_pin_function(UART_TX_PIN, MUX_PA28B_FLEXCOM7_TXD);
+//	_usart_sync_init(&_edbg_com, FLEXCOM7, _edbg_com_buf, sizeof(_edbg_com_buf), _usart_get_usart_async());
+	_usart_sync_init(&_edbg_com, FLEXCOM7);
+	_usart_sync_set_baud_rate(&_edbg_com, CFG_BOARD_UART_BAUDRATE);
+	_usart_sync_set_mode(&_edbg_com, USART_MODE_ASYNCHRONOUS);
+	_usart_sync_enable(&_edbg_com);
+
+
 #if CFG_TUSB_OS  == OPT_OS_NONE
   // 1ms tick timer (samd SystemCoreClock may not correct)
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
@@ -100,8 +121,13 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-  (void) buf; (void) len;
-  return 0;
+  uint8_t const * buf8 = (uint8_t const *) buf;
+  for(int i=0; i<len; i++)
+  {
+    while ( !_usart_sync_is_ready_to_send(&_edbg_com) ) {}
+    _usart_sync_write_byte(&_edbg_com, buf8[i]);
+  }
+  return len;
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE