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62.23)) (stroke (width 0) (type default)) (uuid c9baa4a4-340c-469b-98a8-41f819975c7f) ) (wire (pts (xy 111.76 32.385) (xy 114.3 32.385)) (stroke (width 0) (type default)) (uuid d4172845-7cd1-4d3c-aede-c5997b4947a5) ) (wire (pts (xy 111.76 74.295) (xy 114.3 74.295)) (stroke (width 0) (type default)) (uuid db6d0801-cc64-48ec-b564-5c66b88c09a8) ) (wire (pts (xy 30.48 20.32) (xy 38.1 20.32)) (stroke (width 0) (type default)) (uuid eb83fb75-f5ea-4b5d-81a6-084f6be53c54) ) (wire (pts (xy 73.025 52.07) (xy 71.12 52.07)) (stroke (width 0) (type default)) (uuid ec280b96-95d1-4065-acff-6575dffab865) ) (wire (pts (xy 123.19 29.21) (xy 121.92 29.21)) (stroke (width 0) (type default)) (uuid fa65cf14-4e47-47ba-8ee7-4713cc2879eb) ) (wire (pts (xy 111.76 32.385) (xy 111.76 29.21)) (stroke (width 0) (type default)) (uuid fe09c68d-9d04-4bd5-a2bb-0e1129cbfa9b) ) (text "UART:\nwe alway use UART0 for debuging\ndisabling it, including boot log, is not used\n\nESP32-S2 has 2 UARTs,\nallowing to simulate only one SIM\n\ndon't use UART1 pins IO17/IO18,\nso we can disable pins using GPIO matrix\n\nUART TX/RX could be shared, but requires more code\nESP32 has no half-duplex handling" (at 90.805 102.235 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 0a115273-e1bb-4a02-abfa-94aea91f893c) ) (text "strapping pins:\nIO45, internal pull-down, VDD_SPI = 3.3V\nIO46, internal pull-down, must be 0\nIO0, external pull-up, boot 1=SPI 0=download\n\nIO18: U1RX pull up high to avoid dl error\nIO39-42: JTAG" (at 48.895 112.395 90) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 0d555310-4e2c-4eb3-985e-8c686d4cc886) ) (text "press while booting to\nstart ESP download mode" (at 126.365 44.45 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 6a33fb99-0aad-4ee6-9c23-16a612d44c7e) ) (text "pulse counter:\nESP32 has only one PCTN\n\nwe use a GPIO for easy clock\nactivation/stop using ISR,\ninstead of shared with PCTN\n\npulse counter control signals:\n- 1x LED controller output for precise periodic pulse\n- 1x GPIO interrupt input to detect end of pulse\n- 1x PCTN input to gate pulse counter" (at 144.145 99.695 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 7010e21e-e788-4be1-b425-1c537026c6af) ) (text "press to\nreset MCU" (at 126.365 24.765 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid 76d935ea-040f-407e-8620-850617f50768) ) (text "press while booting to\nstart DFU mode\nhold while running to\nerase settings" (at 125.73 67.31 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid a7602ef7-b5c9-47be-afb6-b2c2b70f5837) ) (text "ADC:\nmax. volage is Vref = 1.1V (1.0-1.2V)\nwith 11dB attenuation it's 2.6V" (at 153.035 73.025 0) (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid fb138311-1ffe-494f-adb4-02e844462725) ) (global_label "LED_ACT" (shape input) (at 170.815 35.56 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 037e633e-77e3-4bf5-9974-d8998875c5f9) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 181.4617 35.56 0) (effects (font (size 1.27 1.27)) (justify left) hide) ) ) (global_label "RX" (shape input) (at 21.59 78.74 180) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify right)) (uuid 0fa95135-9ca5-444b-a9ff-2d0bc349d469) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 16.2047 78.74 0) (effects (font (size 1.27 1.27)) (justify right) hide) ) ) (global_label "PCTN_CTRL" (shape output) (at 73.025 62.23 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 23c14dd1-304a-4a81-a287-e592412ab813) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 86.2722 62.23 0) (effects (font (size 1.27 1.27)) (justify left) hide) ) ) (global_label "LED_ACT" (shape output) (at 71.12 102.87 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 334989b2-124a-4512-8538-c3a2d657da41) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 81.7667 102.87 0) (effects (font (size 1.27 1.27)) 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(fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid c33d22e9-c1a3-4306-8636-269bcc32f6a3) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 82.3715 100.33 0) (effects (font (size 1.27 1.27)) (justify left) hide) ) ) (global_label "TX" (shape output) (at 21.59 76.2 180) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify right)) (uuid d31ade40-39e5-45f7-8434-68d50c6627fd) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 16.5071 76.2 0) (effects (font (size 1.27 1.27)) (justify right) hide) ) ) (global_label "DFU" (shape bidirectional) (at 123.19 71.12 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid d4e97ab4-7214-47ae-9216-43cbbbbf2511) (property "Intersheetrefs" "${INTERSHEET_REFS}" (at 130.8962 71.12 0) (effects (font (size 1.27 1.27)) (justify left) hide) ) ) (hierarchical_label "ADC_VCC" (shape input) (at 71.12 34.29 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 0fcf0b5f-7d90-4415-b336-e48b4b69c174) ) (hierarchical_label "SIM_CLK" (shape input) (at 73.025 54.61 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 13198f08-d29f-4b9d-84cd-72d9dccae7be) ) (hierarchical_label "SIM_I{slash}O" (shape bidirectional) (at 72.39 44.45 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 2063b9f5-e768-437f-9139-552b4b5bd8f7) ) (hierarchical_label "RST" (shape input) (at 123.19 29.21 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 29c25198-20b2-461b-afac-f7acb954421e) ) (hierarchical_label "SIM_RST" (shape input) (at 73.025 52.07 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 3326d318-708c-49f2-bac4-0a2b97cc526d) ) (hierarchical_label "BL" (shape input) (at 71.12 31.75 0) (fields_autoplaced) (effects (font (size 1.27 1.27)) (justify left)) (uuid 431e11c0-b294-4d7a-9ccd-f8fddb4e20d4) ) (hierarchical_label "SIM_DIR" (shape output) (at 73.025 49.53 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(property "Footprint" "" (at 111.76 32.385 0) (effects (font (size 1.27 1.27)) hide) ) (property "Datasheet" "" (at 111.76 32.385 0) (effects (font (size 1.27 1.27)) hide) ) (pin "1" (uuid b68ab92f-68df-461f-9087-9f5015e81e80)) (instances (project "rsim" (path "/43fc3289-82a7-492c-a423-3030e10115dc" (reference "#PWR040") (unit 1) ) (path "/43fc3289-82a7-492c-a423-3030e10115dc/df84ae28-e731-4d68-9a84-c3604d666e38" (reference "#PWR047") (unit 1) ) ) ) ) (symbol (lib_id "power:GND") (at 46.99 125.73 0) (mirror y) (unit 1) (in_bom yes) (on_board yes) (dnp no) (fields_autoplaced) (uuid 0f943703-6522-4932-8f38-f8569fb9208a) (property "Reference" "#PWR051" (at 46.99 132.08 0) (effects (font (size 1.27 1.27)) hide) ) (property "Value" "GND" (at 46.99 130.81 0) (effects (font (size 1.27 1.27)) hide) ) (property "Footprint" "" (at 46.99 125.73 0) (effects (font (size 1.27 1.27)) hide) ) (property "Datasheet" "" (at 46.99 125.73 0) (effects (font (size 1.27 1.27)) hide) ) (pin "1" (uuid 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(reference "#PWR051") (unit 1) ) ) ) ) (symbol (lib_name "resistor/R0603 1K_1") (lib_id "partdb:resistor/R0603 1K") (at 167.005 24.765 0) (unit 1) (in_bom yes) (on_board yes) (dnp no) (uuid 1ec23e60-5f43-4e82-9e6d-edbb2f1470be) (property "Reference" "R10" (at 167.005 22.225 0) (effects (font (size 1.27 1.27))) ) (property "Value" "TBD" (at 167.005 24.765 0) (effects (font (size 1.27 1.27))) ) (property "Footprint" "qeda:UC1608X55N" (at 167.005 24.765 0) (effects (font (size 1.27 1.27)) hide) ) (property "Datasheet" "resistor, chip, 1.6x0.8 mm" (at 167.005 24.765 0) (effects (font (size 1.27 1.27)) hide) ) (property "qeda_part" "resistor/r0603" (at 167.005 24.765 0) (effects (font (size 1.27 1.27)) hide) ) (property "qeda_variant" "" (at 167.005 24.765 0) (effects (font (size 1.27 1.27)) hide) ) (property "JLCPCB_CORRECTION" "0;0;-90" (at 167.005 24.765 0) (effects (font (size 1.27 1.27)) hide) ) (property "Description" "1K ±5%" (at 167.005 24.765 0) (effects (font (size 1.27 1.27)) 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