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@ -1,3 +1,3 @@ |
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[submodule "library"] |
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path = library |
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url = http://git.cuvoodoo.info/qeda_library |
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url = https://git.cuvoodoo.info/kingkevin/qeda_library |
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|
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@ -0,0 +1,45 @@ |
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v2 |
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== |
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|
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this has major fixes for version 1: |
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|
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- missing crystal resistor |
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- 3.3V dip using larger capacitor |
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- 6-40V feedback |
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- DFP over-current |
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|
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v1 |
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== |
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|
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this is a complete re- board layout. |
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it does not fit an off-the selves enclosure anymore. |
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all SMD parts are on one side to allow easier SMT assembly. |
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|
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fixes: |
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|
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- 6-40V power input activated when UFP is connected |
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- use current limit on DFP (prevents USB to reset when DFP is shorted) |
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- 6-40V power input capacitor now lays down |
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- remove copper plane under crystal to prevent impedance error |
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|
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errors: |
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|
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- crystal still does not start |
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- none of the two possible OCS inputs (Dx04 XOR Dx05) work |
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- power dip causes reset when enabling all 7 DFP power outputs at once |
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v0 |
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== |
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|
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this version has been designed to fit in a 100x60x25mm enclosure. |
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this makes it very compact, and not all surface mount parts fit on one side. |
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this is not too much of an issue since it's a hand soldered prototype. |
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|
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the prototype mostly works, with a couple of small errors: |
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|
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- 6-40V power input is not activated unless the hub is already powered (through USB or 5V input) |
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- crystal oscillator doesn't always start. I think the underlying copper plane skewed the impedance/capacitance too much |
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- USB-A footprint has inverted pinout: just solder it on the other side and don't swap the data pins in the EEPROM configuration |
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- fuse on downstream port is not fast enough to prevent shorts and causes the hub to reset |
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- 6-40V power input capacitor is too tall and does not fit in the case |
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- one of the LEDS on port 3 is misplaced |
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@ -0,0 +1,96 @@ |
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this will describe how to generate the output files form the sources. |
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|
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requirements |
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============ |
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|
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to be able to generate the outputs you need following software: |
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|
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- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files) |
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- [QEDA](http://qeda.org/): to generate footprints for the parts |
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- [Lepton EDA](https://github.com/lepton-eda/lepton-eda): for the schematic capture |
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- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout |
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the output generation is automatized. |
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|
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compiling |
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========= |
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|
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library |
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------- |
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|
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almost all of the symbols and footprints used in the schematic and board layout are defined in the [QEDA](http://qeda.org/) format and generated for the CAD software. |
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the `library` folder contains the QEDA parts definitions. |
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|
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to install QEDA using NPM from the official repository: |
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~~~ |
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sudo npm install -g qeda |
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~~~ |
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|
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to install QEDA from the sources: |
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~~~ |
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git clone https://github.com/qeda/qeda |
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cd qeda |
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npm install |
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sudo npm install --global |
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~~~ |
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|
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to generate the parts: |
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~~~ |
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rake library |
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~~~ |
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|
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this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder. |
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|
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only the QEDA parts in subfolders within `library` come from the [QEDA library](https://doc.qeda.org/library/), but the files are included in this project for simplicity and archiving purposes. |
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all other parts are custom and written for this project. |
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|
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schematic |
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--------- |
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the `.sch` file is the schematic source file. |
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it has been drawn using [Lepton EDA](https://github.com/lepton-eda/lepton-eda). |
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|
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it uses standard symbols, and the ones in the `geda/symbols/` folder. |
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most symbols are generated by QEDA as described above. |
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|
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to export as pdf: |
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~~~ |
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rake print |
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~~~ |
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|
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BOM |
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--- |
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|
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to export the bill of material (as CSV): |
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~~~ |
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rake bom |
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~~~ |
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|
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board |
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----- |
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|
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the `.lht` file is the board layout source file. |
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it has been drawn using [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/). |
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|
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it uses the symbols from the `coraleda/subc/` folder. |
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most symbols are generated by QEDA as described above. |
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`oshw_logo.lht` is just the Open Source Hardware Logo. |
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it been generated from https://oshwlogo.cuvoodoo.info/. |
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|
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to export gerber files for PCB manufacturer (and photo preview + overview document): |
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~~~ |
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rake fabrication |
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~~~ |
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|
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flashing |
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======== |
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|
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the USB hub gets its configuration from an external EEPROM. |
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running `eeprom.rb` will generate the EEPROM configuration in `eeprom.bin`. |
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this must then be flashed on the board EEPROM. |
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it is possible to flash it in circuit using the corresponding header, and by holding the RST signal low to prevent the USB hub from interfering with the communication. |
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to flash it using [minipro](https://gitlab.com/DavidGriffith/minipro/): |
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~~~ |
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minipro --device "AT24C16@SOIC8" --write eeprom.bin -s |
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~~~ |
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@ -1,88 +1,169 @@ |
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these are the hardware design files for **insert project name here**. |
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the CuVoodoo USB hub is a 7-port USB 2.0 hub meant for device testing. |
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|
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purpose |
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======= |
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|
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usage |
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===== |
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most USB hubs are super cheap and crappy, leading to poor connection and data transfer. |
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there are industrial USB hubs, but they are bulky and very expensive. |
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to solve this issue I decided to design my own USB hub, tailored to my needs. |
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|
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requirements |
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============ |
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when developing and testing hardware, you often end with a lot of USB devices connected (serial debugger, programmer, logic analyzer, ...). |
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USB allows to have up to 128 devices, but only with a maximum depth of 7. |
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thus you are only allowed to have a maximum of 5 USB hubs between computer and devices, and I often have to plan my setup to not reach this limit. |
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most 7-port USB hubs use two 4-port USB hub, the seconds being connected to the first. |
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there are some exceptions to that, but they are rare, old, and often not advertised as such. |
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this heavily limits the actual number of end devices. |
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the CuVoodoo USB hub is a 7-port flat USB hub, preventing reaching this limit too fast. |
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|
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to be able to generate the outputs you need following software: |
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the upstream and downstream USB ports are individually ESD protected. |
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this safety becomes important when developing, testing, and handling bare electronic devices. |
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this also comes in handy when connecting circuit with different ground potentials. |
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ESD protections already saved my day twice this way. |
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the issue is that they can blow without you noticing, but at least they protected the device once. |
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|
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- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files) |
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- [QEDA](http://qeda.org/): to generate footprints for the parts |
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- [Lepton EDA](https://github.com/lepton-eda/lepton-eda): for the schematic capture |
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- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout |
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the output generation is automatized. |
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each output port is current limited to 500 mA. |
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no USB 2.0 device should draw more that this specified limit. |
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it if does, there is very probably an issue with the device. |
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this protection allows to isolate the faulty device and not have it affect all other connected devices, or the hub itself. |
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see `current limitation` below for more details. |
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|
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compiling |
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========= |
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each downstream port is power controlled. |
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this allows to remotely switch on and off individual devices. |
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this is an important requirement when developing and testing devices, which require a power cycle. |
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additionally, a switch next to the USB port can force the power off state. |
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|
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library |
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------- |
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the USB hub can be self-powered (through the USB input port), externally powered by 5V, or externally powered by anything between 6 and 40V. |
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this allows to use higher voltage power supplies to provide enough current to all ports. |
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the 5V are not feed back to the host. |
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|
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almost all of the symbols and footprints used in the schematic and board layout are defined in the [QEDA](http://qeda.org/) format and generated for the CAD software. |
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the `library` folder contains the QEDA parts definitions. |
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each USB port comes with a high voltage output power port, connected to the high voltage input port. |
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this allows to power devices which require more than 5V, with a maximum or 5A, such as 12V externally powered devices. |
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these power outputs are controllable along the USB port. |
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as with the 5V USB power output, this allows to remotely switch on an off individual devices. |
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|
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to install QEDA using NPM from the official repository: |
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~~~ |
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sudo npm install -g qeda |
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~~~ |
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each port has status LEDs, indicating the speed and power status of the connected device. |
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|
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to install QEDA from the sources: |
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~~~ |
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git clone https://github.com/qeda/qeda |
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cd qeda |
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npm install |
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sudo npm install --global |
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~~~ |
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the board uses proper impedance and differential signal routing to provide clean USB signals. |
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|
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to generate the parts: |
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~~~ |
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rake library |
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~~~ |
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design choice |
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============= |
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|
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USB 2.0 |
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------- |
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|
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this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder. |
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this hub is only for USB 2.0 devices. |
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these are by far most of the devices I develop. |
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it makes it simpler and keeps the cost reasonable. |
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I often even disable USB 3.0 because of the 13-device limitation of the Intel xHCI. |
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when I need USB 3.0 for the very few devices, I connected them to the computer directly. |
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|
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only the QEDA parts in subfolders within `library` come from the [QEDA library](https://doc.qeda.org/library/), but the files are included in this project for simplicity and archiving purposes. |
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all other parts are custom and written for this project. |
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USB2517 |
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------- |
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schematic |
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I wanted to use the FE2.1 7-port USB hub chip. |
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it does not need an external voltage regulator or crystal. |
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it is easier to solder thanks to its TQFP package, and provides all required functionalities. |
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sadly I could not find a source for the 64-pin packages, and the 48-pin variant does not provide all required functionalities. |
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thus I had to fall back to the Microchip USB2517, which uses a harder to solder QFN package. |
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|
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power control |
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------------- |
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|
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some USB hub chips allow to remotely control the power output on individual ports. |
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this capability is here also used to control the power on the higher voltage output. |
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thus you can completely power off even larger target devices. |
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current limitation |
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------------------ |
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|
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the USB hub has current limitation on the output. |
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this does limit the current to 500 mA, but only in constant current mode. |
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following current limiters have been tested: |
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- 0.5A PPTC fuse: it takes too long to trigger (> 1s), and switch off is not reliably detected |
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- MT9700: it has no over-current signal |
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- SY6288AAAC: the (fixed) current limit is not 0.6A, but around 1.5A |
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- TJ2242GSF6: over-current is only detected after 3s (instead of specified 100us, probably caused by thermal shutdown), and it is not signaled |
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- DIO7553ST6: works as expected and wished |
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|
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the power distribution switch detects the over-current state and asserts the fault flag after 10 ms. |
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after 0.1 ms (as set in OC_TIMER, in Configuration Data Byte 2, in EEPROM) the hub will switch off power. |
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this also clears the over-current state. |
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after 100 ms the HUB will re-enable power. |
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this loop will repeat indefinitely. |
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no over-current is reported to the host in this case (when the over-current is cleared while power is off). |
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it is only reported when the OCS is asserted for longer (unknown time, with OCS kept low also when powered off). |
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this is a flaw of the USB2517, where the over-current is only reported if it can't control the power state. |
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I did not find a configuration option for this aspect in the datasheet. |
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|
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LED color |
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--------- |
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|
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the `.sch` file is the schematic source file. |
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it has been drawn using [Lepton EDA](https://github.com/lepton-eda/lepton-eda). |
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the USB specification, LEDs are used as port indicator (section 11.5.3) |
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- off: powered off/disconnected |
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- amber: current limitation reached |
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- green: enabled or transmitting |
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|
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it uses standard symbols, and the ones in the `geda/symbols/` folder. |
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most symbols are generated by QEDA as described above. |
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instead the following color scheme is used: |
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|
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- green off: power off or over-current |
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- green on: power on |
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- red: low speed device connected |
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- blue: full speed device connected |
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- purple (red+blue): high speed device connected |
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- red and blue off: disconnected or in sleep |
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|
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power output |
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------------ |
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|
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switching the power of the USB port also switches the 6-40V forward output. |
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when the 6-40V input is not connected, current/voltage feedback from the outputs is blocked. |
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|
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usage |
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===== |
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|
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it mainly works like a regular USB hub, at least when it comes to the data transfer. |
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just plug the device in a port. |
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|
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power on the Downstream Facing Ports (DFPs) is only available when the Upstream Facing Port (UFP) is connected. |
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|
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the hub can operate as bus powered (power coming from the UFP), but it would not be able to provide more than 500 mA across all DFPs. |
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it is preferable to connect an external 5V power supply to be able to provide 500 mA on all DFPs. |
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this will also turn the hub into self powered, not using any power from the UFP. |
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alternatively, you can connect a 6 to 40V power supply on the other power input. |
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the power for the hub and the 5V for the DFP will be derivate from this higher voltage supply. |
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the same higher voltage will be available on the power output next to the individual DFPs. |
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the hub will not switch on until the UFP USB port is connected. |
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|
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a switch next to each DFP allows to turn off the power output on the USB and power ports. |
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the green LED is on when power output is available. |
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|
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the power output on the USB and power ports can also be turned on/off remotely using standard USB commands. |
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this power output control is implemented in [uhubctl](https://github.com/mvp/uhubctl): |
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|
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to export as pdf: |
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~~~ |
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rake print |
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# list controllable USB hub ports |
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sudo uhubctl |
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# switch of port |
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uhubctl --action off --location 1-1.4 --ports 5 |
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~~~ |
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|
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BOM |
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--- |
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EEPROM |
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====== |
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|
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the USB2517 USB hub chip gets its configuration from an EEPROM. |
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to generate the configuration: |
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|
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to export the bill of material (as CSV): |
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~~~ |
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rake bom |
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ruby eeprom.rb |
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~~~ |
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|
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board |
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----- |
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|
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the `.lht` file is the board layout source file. |
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it has been drawn using [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/). |
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this will create the `eeprom.bin` binary file. |
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feel free to adjust the configuration in the generating script, such as the serial number. |
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|
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it uses the symbols from the `coraleda/subc/` folder. |
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most symbols are generated by QEDA as described above. |
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`oshw_logo.lht` is just the Open Source Hardware Logo. |
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it been generated from https://oshwlogo.cuvoodoo.info/. |
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after having soldered all the parts on the board, connect a programmer (here a MiniPRO TL866xx) on the J4 pin header to write the AT24C02 EEPROM: |
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|
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to export gerber files for PCB manufacturer (and photo preview + overview document): |
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~~~ |
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rake fabrication |
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minipro --device "AT24C02@SOIC8" --write eeprom.bin -s |
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~~~ |
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|
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@ -0,0 +1,187 @@ |
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$fn=30; |
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|
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BOARD_WIDTH=96.5; |
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BOARD_HEIGHT=96.0; |
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BOARD_THICKNESS=1.6; |
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HOLE_NW_X=4.0; |
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HOLE_NW_Y=4.0; |
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HOLE_NE_X=92.5; |
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HOLE_NE_Y=4.0; |
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HOLE_SW_X=4.0; |
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HOLE_SW_Y=92.0; |
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HOLE_SE_X=92.5; |
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HOLE_SE_Y=92.0; |
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|
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WALL_SPACE=1.0; |
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WALL_THICKNESS=2.0; |
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HOLE_HEIGHT=15.0; // USB A is 14.5 |
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|
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module pillar() { |
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translate([0,0,HOLE_HEIGHT/2]) { |
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difference() { |
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cylinder(h=HOLE_HEIGHT, d=6, center=true); |
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cylinder(h=HOLE_HEIGHT, d=3.5, center=true); |
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} |
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} |
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} |
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|
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mirror([1,0,0]) { // we used bottom view |
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|
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// bottom plate |
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cube([BOARD_WIDTH+2*WALL_SPACE+2*WALL_THICKNESS, BOARD_HEIGHT+2*WALL_SPACE+2*WALL_THICKNESS, WALL_THICKNESS]); |
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|
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// screw mounts |
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translate([WALL_THICKNESS+WALL_SPACE+HOLE_NW_X,WALL_THICKNESS+WALL_SPACE+HOLE_NW_Y,WALL_THICKNESS]) { |
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pillar(); |
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} |
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translate([WALL_THICKNESS+WALL_SPACE+HOLE_NE_X,WALL_THICKNESS+WALL_SPACE+HOLE_NE_Y,WALL_THICKNESS]) { |
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pillar(); |
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} |
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translate([WALL_THICKNESS+WALL_SPACE+HOLE_SW_X,WALL_THICKNESS+WALL_SPACE+HOLE_SW_Y,WALL_THICKNESS]) { |
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pillar(); |
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} |
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translate([WALL_THICKNESS+WALL_SPACE+HOLE_SE_X,WALL_THICKNESS+WALL_SPACE+HOLE_SE_Y,WALL_THICKNESS]) { |
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pillar(); |
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} |
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|
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// side |
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MARGIN=1.0; |
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USB_B_WIDTH=12.0+MARGIN; |
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USB_B_HEIGHT=11.0+MARGIN; |
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USB_A_WIDTH=7.0+MARGIN; |
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USB_A_HEIGHT=14.5+MARGIN; |
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BARREL_WIDTH=9.0+MARGIN; |
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BARREL_HEIGHT=11.3+MARGIN; |
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INDUCTOR_HEIGHT=7.5; |
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|
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// side north |
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difference() { |
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cube([BOARD_WIDTH+2*WALL_SPACE+2*WALL_THICKNESS, WALL_THICKNESS, WALL_THICKNESS+HOLE_HEIGHT+BOARD_THICKNESS+INDUCTOR_HEIGHT]); |
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// DFP 7 USB A |
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translate([WALL_THICKNESS+WALL_SPACE+12.5-USB_A_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
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cube([USB_A_WIDTH,WALL_THICKNESS,USB_A_HEIGHT]); |
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} |
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// DFP 7 BARREL |
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translate([WALL_THICKNESS+WALL_SPACE+28-BARREL_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
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cube([BARREL_WIDTH,WALL_THICKNESS,BARREL_HEIGHT]); |
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} |
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// DFP 6 USB A |
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translate([WALL_THICKNESS+WALL_SPACE+40.5-USB_A_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
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cube([USB_A_WIDTH,WALL_THICKNESS,USB_A_HEIGHT]); |
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} |
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// DFP 6 BARREL |
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translate([WALL_THICKNESS+WALL_SPACE+56-BARREL_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
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cube([BARREL_WIDTH,WALL_THICKNESS,BARREL_HEIGHT]); |
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} |
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// DFP 5 USB A |
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translate([WALL_THICKNESS+WALL_SPACE+68.5-USB_A_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
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cube([USB_A_WIDTH,WALL_THICKNESS,USB_A_HEIGHT]); |
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} |
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// DFP 5 BARREL |
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translate([WALL_THICKNESS+WALL_SPACE+84-BARREL_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
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cube([BARREL_WIDTH,WALL_THICKNESS,BARREL_HEIGHT]); |
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} |
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} |
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|
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// side west |
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difference() { |
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cube([WALL_THICKNESS, BOARD_HEIGHT+2*WALL_SPACE+2*WALL_THICKNESS, WALL_THICKNESS+HOLE_HEIGHT+BOARD_THICKNESS+INDUCTOR_HEIGHT]); |
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// USB B |
||||
translate([0,WALL_THICKNESS+WALL_SPACE+48-USB_B_WIDTH/2,WALL_THICKNESS+HOLE_HEIGHT-USB_B_HEIGHT]) { |
||||
cube([WALL_THICKNESS,USB_B_WIDTH,USB_B_HEIGHT]); |
||||
} |
||||
// 5V BARREL |
||||
translate([0,WALL_THICKNESS+WALL_SPACE+33-BARREL_WIDTH/2,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
||||
cube([WALL_THICKNESS,BARREL_WIDTH,BARREL_HEIGHT]); |
||||
} |
||||
// 12V BARREL |
||||
translate([0,WALL_THICKNESS+WALL_SPACE+63-BARREL_WIDTH/2,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
||||
cube([WALL_THICKNESS,BARREL_WIDTH,BARREL_HEIGHT]); |
||||
} |
||||
} |
||||
|
||||
// side south |
||||
translate([0,BOARD_HEIGHT+WALL_THICKNESS+2*WALL_SPACE,0]) { |
||||
difference() { |
||||
cube([BOARD_WIDTH+2*WALL_SPACE+2*WALL_THICKNESS, WALL_THICKNESS, WALL_THICKNESS+HOLE_HEIGHT+BOARD_THICKNESS+INDUCTOR_HEIGHT]); |
||||
// DFP 1 USB A |
||||
translate([WALL_THICKNESS+WALL_SPACE+27.5-USB_A_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
||||
cube([USB_A_WIDTH,WALL_THICKNESS,USB_A_HEIGHT]); |
||||
} |
||||
// DFP 1 BARREL |
||||
translate([WALL_THICKNESS+WALL_SPACE+12-BARREL_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
||||
cube([BARREL_WIDTH,WALL_THICKNESS,BARREL_HEIGHT]); |
||||
} |
||||
// DFP 2 USB A |
||||
translate([WALL_THICKNESS+WALL_SPACE+55.5-USB_A_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
||||
cube([USB_A_WIDTH,WALL_THICKNESS,USB_A_HEIGHT]); |
||||
} |
||||
// DFP 2 BARREL |
||||
translate([WALL_THICKNESS+WALL_SPACE+40-BARREL_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
||||
cube([BARREL_WIDTH,WALL_THICKNESS,BARREL_HEIGHT]); |
||||
} |
||||
// DFP 3 USB A |
||||
translate([WALL_THICKNESS+WALL_SPACE+83.5-USB_A_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
||||
cube([USB_A_WIDTH,WALL_THICKNESS,USB_A_HEIGHT]); |
||||
} |
||||
// DFP 3 BARREL |
||||
translate([WALL_THICKNESS+WALL_SPACE+68-BARREL_WIDTH/2,0,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
||||
cube([BARREL_WIDTH,WALL_THICKNESS,BARREL_HEIGHT]); |
||||
} |
||||
} |
||||
} |
||||
|
||||
// side east |
||||
translate([BOARD_WIDTH+WALL_THICKNESS+2*WALL_SPACE,0,0]) { |
||||
difference() { |
||||
cube([WALL_THICKNESS, BOARD_HEIGHT+2*WALL_SPACE+2*WALL_THICKNESS, WALL_THICKNESS+HOLE_HEIGHT+BOARD_THICKNESS+INDUCTOR_HEIGHT]); |
||||
// DFP 4 USB A |
||||
translate([0,WALL_THICKNESS+WALL_SPACE+40.5-USB_A_WIDTH/2,WALL_THICKNESS+HOLE_HEIGHT-USB_A_HEIGHT]) { |
||||
cube([WALL_THICKNESS,USB_A_WIDTH,USB_A_HEIGHT]); |
||||
} |
||||
// DFP 4 BARREL |
||||
translate([0,WALL_THICKNESS+WALL_SPACE+56-BARREL_WIDTH/2,WALL_THICKNESS+HOLE_HEIGHT-BARREL_HEIGHT]) { |
||||
cube([WALL_THICKNESS,BARREL_WIDTH,BARREL_HEIGHT]); |
||||
} |
||||
} |
||||
} |
||||
|
||||
// top plate |
||||
SWITCH_WIDTH=3.0+0.5; |
||||
SWITCH_LENGTH=6.0+0.5; |
||||
|
||||
translate([0,0,WALL_THICKNESS+HOLE_HEIGHT+BOARD_THICKNESS+INDUCTOR_HEIGHT]) { |
||||
difference() { |
||||
cube([BOARD_WIDTH+2*WALL_SPACE+2*WALL_THICKNESS, BOARD_HEIGHT+2*WALL_SPACE+2*WALL_THICKNESS, WALL_THICKNESS]); |
||||
// DFP 7 |
||||
translate([WALL_THICKNESS+WALL_SPACE+20.0, WALL_THICKNESS+WALL_SPACE+6.7,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_WIDTH, SWITCH_LENGTH, WALL_THICKNESS], center=true); |
||||
} |
||||
// DFP 6 |
||||
translate([WALL_THICKNESS+WALL_SPACE+48.0, WALL_THICKNESS+WALL_SPACE+6.7,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_WIDTH, SWITCH_LENGTH, WALL_THICKNESS], center=true); |
||||
} |
||||
// DFP 5 |
||||
translate([WALL_THICKNESS+WALL_SPACE+76.0, WALL_THICKNESS+WALL_SPACE+6.7,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_WIDTH, SWITCH_LENGTH, WALL_THICKNESS], center=true); |
||||
} |
||||
// DFP 4 |
||||
translate([WALL_THICKNESS+WALL_SPACE+89.7, WALL_THICKNESS+WALL_SPACE+48.0,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_LENGTH, SWITCH_WIDTH, WALL_THICKNESS], center=true); |
||||
} |
||||
// DFP 3 |
||||
translate([WALL_THICKNESS+WALL_SPACE+76.0, WALL_THICKNESS+WALL_SPACE+89.3,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_WIDTH, SWITCH_LENGTH, WALL_THICKNESS], center=true); |
||||
} |
||||
// DFP 2 |
||||
translate([WALL_THICKNESS+WALL_SPACE+48.0, WALL_THICKNESS+WALL_SPACE+89.3,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_WIDTH, SWITCH_LENGTH, WALL_THICKNESS], center=true); |
||||
} |
||||
// DFP 1 |
||||
translate([WALL_THICKNESS+WALL_SPACE+20.0, WALL_THICKNESS+WALL_SPACE+89.3,WALL_THICKNESS/2]) { |
||||
cube([SWITCH_WIDTH, SWITCH_LENGTH, WALL_THICKNESS], center=true); |
||||
} |
||||
} |
||||
} |
||||
|
||||
} |
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.8 KiB |
@ -0,0 +1,307 @@ |
||||
# subcircuit generated using QEDA |
||||
li:pcb-rnd-subcircuit-v6 { |
||||
ha:subc.1 { |
||||
uid = CAPC1608X92N............ |
||||
ha:attributes { |
||||
footprint = CAPC1608X92N |
||||
} |
||||
ha:data { |
||||
li:padstack_prototypes { |
||||
ha:ps_proto_v6.2 { |
||||
htop = 0 |
||||
hbottom = 0 |
||||
hdia = 0 |
||||
hplated = 0 |
||||
li:shape { |
||||
ha:ps_shape_v4 { |
||||
clearance = 0.200mm |
||||
li:ps_poly { |
||||
-0.625mm |
||||
-0.550mm |
||||
0.625mm |
||||
-0.550mm |
||||
0.625mm |
||||
0.550mm |
||||
-0.625mm |
||||
0.550mm |
||||
} |
||||
ha:layer_mask { |
||||
top = 1 |
||||
copper = 1 |
||||
} |
||||
ha:combining { |
||||
} |
||||
} |
||||
ha:ps_shape_v4 { |
||||
clearance = 0 |
||||
li:ps_poly { |
||||
-0.675mm |
||||
-0.600mm |
||||
0.675mm |
||||
-0.600mm |
||||
0.675mm |
||||
0.600mm |
||||
-0.675mm |
||||
0.600mm |
||||
} |
||||
ha:layer_mask { |
||||
top = 1 |
||||
mask = 1 |
||||
} |
||||
ha:combining { |
||||
sub = 1 |
||||
auto = 1 |
||||
} |
||||
} |
||||
ha:ps_shape_v4 { |
||||
clearance = 0 |
||||
li:ps_poly { |
||||
-0.625mm |
||||
-0.550mm |
||||
0.625mm |
||||
-0.550mm |
||||
0.625mm |
||||
0.550mm |
||||
-0.625mm |
||||
0.550mm |
||||
} |
||||
ha:layer_mask { |
||||
top = 1 |
||||
paste = 1 |
||||
} |
||||
ha:combining { |
||||
auto = 1 |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
li:objects { |
||||
ha:padstack_ref.23 { |
||||
proto = 2 |
||||
rot = 0 |
||||
x = 0.000mm |
||||
y = -0.750mm |
||||
ha:attributes { |
||||
term = 1 |
||||
name = 1 |
||||
} |
||||
clearance = 0.200mm |
||||
ha:flags { |
||||
clearline = 1 |
||||
} |
||||
} |
||||
ha:padstack_ref.24 { |
||||
proto = 2 |
||||
rot = 0 |
||||
x = 0.000mm |
||||
y = 0.750mm |
||||
ha:attributes { |
||||
term = 2 |
||||
name = 2 |
||||
} |
||||
clearance = 0.200mm |
||||
ha:flags { |
||||
clearline = 1 |
||||
} |
||||
} |
||||
} |
||||
li:layers { |
||||
ha:subc-aux { |
||||
lid = 0 |
||||
ha:type { |
||||
top = 1 |
||||
misc = 1 |
||||
virtual = 1 |
||||
} |
||||
li:objects { |
||||
ha:line.25 { |
||||
clearance = 0 |
||||
thickness = 0.1mm |
||||
ha:attributes { |
||||
subc-role = origin |
||||
} |
||||
x1 = 0.000mm |
||||
x2 = 0.000mm |
||||
y1 = 0.000mm |
||||
y2 = 0.000mm |
||||
} |
||||
ha:line.26 { |
||||
clearance = 0 |
||||
thickness = 0.1mm |
||||
ha:attributes { |
||||
subc-role = x |
||||
} |
||||
x1 = 0.000mm |
||||
x2 = 1.000mm |
||||
y1 = 0.000mm |
||||
y2 = 0.000mm |
||||
} |
||||
ha:line.27 { |
||||
clearance = 0 |
||||
thickness = 0.1mm |
||||
ha:attributes { |
||||
subc-role = y |
||||
} |
||||
x1 = 0.000mm |
||||
x2 = 0.000mm |
||||
y1 = 0.000mm |
||||
y2 = 1.000mm |
||||
} |
||||
ha:line.28 { |
||||
clearance = 0 |
||||
thickness = 0.1mm |
||||
ha:attributes { |
||||
subc-role = pnp-origin |
||||
} |
||||
x1 = 0.000mm |
||||
x2 = 0.000mm |
||||
y1 = 0.000mm |
||||
y2 = 0.000mm |
||||
} |
||||
} |
||||
} |
||||
ha:top-silkscreen { |
||||
lid = 1 |
||||
ha:type { |
||||
top = 1 |
||||
silk = 1 |
||||
} |
||||
li:objects { |
||||
ha:text.29 { |
||||
x = 0.000mm |
||||
y = 0.000mm |
||||
rot = 0 |
||||
scale = 100 |
||||
string = %a.parent.refdes% |
||||
fid = 0 |
||||
ha:flags { |
||||
floater = 1 |
||||
dyntext = 1 |
||||
} |
||||
} |
||||
ha:line.30 { |
||||
x1 = -0.925mm |
||||
y1 = -0.900mm |
||||
x2 = -0.925mm |
||||
y2 = 0.900mm |
||||
thickness = 0.200mm |
||||
clearance = 0 |
||||
} |
||||
ha:line.31 { |
||||
x1 = 0.925mm |
||||
y1 = -0.900mm |
||||
x2 = 0.925mm |
||||
y2 = 0.900mm |
||||
thickness = 0.200mm |
||||
clearance = 0 |
||||
} |
||||
} |
||||
} |
||||
ha:top-assembly { |
||||
lid = 2 |
||||
ha:type { |
||||
top = 1 |
||||
doc = 1 |
||||
} |
||||
purpose = assy |
||||
li:objects { |
||||
ha:arc.32 { |
||||
x = 0.000mm |
||||
y = 0.000mm |
||||
width = 0.500mm |
||||
height = 0.500mm |
||||
thickness = 0.100mm |
||||
astart = 0 |
||||
adelta = 360 |
||||
clearance = 0 |
||||
} |
||||
ha:line.33 { |
||||
x1 = -0.700mm |
||||
y1 = 0.000mm |
||||
x2 = 0.700mm |
||||
y2 = 0.000mm |
||||
thickness = 0.100mm |
||||
clearance = 0 |
||||
} |
||||
ha:line.34 { |
||||
x1 = 0.000mm |
||||
y1 = -0.700mm |
||||
x2 = 0.000mm |
||||
y2 = 0.700mm |
||||
thickness = 0.100mm |
||||
clearance = 0 |
||||
} |
||||
ha:text.35 { |
||||
x = 0.000mm |
||||
y = 0.000mm |
||||
rot = 90 |
||||
scale = 53 |
||||
string = CAPC1608X92N |
||||
fid = 0 |
||||
ha:flags { |
||||
floater = 1 |
||||
} |
||||
} |
||||
ha:line.36 { |
||||
x1 = -0.400mm |
||||
y1 = -0.800mm |
||||
x2 = 0.400mm |
||||
y2 = -0.800mm |
||||
thickness = 0.100mm |
||||
clearance = 0 |
||||
} |
||||
ha:line.37 { |
||||
x1 = 0.400mm |
||||
y1 = -0.800mm |
||||
x2 = 0.400mm |
||||
y2 = 0.800mm |
||||
thickness = 0.100mm |
||||
clearance = 0 |
||||
} |
||||
ha:line.38 { |
||||
x1 = 0.400mm |
||||
y1 = 0.800mm |
||||
x2 = -0.400mm |
||||
y2 = 0.800mm |
||||
thickness = 0.100mm |
||||
clearance = 0 |
||||
} |
||||
ha:line.39 { |
||||
x1 = -0.400mm |
||||
y1 = 0.800mm |
||||
x2 = -0.400mm |
||||
y2 = -0.800mm |
||||
thickness = 0.100mm |
||||
clearance = 0 |
||||
} |
||||
} |
||||
} |
||||
ha:top-courtyard { |
||||
lid = 3 |
||||
ha:type { |
||||
top = 1 |
||||
doc = 1 |
||||
} |
||||
purpose = ko.courtyard |
||||
li:objects { |
||||
ha:polygon.40 { |
||||
li:geometry { |
||||
ta:contour { |
||||
{ -0.875mm; -1.550mm } |
||||
{ -0.875mm; -1.050mm } |
||||
{ -0.875mm; 1.050mm } |
||||
{ -0.875mm; 1.550mm } |
||||
{ 0.875mm; 1.550mm } |
||||
{ 0.875mm; 1.050mm } |
||||
{ 0.875mm; -1.050mm } |
||||
{ 0.875mm; -1.550mm } |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
@ -0,0 +1,428 @@ |
||||
# subcircuit generated using QEDA |
||||
li:pcb-rnd-subcircuit-v6 { |
||||
ha:subc.1 { |
||||
uid = CAPPRD200W45D500H700N... |
||||
ha:attributes { |
||||
footprint = CAPPRD200W45D500H700N |
||||
} |
||||
ha:data { |
||||
li:padstack_prototypes { |
||||
ha:ps_proto_v6.2 { |
||||
htop = 0 |
||||
hbottom = 0 |
||||
hdia = 0.650mm |
||||
hplated = 1 |
||||
li:shape { |
||||
ha:ps_shape_v4 { |
||||
clearance = 0.200mm |
||||
li:ps_poly { |
||||
-0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
} |
||||
ha:layer_mask { |
||||
top = 1 |
||||
copper = 1 |
||||
} |
||||
ha:combining { |
||||
} |
||||
} |
||||
ha:ps_shape_v4 { |
||||
clearance = 0 |
||||
li:ps_poly { |
||||
-0.575mm |
||||
-0.575mm |
||||
0.575mm |
||||
-0.575mm |
||||
0.575mm |
||||
0.575mm |
||||
-0.575mm |
||||
0.575mm |
||||
} |
||||
ha:layer_mask { |
||||
top = 1 |
||||
mask = 1 |
||||
} |
||||
ha:combining { |
||||
sub = 1 |
||||
auto = 1 |
||||
} |
||||
} |
||||
ha:ps_shape_v4 { |
||||
clearance = 0.200mm |
||||
li:ps_poly { |
||||
-0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
} |
||||
ha:layer_mask { |
||||
intern = 1 |
||||
copper = 1 |
||||
} |
||||
ha:combining { |
||||
} |
||||
} |
||||
ha:ps_shape_v4 { |
||||
clearance = 0.200mm |
||||
li:ps_poly { |
||||
-0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
0.525mm |
||||
-0.525mm |
||||
0.525mm |
||||
} |
||||
ha:layer_mask { |
||||
bottom = 1 |
||||
copper = 1 |
||||