doc: overall improvement

doc: fix picture links
doc: add pictures
2022-11-14 23:40:17 +01:00 · 2022-11-13 16:11:36 +01:00 · 2022-11-13 16:10:28 +01:00 · 2022-11-13 15:58:20 +01:00 · 2022-11-13 15:54:54 +01:00 · 2022-11-13 15:54:17 +01:00
63 changed files with 16781 additions and 1575 deletions
--- a/.gitignore
+++ b/.gitignore
@ -1,31 +1,35 @@
+# schematic lepton-EDA
+*.sch
+
+# board layout pcb-rnd
+*.lht
 *.lht.*
-*.versioned.lht
+
+# KiCAD
+*.kicad_prl
+*.kicad_pro-bak
+*.xml
+fp-info-cache
+
+# temporary files
 *~
-*.versioned.sch
+\#*\#
+
+# outputs
 *.svg
+*.png
 *.pdf
 *.ps
 *.zip
-*.brd.*
-*.ast
-*.g2l
-*.g3l
-*.gbl
-*.gbo
-*.gbp
-*.gbs
-*.gko
-*.gtl
-*.gto
-*.gtp
-*.gts
-*.xln
-*.tdx
-\#*\#
-*.notes.txt
 *.bom.csv
-*.cost.csv
 *.cpl.csv
+*.versioned.*
+fabrication
+
+# scripts and utilities
 *.json
 *.rb
-geda/footprints/
+
+# panel files
+panel.*
+panel
--- a/.qeda.yaml
+++ b/.qeda.yaml
@ -1,10 +1,23 @@
 config:
-  output: coraleda
+  output: kicad
  pattern:
    densityLevel: 'N'
    lineWidth:
      silkscreen: 0.2
    polarityMark: none
-    preferManufacturer: false
+    preferManufacturer: true
    smoothPadCorners: false
 library:
+  - capacitor/c0603
+  - connector/usb-c_xkb_u262-24xn-4bv60
+  - transistor/pmos_40p05
+  - ic/comparator_lm393@so
+  - diode/zener@sod523
+  - resistor/r0603
+  - connector/header-2.54@1x10
+  - diode/schottky@sod523
+  - connector/usb-c_xkb_u261-24xn-4bc2ls
+  - diode/bav74
+  - vreg/ldo_holtek_ht75xx
+  - ic/comparator_lm339@tssop
+  - diode/led0603
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@ -0,0 +1,52 @@
+v2
+--
+
+first production batch.
+redrawn in KiCAD.
+removed debug pins.
+
+v1
+--
+
+second prototype built.
+
+needs a couple of small fixes, but works much better.
+
+fixes (from v0):
+- an LDO replaces the zener diode as voltage reference
+- the voltage reference (2.1V) is below common-mode input-voltage range
+- USB-C plug tab mounting holes made larger
+
+additions:
+- quad op-amp instead of dual op-amp is used
+- other 2 op-amp circuits are used to indicate over-voltage using an LED
+- more compact dual common-cathode diodes are used
+
+errors:
+- no decoupling caps around LDO
+- no clearance around USB-C receptacle mount holes, causing the non-plated hole to be fabbed plated, and shorting ground to internal layers
+
+v0
+--
+
+first prototype, with pin header to debug
+
+the over-voltage protection is based on an design described by Texas Instruments, in Analog Engineer's Circuit: Amplifiers, SNOAA20, Overvoltage protection with comparator circuit.
+
+this design is not ideal for our case though.
+a Zener diode is used as reference voltage.
+it requires at least 1 mA to operate.
+this is already a lot for my application.
+but 1 mA is when VBUS is at it's minimum of 4.75V.
+at 35V this would result in 21 mA.
+this power is mainly dissipated by the resistor limiting the current going through the diode.
+the dissipated ~0.6W exceeds the 0.1W rating of the resistor, also heating up a zone of the board to 100 °C.
+the reference voltage is current dependent, thus the cutoff voltage goes above 5.5V.
+this is not too much of a problem because VBUS also exceeds this voltage, but it's not ideal.
+
+design errors:
+
+- the footprint for the USB-C plug has too small mounting holes
+- the LM393 is actually an open-collector comparator, but the circuit uses it as push-pull
+- the zener diode needs at least 1 mA to be used as voltage reference, not 10 µA (Ileakage and Ibias/Ikz are mixed)
+- the design does not respect the common-mode input-voltage range (up to Vcc-2)
--- a/DEVELOPMENT.md
+++ b/DEVELOPMENT.md
@ -1,19 +1,22 @@
-this will describe how to generate the output file form the sources.
+this will describe how to generate the output files form the sources.

 requirements
 ============

-to be able to generate the outputs you need following software:
+to be able to generate the outputs, you need following software:

- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files)
 - [QEDA](http://qeda.org/): to generate footprints for the parts
- [Lepton EDA](https://github.com/lepton-eda/lepton-eda): for the schematic capture
- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout
-the output generation is automatized.
+- [KiCad](https://www.kicad.org/): EDA software used for schematic capture and board layout
+- [PcbDraw](https://github.com/yaqwsx/PcbDraw): to generate board layout rendering
+- [KiKit](https://github.com/yaqwsx/KiKit): to generate fabrications files (Gerber, Excellon)
+- [KiAuto](https://github.com/INTI-CMNB/KiAuto): to generate schematic printout (PDF)
+- [KiBoM](https://github.com/SchrodingersGat/KiBoM): to generate Bill of Material (CSV)

 compiling
 =========

+to generate schematic, BoM, board render, and fabrication output, run `make`.
+
 library
 -------

@ -21,11 +24,13 @@ almost all of the symbols and footprints used in the schematic and board layout
 the `library` folder contains the QEDA parts definitions.

 to install QEDA using NPM from the official repository:
+
 ~~~
 sudo npm install -g qeda
 ~~~

 to install QEDA from the sources:
+
 ~~~
 git clone https://github.com/qeda/qeda
 cd qeda
@ -34,49 +39,59 @@ sudo npm install --global
 ~~~

 to generate the parts:
+
 ~~~
-rake library
+make lib
 ~~~

-this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder.
-
-only the QEDA parts in subfolders within `library` come from the [QEDA library](https://doc.qeda.org/library/), but the files are included in this project for simplicity and archiving purposes.
-all other parts are custom and written for this project.
+this will use the parts definition (.yaml files) in the `library` to generate the symbols (.sym files) and footprints used by KiCAD in the `kicad` folder.

 schematic
 ---------

-the `.sch` file is the schematic source file.
-it has been drawn using [Lepton EDA](https://github.com/lepton-eda/lepton-eda).
+the `.kicad_sch` file is the schematic source file.
+it has been drawn using the [KiCAD eeschema](https://www.kicad.org/) schematic editor.

-it uses standard symbols, and the ones in the `geda/symbols/` folder.
+it uses standard symbols, and the ones in the `kicad/` folder.
 most symbols are generated by QEDA as described above.

 to export as pdf:
+
 ~~~
-rake print
+make print
 ~~~

 BOM
 ---

 to export the bill of material (as CSV):
+
 ~~~
-rake bom
+make bom
 ~~~

 board
 -----

-the `.lht` file is the board layout source file.
-it has been drawn using  [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/).
+the `.kicad_brd` file is the board layout source file.
+it has been drawn using the [KiCAD pcbnew](https://docs.kicad.org/6.0/en/pcbnew/pcbnew.html) PCB editor.

-it uses the symbols from the `coraleda/subc/` folder.
+it uses the footprints from the `kicad/` folder.
 most symbols are generated by QEDA as described above.
-`oshw_logo.lht` is just the Open Source Hardware Logo.
-it been generated from https://oshwlogo.cuvoodoo.info/.

 to export gerber files for PCB manufacturer (and photo preview + overview document):
+
 ~~~
-rake fabrication
+make fabrication
 ~~~
+
+versioning
+----------
+
+the source schematic and board layout do not include version information.
+when generating schematic or board fabrication output, a copy of the source files with date and version information is done as `.versioned.` files.
+the date corresponds to the last changes (i.e. commit).
+the version is formatted as `v.r`:
+
+- `v` corresponds to the major version information defined in `version`
+- `r` corresponds to the total number of changes done to the source files
--- a/JLCPCB_CORRECTION.csv
+++ b/JLCPCB_CORRECTION.csv
@ -0,0 +1,12 @@
+package;x;y;rot
+LEDC2012X80N;0;0;-90
+LEDC1608X90N;0;0;-90
+UC1608X55N;0;0;-90
+CAPC1608X92N;0;0;-90
+SOT95P237X112-3N;0;0;180
+CONNECTOR_MY-1220-03;0;-1.1;0
+CONNECTOR_XKB_U262-24XN-4BV64;0;-1.3;0
+CONNECTOR_U231-09XN-4BLRA00;0;-3.0;0
+SOP254P976X355-14N;0;0;-90
+SOP65P640X120-20N;0;0;-90
+CONNECTOR_HDMI-001S;0;1.1;0
--- a/80
+++ b/80
@ -0,0 +1,80 @@
+# project file name (use for schematic and board layout)
+NAME ?= pd_blocker
+# path to qeda
+QEDA := qeda
+# path to InteractiveHtmlBom
+IBOMGEN := /usr/share/kicad/scripting/plugins/InteractiveHtmlBom/generate_interactive_bom.py
+
+# read project version
+VERSION := $(shell cat version)
+# current date for stamping output
+DATE = $(shell date +%Y-%m-%d)
+# revision based on number of changes on schematic or board layout
+REVISION := $(shell git log --pretty=oneline "${NAME}.kicad_sch" "${NAME}.kicad_pcb" | wc -l)
+
+# generate file with version information
+VERSIONED_EXT = kicad_sch kicad_pcb kicad_pro json
+define version_rule
+%.versioned.$1: %.$1
+	cp $$< $$@
+	sed --in-place 's/\$$$$version\$$$$/${VERSION}/g' $$@
+	sed --in-place 's/\$$$$date\$$$$/${DATE}/g' $$@
+	sed --in-place 's/\$$$$revision\$$$$/${REVISION}/g' $$@
+endef
+$(foreach EXT,$(VERSIONED_EXT),$(eval $(call version_rule,$(EXT))))
+
+FABRICATION_DIR := fabrication
+IBOM := ${FABRICATION_DIR}/ibom.html
+
+all: ${NAME}.sch.pdf ${NAME}.brd-top.png ${NAME}.brd-bot.png ${NAME}.bom.csv fab
+
+fab: ${FABRICATION_DIR} ${IBOM}
+
+# generate fabrication files (gerbers/drill/BoM/PnP)
+${FABRICATION_DIR}: ${NAME}.versioned.kicad_sch ${NAME}.versioned.kicad_pcb
+	kikit fab jlcpcb --drc --assembly --schematic $^ $@
+
+# generate interactive BoM
+${IBOM}: ${NAME}.versioned.kicad_pcb
+	$(IBOMGEN) --no-browser --dest-dir `dirname $@` --name-format `basename $@ ".html"` --show-fields "Value" $< &>/dev/null
+
+# generate symbols and footprints from parts
+lib:
+	$(QEDA) generate qeda
+
+# generate printable version (PDF) of schematic
+%.sch.pdf: %.versioned.kicad_sch %.versioned.kicad_pro
+	eeschema_do export $< .
+	mv $*.versioned.pdf $@
+
+# generate render from layout (top side)
+%.brd-top.png: %.versioned.kicad_pcb
+	pcbdraw --silent $< --dpi 600 $@
+
+# generate render from layout (bottom side)
+%.brd-bot.png: %.versioned.kicad_pcb
+	pcbdraw --silent $< --dpi 600 --back $@
+
+# export Bill of Material (as CSV)
+%.bom.csv: %.versioned.kicad_sch %.versioned.kicad_pro
+	eeschema_do bom_xml $< .
+	kibom $*.versioned.xml $@
+
+# generate panel
+PANEL_DIR := panel
+panel: panel.kicad_pcb
+panel.kicad_pcb: ${NAME}.versioned.kicad_pcb ${NAME}.versioned.kicad_pro ${NAME}.versioned.kicad_sch ${NAME}.versioned.json
+	kikit panelize -p ${NAME}.versioned.json ${NAME}.versioned.kicad_pcb $@
+	sed --in-place 's/\"missing_courtyard\": \"warning\"/\"missing_courtyard\": \"ignore\"/g' $(patsubst %.kicad_pcb,%.kicad_pro,$@) # the mouse bites don't have a courtyard
+	kikit fab jlcpcb --drc --assembly --missingError --schematic ${NAME}.versioned.kicad_sch $@ ${PANEL_DIR}
+	pcbdraw --silent $@ --dpi 600 panel.brd-top.png
+	pcbdraw --silent $@ --dpi 600 --back panel.brd-bot.png
+
+clean:
+	rm -f $(foreach EXT,$(VERSIONED_EXT),${NAME}.versioned.$(EXT))
+	rm -f ${NAME}.sch.pdf ${NAME}.brd-top.png ${NAME}.brd-bot.png ${NAME}.versioned.xml ${NAME}.bom.csv
+	rm -f ${NAME}.versioned.kicad_prl ${NAME}.versioned.kicad_pro-bak ${NAME}.versioned.xml ${NAME}.versioned.csv
+	rm -f ${IBOM}
+	rm -rf ${FABRICATION_DIR}
+	rm -f panel.kicad_pcb panel.kicad_pro 
+	rm -rf ${PANEL_DIR}
--- a/README.md
+++ b/README.md
@ -1,7 +1,49 @@
-these are the hardware design files for **insert project name here**.
+The PD blocker removes Power Delivery (PD) capabilities from USB-C connections and provides over-voltage protection.
+
+<img src="picture/v2_front.webp" title="front" height="250"/>
+<img src="picture/v2_back.webp" title="back" height="250"/>

 purpose
 =======

+Some USB-C devices do not require the Power Delivery features available on USB-C, mainly higher voltage and current.
+The device could not even be rated for higher voltages.
+But chargers might be stuck at higher voltage, or mischievous eMarked cables (with PD-capable chips built in) could raise the voltage, permanently damaging it.
+
+The PD blocker protects your [expensive] USB-C device from such damages.
+
 usage
 =====
+
+Insert the PD blocker in line, between the power source (e.g. charger or host computer), cable, and your device.
+It can be inserted between any two of these components, and will work the same.
+Plug and receptacle can be either side, and it is reversible along the axis of the connectors (like normal USB-C connectors).
+
+The PD blocker will prevent any Power Delivery communication, such as raising the voltage.
+And when over-voltage is detected (Vbus > 5.5V), power is cut and an OVP LED indicating the culprit side lights up.
+Connect the PD blocker before the target device for the protection to take effect before it can reach it.
+
+All other features of USB-C are preserved (e.g. USB2, USB3, USB4, SBU, orientation detection)
+Some alternate modes requiring PD communication will not work anymore though.
+
+mode of operation
+=================
+
+To prevent PD communication, capacitors are placed on the CC lines.
+They smooth out the 300 Kbps BMC signal used for PD communication.
+It still allows the identification of Rp, Rd, and Ra used for orientation and role detection.
+
+Additionally there is an over-voltage protection circuit.
+VBUS (on either side) is compared to a reference voltage.
+When VBUS is below 5.5V, p-channel MOSFETs are switched on, and allow VBUS going from one side to the other.
+When VBUS is above 5.5V, the p-channel MOSFETs are switched off, and prevent VBUS interconnection, cutting the power.
+
+warning
+=======
+
+The PD blocker can block up to 36V.
+PD rev 2.0 specifies voltages up to 20V.
+PD rev 3.0 specifies voltages up to 48V, but I haven't seen any power source using this new capability yet.
+
+The PD blocker can take a seconds (at 5.6V) until the over-voltage protection take effect.
+Connect the PD blocker before the target device for the protection to take effect before it can reach it.
--- a/180
+++ b/180
@ -1,180 +0,0 @@
-# encoding: utf-8
-# ruby: 2.1.0
-=begin
-Rakefile to manage hardware projects
-
-uses Lepton EDA for schematic and pcb-rnd for board layouts.
-Rakefile instead of Makefile for better text file parsing capabilities.
-=end
-require 'rake/clean'
-require 'csv' # to export BOM and costs
-
-# =================
-# project variables
-# =================
-
-# common name used for file names
-name = "template"
-# project version, read from "version" file
-raise "define project version in 'version' file" unless File.exist? "version"
-version = IO.read("version").split("\n")[0]
-# current date for stamping output
-date = Time.now.strftime("%Y-%m-%d")
-# revision based on number of changes on schematic or board layout and current git commit
-changes = `git log --pretty=oneline "#{name}.sch" "#{name}.lht" | wc -l`.chomp.to_i
-commit = `git rev-parse --short HEAD`.chomp
-revision = "#{changes} (#{commit})"
-
-# path to qeda"
-qeda = "qeda"
-
-# ==========
-# main tasks
-# ==========
-
-desc "main building task"
-task :default => [:print, :fabrication, :bom, :pnp]
-
-desc "print schematic and layout (as pdf)"
-prints = [ "#{name}.sch.pdf", "#{name}.brd.pdf", "#{name}.brd-top.svg", "#{name}.brd-bottom.svg" ]
-task :print => prints
-CLEAN.include([ "#{name}.versioned.sch", "#{name}.versioned.lht" ])
-CLOBBER.include(prints)
-
-desc "generate fabrication gerbers (as archive)"
-gerbers = [ "#{name}.brd.asb", "#{name}.brd.ast", "#{name}.brd.gbl", "#{name}.brd.gbo", "#{name}.brd.gbp", "#{name}.brd.gbs", "#{name}.brd.gko", "#{name}.brd.gtl", "#{name}.brd.gto", "#{name}.brd.gtp", "#{name}.brd.gts", "#{name}.brd.xln", "#{name}.brd.g2l", "#{name}.brd.g3l" ]
-fab = [ "#{name}.brd.zip" ]
-task :fabrication => fab
-CLEAN.include(gerbers)
-CLOBBER.include(fab)
-
-desc "generate symbols and footprints from parts"
-task :library do
-  sh "#{qeda} config output geda"
-  sh "#{qeda} generate ."
-  sh "#{qeda} config output coraleda"
-  sh "#{qeda} generate ."
-end
-
-desc "export BOMs from schematic"
-boms = [ "#{name}.bom.csv" ]
-task :bom => boms
-CLOBBER.include(boms)
-
-desc "export PnP placement"
-pnps = [ "#{name}.cpl.csv" ]
-task :pnp => pnps
-CLOBBER.include(pnps)
-
-# ===============
-# file generation
-# ===============
-
-desc "generate schematic with version information all symbols embedded"
-rule ".versioned.sch" => ".sch" do |t|
-  sh "cp #{t.source} #{t.name}"
-  sh "lepton-embed --embed #{t.name} 2> /dev/null"
-  sh "sed --in-place 's/\\$version\\$/#{version}/' #{t.name}"
-  sh "sed --in-place 's/\\$date\\$/#{date}/' #{t.name}"
-  sh "sed --in-place 's/\\$revision\\$/#{revision}/' #{t.name}"
-end
-
-desc "generate board layout with version information"
-rule ".versioned.lht" => ".lht" do |t|
-  sh "cp #{t.source} #{t.name}"
-  sh "sed --in-place 's/\\$version\\$/#{version}/' #{t.name}"
-  sh "sed --in-place 's/\\$date\\$/#{date}/' #{t.name}"
-  sh "sed --in-place 's/\\$revision\\$/#{revision}/' #{t.name}"
-end
-
-desc "generate printable version (PDF) of schematic"
-rule ".sch.pdf" => ".versioned.sch" do |t|
-  sh "lepton-cli export --color --paper=iso_a4 --layout=landscape --output=#{t.name} #{t.source} 2> /dev/null"
-end
-
-desc "generate printable version (PostScript) of board layout"
-rule ".brd.ps" => ".versioned.lht" do |t|
-  sh "pcb-rnd -x ps --ps-color --media A4 --psfile #{t.name} #{t.source} 2> /dev/null"
-end
-
-desc "generate printable version (PDF) of board layout"
-rule ".brd.pdf" => ".brd.ps" do |t|
-  sh "ps2pdf -sPAPERSIZE=a4 -dEPSCrop #{t.source} #{t.name}"
-end
-
-desc "generate photo realistic picture from layout (top side)"
-rule ".brd-top.svg" => ".versioned.lht" do |t|
-  sh "pcb-rnd -x svg --photo-mode --outfile #{t.name} #{t.source} 2> /dev/null"
-end
-
-desc "generate photo realistic picture from layout (bottom side)"
-rule ".brd-bottom.svg" => ".versioned.lht" do |t|
-  sh "pcb-rnd -x svg --photo-mode --flip --outfile #{t.name} #{t.source} 2> /dev/null"
-end
-
-desc "archive gerbers"
-rule ".brd.zip" => ".versioned.lht" do |t|
-  base = File.basename(t.source, ".versioned.lht")
-  puts base
-  sh "pcb-rnd -x cam gerber:JLC_PCB --outfile #{base}.brd #{t.source} 2> /dev/null"
-  sh "zip --quiet #{t.name} #{base}.brd.xln #{base}.brd.a* #{base}.brd.g*"
-end
-
-desc "generate BOM file from schematic"
-rule ".bom.csv" => ".sch" do |t|
-  attributes = ["device", "value", "description", "footprint", "manufacturer", "mpn", "datasheet", "lcsc", "digikey"]
-  bom_data = bom2(t.prerequisites[0], attributes)
-  CSV.open(t.name, "wb") do |csv|
-    all_attributes = ["refdes","qty"] + attributes
-    csv << all_attributes
-    bom_data.each do |line|
-      csv << all_attributes.collect{|attribute| line[attribute]}
-    end
-  end
-end
-
-desc "generate pick-and-place file from board"
-rule ".cpl.csv" => [".versioned.lht", "mass_prop.sh", "pnp_fab.tab"] do |t|
-  sh "./mass_prop.sh #{t.prerequisites[0]} pnp_fab.tab" # add fab placement offsets
-  sh "pcb-rnd -x XY --xyfile #{t.name} --xy-unit mm --format 'JLCPCB' --vendor jlcpcb #{t.prerequisites[0]}" # export XY file in JLCPCB format
-end
-
-# ================
-# helper functions
-# ================
-
-# generate gnetlist bom2 and parse them
-# arguments: schematic=schematic to use, attributes=attributes to use for generating bom2
-# returns an array of hash. key is the attribute name, value is the attribute value
-def bom2(schematic, attributes)
-  to_return = []
-  # force attributes to be an array
-  attributes = case attributes
-  when String
-   [attributes]
-  when Array
-    attributes
-  else
-    [attributes.to_s]
-  end
-  # generate bom2
-  list = `lepton-netlist --backend bom2 --backend-option attribs=#{attributes*','} --quiet --output - #{schematic} 2> /dev/null`
-  list = list.each_line {|l| '"' + l + '"' + '\n' }
-  list.gsub!(/^(.+)/, '"\1')
-  list.gsub!(/(.+)$/, '\1"')
-  list.gsub!(/(?!http):(?!\/\/)/, '\1":"\2') # protect the values between ':' (such as URLs)
-  # parse bom2
-  csv = CSV.parse(list, col_sep: ":", quote_char: '"')
-  if csv.empty? then
-    $stderr.puts "no parts found for BOM"
-    return []
-  end
-  csv[1..-1].each do |row|
-    line = {}
-    row.each_index do |col|
-      line[csv[0][col]] = row[col] unless row[col] == "unknown"
-    end
-    to_return << line
-  end
-  return to_return
-end
--- a/bom.ini
+++ b/bom.ini
@ -0,0 +1,42 @@
+[BOM_OPTIONS]
+ignore_dnf = 0
+number_rows = 0
+group_connectors = 1
+test_regex = 0
+merge_blank_fields = 1
+output_file_name = %O%V
+
+[IGNORE_COLUMNS]
+; Any column heading that appears here will be excluded from the Generated BoM
+; Titles are case-insensitive
+Part
+Part Lib
+Footprint
+Footprint Lib
+Build Quantity
+sheetpath
+
+[COLUMN_ORDER]
+; Columns will apear in the order they are listed here
+; Titles are case-insensitive
+References
+Value
+Quantity Per PCB
+Description
+Part
+Part Lib
+Footprint
+Footprint Lib
+Build Quantity
+LCSC
+Datasheet
+
+[GROUP_FIELDS]
+; List of fields used for sorting individual components into groups
+; Components which match (comparing *all* fields) will be grouped together
+; Field names are case-insensitive
+Part
+Part Lib
+Value
+Footprint
+Footprint Lib
--- a/coraleda/subc/oshw_logo.lht
+++ b/coraleda/subc/oshw_logo.lht
@ -1,421 +0,0 @@
-# footprint generated from CuVoodoo Land Pattern
-# author: King Kévin
-# version: 1
-# date: 2019-05-13
-li:pcb-rnd-subcircuit-v6 {
- ha:subc.1 {
-  uid = any_24_ASCII_characters_
-  ha:attributes {
-   footprint = open source hardware logo
-  }
-  ha:data {
-   li:padstack_prototypes {
-   }
-   li:objects {
-   }
-   li:layers {
-    ha:top-silkscreen {
-     lid = 1
-     ha:type {
-      top = 1
-      silk = 1
-     }
-     li:objects {
-      ha:line.2{
-       clearance = 0
-       x1 = 0.15mm
-       y1 = 1.8mm
-       x2 = 0.75mm
-       y2 = 1.8mm
-       thickness = 0.3mm
-      }
-      ha:line.3{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 5.8500000000000005mm
-       x2 = 1.8mm
-       y2 = 6.45mm
-       thickness = 0.3mm
-      }
-      ha:line.4{
-       clearance = 0
-       x1 = 5.8500000000000005mm
-       y1 = 1.8mm
-       x2 = 6.45mm
-       y2 = 1.8mm
-       thickness = 0.3mm
-      }
-      ha:line.5{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 0.15mm
-       x2 = 1.8mm
-       y2 = 0.75mm
-       thickness = 0.3mm
-      }
-      ha:line.6{
-       clearance = 0
-       x1 = 0.15mm
-       y1 = 2.4mm
-       x2 = 0.75mm
-       y2 = 2.4mm
-       thickness = 0.3mm
-      }
-      ha:line.7{
-       clearance = 0
-       x1 = 2.4mm
-       y1 = 5.8500000000000005mm
-       x2 = 2.4mm
-       y2 = 6.45mm
-       thickness = 0.3mm
-      }
-      ha:line.8{
-       clearance = 0
-       x1 = 5.8500000000000005mm
-       y1 = 2.4mm
-       x2 = 6.45mm
-       y2 = 2.4mm
-       thickness = 0.3mm
-      }
-      ha:line.9{
-       clearance = 0
-       x1 = 2.4mm
-       y1 = 0.15mm
-       x2 = 2.4mm
-       y2 = 0.75mm
-       thickness = 0.3mm
-      }
-      ha:line.10{
-       clearance = 0
-       x1 = 0.15mm
-       y1 = 3mm
-       x2 = 0.75mm
-       y2 = 3mm
-       thickness = 0.3mm
-      }
-      ha:line.11{
-       clearance = 0
-       x1 = 3mm
-       y1 = 5.8500000000000005mm
-       x2 = 3mm
-       y2 = 6.45mm
-       thickness = 0.3mm
-      }
-      ha:line.12{
-       clearance = 0
-       x1 = 5.8500000000000005mm
-       y1 = 3mm
-       x2 = 6.45mm
-       y2 = 3mm
-       thickness = 0.3mm
-      }
-      ha:line.13{
-       clearance = 0
-       x1 = 3mm
-       y1 = 0.15mm
-       x2 = 3mm
-       y2 = 0.75mm
-       thickness = 0.3mm
-      }
-      ha:line.14{
-       clearance = 0
-       x1 = 0.15mm
-       y1 = 3.5999999999999996mm
-       x2 = 0.75mm
-       y2 = 3.5999999999999996mm
-       thickness = 0.3mm
-      }
-      ha:line.15{
-       clearance = 0
-       x1 = 3.5999999999999996mm
-       y1 = 5.8500000000000005mm
-       x2 = 3.5999999999999996mm
-       y2 = 6.45mm
-       thickness = 0.3mm
-      }
-      ha:line.16{
-       clearance = 0
-       x1 = 5.8500000000000005mm
-       y1 = 3.5999999999999996mm
-       x2 = 6.45mm
-       y2 = 3.5999999999999996mm
-       thickness = 0.3mm
-      }
-      ha:line.17{
-       clearance = 0
-       x1 = 3.5999999999999996mm
-       y1 = 0.15mm
-       x2 = 3.5999999999999996mm
-       y2 = 0.75mm
-       thickness = 0.3mm
-      }
-      ha:line.18{
-       clearance = 0
-       x1 = 0.15mm
-       y1 = 4.2mm
-       x2 = 0.75mm
-       y2 = 4.2mm
-       thickness = 0.3mm
-      }
-      ha:line.19{
-       clearance = 0
-       x1 = 4.2mm
-       y1 = 5.8500000000000005mm
-       x2 = 4.2mm
-       y2 = 6.45mm
-       thickness = 0.3mm
-      }
-      ha:line.20{
-       clearance = 0
-       x1 = 5.8500000000000005mm
-       y1 = 4.2mm
-       x2 = 6.45mm
-       y2 = 4.2mm
-       thickness = 0.3mm
-      }
-      ha:line.21{
-       clearance = 0
-       x1 = 4.2mm
-       y1 = 0.15mm
-       x2 = 4.2mm
-       y2 = 0.75mm
-       thickness = 0.3mm
-      }
-      ha:line.22{
-       clearance = 0
-       x1 = 0.15mm
-       y1 = 4.8mm
-       x2 = 0.75mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.23{
-       clearance = 0
-       x1 = 4.8mm
-       y1 = 5.8500000000000005mm
-       x2 = 4.8mm
-       y2 = 6.45mm
-       thickness = 0.3mm
-      }
-      ha:line.24{
-       clearance = 0
-       x1 = 5.8500000000000005mm
-       y1 = 4.8mm
-       x2 = 6.45mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.25{
-       clearance = 0
-       x1 = 4.8mm
-       y1 = 0.15mm
-       x2 = 4.8mm
-       y2 = 0.75mm
-       thickness = 0.3mm
-      }
-      ha:line.26{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 1.35mm
-       x2 = 4.8mm
-       y2 = 1.35mm
-       thickness = 0.3mm
-      }
-      ha:line.27{
-       clearance = 0
-       x1 = 5.25mm
-       y1 = 1.8mm
-       x2 = 5.25mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.28{
-       clearance = 0
-       x1 = 4.8mm
-       y1 = 5.25mm
-       x2 = 1.8mm
-       y2 = 5.25mm
-       thickness = 0.3mm
-      }
-      ha:line.29{
-       clearance = 0
-       x1 = 1.35mm
-       y1 = 4.8mm
-       x2 = 1.35mm
-       y2 = 1.8mm
-       thickness = 0.3mm
-      }
-      ha:arc.30{
-       clearance = 0
-       x = 1.8mm
-       y = 1.8mm
-       width = 0.45mm
-       height = 0.45mm
-       thickness = 0.3mm
-       astart = 0
-       adelta = -90
-      }
-      ha:arc.31{
-       clearance = 0
-       x = 4.8mm
-       y = 1.8mm
-       width = 0.45mm
-       height = 0.45mm
-       thickness = 0.3mm
-       astart = -90
-       adelta = -90
-      }
-      ha:arc.32{
-       clearance = 0
-       x = 4.8mm
-       y = 4.8mm
-       width = 0.45mm
-       height = 0.45mm
-       thickness = 0.3mm
-       astart = 180
-       adelta = -90
-      }
-      ha:arc.33{
-       clearance = 0
-       x = 1.8mm
-       y = 4.8mm
-       width = 0.45mm
-       height = 0.45mm
-       thickness = 0.3mm
-       astart = 90
-       adelta = -90
-      }
-      ha:line.34{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 1.8mm
-       x2 = 3mm
-       y2 = 1.8mm
-       thickness = 0.3mm
-      }
-      ha:line.35{
-       clearance = 0
-       x1 = 3mm
-       y1 = 1.8mm
-       x2 = 3mm
-       y2 = 3mm
-       thickness = 0.3mm
-      }
-      ha:line.36{
-       clearance = 0
-       x1 = 3mm
-       y1 = 3mm
-       x2 = 1.8mm
-       y2 = 3mm
-       thickness = 0.3mm
-      }
-      ha:line.37{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 3mm
-       x2 = 1.8mm
-       y2 = 1.8mm
-       thickness = 0.3mm
-      }
-      ha:line.38{
-       clearance = 0
-       x1 = 4.8mm
-       y1 = 1.8mm
-       x2 = 3.5999999999999996mm
-       y2 = 1.8mm
-       thickness = 0.3mm
-      }
-      ha:line.39{
-       clearance = 0
-       x1 = 3.5999999999999996mm
-       y1 = 1.8mm
-       x2 = 3.5999999999999996mm
-       y2 = 2.4mm
-       thickness = 0.3mm
-      }
-      ha:line.40{
-       clearance = 0
-       x1 = 3.5999999999999996mm
-       y1 = 2.4mm
-       x2 = 4.8mm
-       y2 = 2.4mm
-       thickness = 0.3mm
-      }
-      ha:line.41{
-       clearance = 0
-       x1 = 4.8mm
-       y1 = 2.4mm
-       x2 = 4.8mm
-       y2 = 3mm
-       thickness = 0.3mm
-      }
-      ha:line.42{
-       clearance = 0
-       x1 = 4.8mm
-       y1 = 3mm
-       x2 = 3.5999999999999996mm
-       y2 = 3mm
-       thickness = 0.3mm
-      }
-      ha:line.43{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 3.5999999999999996mm
-       x2 = 1.8mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.44{
-       clearance = 0
-       x1 = 1.8mm
-       y1 = 4.199999999999999mm
-       x2 = 3mm
-       y2 = 4.199999999999999mm
-       thickness = 0.3mm
-      }
-      ha:line.45{
-       clearance = 0
-       x1 = 3mm
-       y1 = 3.5999999999999996mm
-       x2 = 3mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.46{
-       clearance = 0
-       x1 = 3.5999999999999996mm
-       y1 = 3.5999999999999996mm
-       x2 = 3.5999999999999996mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.47{
-       clearance = 0
-       x1 = 3.5999999999999996mm
-       y1 = 4.8mm
-       x2 = 4.199999999999999mm
-       y2 = 4.2mm
-       thickness = 0.3mm
-      }
-      ha:line.48{
-       clearance = 0
-       x1 = 4.199999999999999mm
-       y1 = 4.2mm
-       x2 = 4.799999999999999mm
-       y2 = 4.8mm
-       thickness = 0.3mm
-      }
-      ha:line.49{
-       clearance = 0
-       x1 = 4.799999999999999mm
-       y1 = 4.8mm
-       x2 = 4.799999999999999mm
-       y2 = 3.5999999999999996mm
-       thickness = 0.3mm
-      }
-     }
-    }
-   }
-  }
- }
-}
--- a/coraleda/subc/qr
+++ b/coraleda/subc/qr
@ -1,39 +0,0 @@
-#!/bin/sh
-
-#@@example qr(hello world, 1mm)
-
-#@@purpose Generate QR code on silk
-
-#@@desc Generate the specified QR code as silk lines
-#@@params text,pixel_size,level
-#@@thumbsize 2
-
-#@@param:text ASCII text to encode
-
-#@@param:pixel_size width and height of each pixel
-#@@dim:pixel_size
-
-#@@param:level error correction level
-#@@optional:level
-#@@enum:level:L low
-#@@enum:level:H high
-#@@default:L
-
-libdir=""
-for n in  $PCB_RND_PCBLIB/parametric `dirname $0` /usr/local/share/pcb-rnd/pcblib/parametric /usr/share/pcb-rnd/pcblib/parametric
-do
-	if test -f "$n/common.awk"
-	then
-		libdir="$n"
-		break
-	fi
-done
-
-if test -z "$libdir"
-then
-	echo "pcblib/parametric/common.awk not found." >&2
-	exit 1
-fi
-
-awk -f $libdir/common.awk -f `dirname $0`/qr.awk -v "args=$*" -v gen=`basename $0` -v "genfull=$0"
-
--- a/coraleda/subc/qr.awk
+++ b/coraleda/subc/qr.awk
@ -1,62 +0,0 @@
-function flush_line(x1, x2, y, w     ,n,yy)
-{
-	x1/=2
-	x2/=2
-	for(n = 0; n < 3; n++) {
-		yy = y*w + w/6 + w/3 * n
-		element_line(x1*w + w/6, yy, x2*w - w/6, yy, w/3)
-	}
-
-	element_line(x1*w + w/6, y*w + w/6, x1*w + w/6, (y+1)*w - w/6, w/3)
-	element_line(x2*w - w/6, y*w + w/6, x2*w - w/6, (y+1)*w - w/6, w/3)
-
-}
-
-BEGIN {
-	help_auto()
-	set_arg(P, "?pixel_size", "1mm")
-
-	proc_args(P, "text,pixel_size,level", "text")
-
-	pixel_size = parse_dim(P["pixel_size"])
-
-	element_begin("", "QR1", "qr(" P["text"] "," P["pixel_size"] "," P["level"] ")"  ,0,0, 0,-mil(50))
-
-	print "# text=" P["text"]
-	cmd = "echo '" P["text"] "' | qrencode -t ASCII"
-
-	if (P["level"] != "") {
-		if (tolower(P["level"]) == "h")
-			cmd = cmd " -l H"
-		else if (tolower(P["level"]) == "l")
-			cmd = cmd " -l L"
-	}
-
-	y = 0;
-	while((cmd | getline line) > 0) {
-		line = line "-"
-#		print line
-		len = length(line)
-		start = ""
-		for(x = 1; x < len; x++) {
-			if (substr(line, x, 1) == "#") {
-				if (start == "")
-					start = x;
-			}
-			else {
-				if (start != "") {
-					flush_line(start, x, y, pixel_size)
-					start = ""
-				}
-			}
-		}
-		if (start != "")
-			flush_line(start, x, y, pixel_size)
-		y++;
-	}
-
-
-#	dimension(+spacing/aspect, -dia, +spacing/aspect, dia, "@" spacing*1.2 ";0", "dia")
-
-	element_end()
-}
--- a/5
+++ b/5
@ -0,0 +1,5 @@
+(fp_lib_table
+  (lib (name "qeda")(type "KiCad")(uri "${KIPRJMOD}/kicad/qeda.pretty")(options "")(descr ""))
+  (lib (name "kikit")(type "KiCad")(uri "${KIPRJMOD}/kicad/kikit.pretty")(options "")(descr ""))
+  (lib (name "custom")(type "KiCad")(uri "${KIPRJMOD}/kicad/custom.pretty")(options "")(descr ""))
+)
--- a/2
+++ b/2
@ -1,2 +0,0 @@
-(source-library  ".")
-(component-library "./geda/symbols/")
--- a/geda/symbols/1V8.sym
+++ b/geda/symbols/1V8.sym
@ -1,18 +0,0 @@
-v 20210407 2
-P 200 0 200 200 1 0 0
-{
-T 250 50 5 6 0 1 0 0 1
-pinnumber=1
-T 250 50 5 6 0 0 0 0 1
-pinseq=1
-T 250 50 5 6 0 1 0 0 1
-pinlabel=1
-T 250 50 5 6 0 1 0 0 1
-pintype=pwr
-}
-T 200 250 9 8 1 0 0 3 1
-1V8
-T 300 0 8 8 0 0 0 0 1
-net=1V8:1
-L 150 100 200 200 3 10 1 0 -1 -1
-L 200 200 250 100 3 10 1 0 -1 -1
--- a/geda/symbols/3V3.sym
+++ b/geda/symbols/3V3.sym
@ -1,18 +0,0 @@
-v 20210407 2
-P 200 0 200 200 1 0 0
-{
-T 250 50 5 6 0 1 0 0 1
-pinnumber=1
-T 250 50 5 6 0 0 0 0 1
-pinseq=1
-T 250 50 5 6 0 1 0 0 1
-pinlabel=1
-T 250 50 5 6 0 1 0 0 1
-pintype=pwr
-}
-T 200 250 9 8 1 0 0 3 1
-3V3
-T 300 0 8 8 0 0 0 0 1
-net=3V3:1
-L 150 100 200 200 3 10 1 0 -1 -1
-L 200 200 250 100 3 10 1 0 -1 -1
--- a/geda/symbols/5V.sym
+++ b/geda/symbols/5V.sym
@ -1,18 +0,0 @@
-v 20210407 2
-P 200 0 200 200 1 0 0
-{
-T 250 50 5 6 0 1 0 0 1
-pinnumber=1
-T 250 50 5 6 0 0 0 0 1
-pinseq=1
-T 250 50 5 6 0 1 0 0 1
-pinlabel=1
-T 250 50 5 6 0 1 0 0 1
-pintype=pwr
-}
-T 200 250 9 8 1 0 0 3 1
-5V
-T 300 0 8 8 0 0 0 0 1
-net=5V:1
-L 150 100 200 200 3 10 1 0 -1 -1
-L 200 200 250 100 3 10 1 0 -1 -1
--- a/geda/symbols/GND.sym
+++ b/geda/symbols/GND.sym
@ -1,17 +0,0 @@
-v 20210407 2
-P 100 100 100 200 1 0 1
-{
-T 158 161 5 4 0 1 0 0 1
-pinnumber=1
-T 158 161 5 4 0 0 0 0 1
-pinseq=1
-T 158 161 5 4 0 1 0 0 1
-pinlabel=1
-T 158 161 5 4 0 1 0 0 1
-pintype=pwr
-}
-L 0 100 200 100 3 0 0 0 -1 -1
-T 300 50 8 10 0 0 0 0 1
-net=GND:1
-L 0 100 100 0 3 0 1 0 -1 -1
-L 200 100 100 0 3 0 1 0 -1 -1
--- a/geda/symbols/VCC.sym
+++ b/geda/symbols/VCC.sym
@ -1,18 +0,0 @@
-v 20210626 2
-P 200 0 200 200 1 0 0
-{
-T 250 50 5 6 0 1 0 0 1
-pinnumber=1
-T 250 50 5 6 0 0 0 0 1
-pinseq=1
-T 250 50 5 6 0 1 0 0 1
-pinlabel=1
-T 250 50 5 6 0 1 0 0 1
-pintype=pwr
-}
-T 200 250 9 8 1 0 0 3 1
-VCC
-T 300 0 8 8 0 0 0 0 1
-net=VCC:1
-L 150 100 200 200 3 10 1 0 -1 -1
-L 200 200 250 100 3 10 1 0 -1 -1
--- a/geda/symbols/VTRG.sym
+++ b/geda/symbols/VTRG.sym
@ -1,18 +0,0 @@
-v 20210407 2
-P 200 0 200 200 1 0 0
-{
-T 250 50 5 6 0 1 0 0 1
-pinnumber=1
-T 250 50 5 6 0 0 0 0 1
-pinseq=1
-T 250 50 5 6 0 1 0 0 1
-pinlabel=1
-T 250 50 5 6 0 1 0 0 1
-pintype=pwr
-}
-T 200 250 9 8 1 0 0 3 1
-VTRG
-T 300 0 8 8 0 0 0 0 1
-net=VTRG:1
-L 150 100 200 200 3 10 1 0 -1 -1
-L 200 200 250 100 3 10 1 0 -1 -1
--- a/geda/symbols/title.sym
+++ b/geda/symbols/title.sym
@ -1,40 +0,0 @@
-v 20210626 2
-L 3000 900 3000 0 15 0 0 0 -1 -1
-B 0 0 6000 1500 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-L 0 900 6000 900 15 0 0 0 -1 -1
-T 1000 700 9 10 1 1 0 0 1
-date=$date$
-T 4300 700 9 10 1 1 0 0 1
-org=$organisation$
-T 4300 400 9 10 1 1 0 0 1
-authors=$authors$
-T 3000 1200 9 14 1 1 0 4 1
-title=TITLE
-T 3100 400 15 8 1 0 0 0 1
-AUTHORS:
-T 3100 100 15 8 1 0 0 0 1
-LICENCE:
-T 100 100 15 8 1 0 0 0 1
-REVISION:
-T 100 1100 15 8 1 0 0 0 1
-TITLE:
-T 100 400 15 8 1 0 0 0 1
-VERSION:
-T 0 1600 8 10 0 0 0 0 1
-graphical=1
-T 3100 700 15 8 1 0 0 0 1
-ORGANISATION:
-T 100 700 15 8 1 0 0 0 1
-DATE:
-T 1000 400 9 10 1 1 0 0 1
-version=$version$
-T 1000 100 9 10 1 1 0 0 1
-revision=$revision$
-T 4300 100 9 10 1 1 0 0 1
-licence=$licence$
-T 0 1800 8 10 0 0 0 0 1
-device=none
-T 0 2000 8 10 0 0 0 0 1
-footprint=none
-T 0 2200 8 10 0 0 0 0 1
-refdes=none
--- a/kicad/custom.pretty/qr.kicad_mod
+++ b/kicad/custom.pretty/qr.kicad_mod
@ -0,0 +1,589 @@
+(footprint "qr" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 0)
+  (fp_text reference "QR*****" (at 0 8) (layer "F.SilkS")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp bcf9717e-ae89-404f-aaeb-815660132d6f)
+  )
+  (fp_text value "qr" (at 0 -8) (layer "F.SilkS")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp b6162aec-924d-439b-a32d-537f73656aa9)
+  )
+  (fp_rect (start 0.2 -0.2) (end 0.6 0.2) (layer "F.SilkS") (width 0) (fill solid) (tstamp 009123f2-f648-40c1-ace8-be29c5b83cef))
+  (fp_rect (start -0.2 -5.4) (end 0.2 -5) (layer "F.SilkS") (width 0) (fill solid) (tstamp 009e0089-89da-448d-b6e7-3f1a71b49feb))
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+  (fp_rect (start 2.6 3.8) (end 3 4.2) (layer "F.SilkS") (width 0) (fill solid) (tstamp f5ca3ecf-7d5a-48c9-8cb7-fd7f782c3863))
+  (fp_rect (start -3.4 1.8) (end -3 2.2) (layer "F.SilkS") (width 0) (fill solid) (tstamp f5fb2015-f30f-4955-8ce3-f27fa8a6b749))
+  (fp_rect (start 5 4.6) (end 5.4 5) (layer "F.SilkS") (width 0) (fill solid) (tstamp f77793ba-3c60-48e2-931d-557aa53dbaa1))
+  (fp_rect (start 5.4 0.2) (end 5.8 0.6) (layer "F.SilkS") (width 0) (fill solid) (tstamp f7da4d1a-efb4-439b-9dc2-8487d830aa17))
+  (fp_rect (start 5.4 4.2) (end 5.8 4.6) (layer "F.SilkS") (width 0) (fill solid) (tstamp f8be3b92-dba7-4941-a8b1-908d0982ac02))
+  (fp_rect (start -0.2 4.2) (end 0.2 4.6) (layer "F.SilkS") (width 0) (fill solid) (tstamp f9621481-d665-4255-bd9c-172ca2114a50))
+  (fp_rect (start -3 5.4) (end -2.6 5.8) (layer "F.SilkS") (width 0) (fill solid) (tstamp f9f817fc-5dc0-44a1-b0aa-c8fbe81c809e))
+  (fp_rect (start -0.2 -6.2) (end 0.2 -5.8) (layer "F.SilkS") (width 0) (fill solid) (tstamp fa3c6096-f1a6-4c5b-9add-130434db7d3a))
+  (fp_rect (start -4.2 -1.8) (end -3.8 -1.4) (layer "F.SilkS") (width 0) (fill solid) (tstamp fa603b6f-9f9e-479b-bcad-19cbfd3348da))
+  (fp_rect (start -1.8 -3) (end -1.4 -2.6) (layer "F.SilkS") (width 0) (fill solid) (tstamp fb02fb42-c136-4837-8f34-000b1812b6ef))
+  (fp_rect (start -1.4 -5.8) (end -1 -5.4) (layer "F.SilkS") (width 0) (fill solid) (tstamp fb64a5da-b89e-48d2-a3ec-4041ecb812c9))
+  (fp_rect (start -5.4 -6.6) (end -5 -6.2) (layer "F.SilkS") (width 0) (fill solid) (tstamp fbcdf008-4f9f-4a2a-a43c-62b4561c2524))
+  (fp_rect (start 3.8 5.8) (end 4.2 6.2) (layer "F.SilkS") (width 0) (fill solid) (tstamp fbf45057-00be-40a1-82ee-be39dc2258b4))
+  (fp_rect (start 3.4 4.6) (end 3.8 5) (layer "F.SilkS") (width 0) (fill solid) (tstamp fc90814e-a4cf-4ca9-9fa7-0e234a7c5cd6))
+  (fp_rect (start 1 -3) (end 1.4 -2.6) (layer "F.SilkS") (width 0) (fill solid) (tstamp fcd0bd41-bbde-47bf-85df-8246ae770139))
+  (fp_rect (start 5 -5.4) (end 5.4 -5) (layer "F.SilkS") (width 0) (fill solid) (tstamp fd33be59-3791-4dfa-925a-3d913b90127c))
+  (fp_rect (start 1 -5.8) (end 1.4 -5.4) (layer "F.SilkS") (width 0) (fill solid) (tstamp fd43b8de-0496-4cdb-8d20-a30805c5a52e))
+  (fp_rect (start 0.2 1) (end 0.6 1.4) (layer "F.SilkS") (width 0) (fill solid) (tstamp fdd15c46-406b-4e70-8110-019ea1902b9c))
+  (fp_rect (start -6.6 -5.8) (end -6.2 -5.4) (layer "F.SilkS") (width 0) (fill solid) (tstamp fe4804a0-d0c4-4292-bc7b-f4327b3705fd))
+  (fp_rect (start -0.6 0.6) (end -0.2 1) (layer "F.SilkS") (width 0) (fill solid) (tstamp fe817a2b-2c5f-47c1-8a27-e284a695c4d6))
+  (fp_rect (start 0.6 -5.8) (end 1 -5.4) (layer "F.SilkS") (width 0) (fill solid) (tstamp ff58455f-f56b-469f-924f-dd2f99032331))
+  (fp_line (start 6.7 6.7) (end -6.7 6.7) (layer "F.CrtYd") (width 0.05) (tstamp 09c00f45-71ee-420d-99be-078052fa94c7))
+  (fp_line (start 6.7 -6.7) (end 6.7 6.7) (layer "F.CrtYd") (width 0.05) (tstamp 140f57ba-80ef-4bfe-a07a-97dcb10b33ff))
+  (fp_line (start -6.7 6.7) (end -6.7 -6.7) (layer "F.CrtYd") (width 0.05) (tstamp 29d3a363-7140-4cce-9323-5862a2e531c1))
+  (fp_line (start -6.7 -6.7) (end 6.7 -6.7) (layer "F.CrtYd") (width 0.05) (tstamp da34d271-6934-4cff-8308-1aad13574a49))
+)
--- a/kicad/kikit.pretty/Board.kicad_mod
+++ b/kicad/kikit.pretty/Board.kicad_mod
@ -0,0 +1,14 @@
+(module Board (layer F.Cu) (tedit 605A21C1)
+  (descr "Mark board for extraction")
+  (attr virtual)
+  (fp_text reference REF** (at -4.5 -5) (layer Dwgs.User)
+    (effects (font (size 1 1) (thickness 0.15)) (justify left))
+  )
+  (fp_text value Board (at -7.25 -5) (layer Dwgs.User)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 0 0) (end -1.25 -4) (layer Dwgs.User) (width 0.2))
+  (fp_line (start -1.25 -4) (end -9.25 -4) (layer Dwgs.User) (width 0.2))
+  (fp_line (start 0 0) (end 0.5 -1) (layer Dwgs.User) (width 0.2))
+  (fp_line (start 0 0) (end -1 -0.5) (layer Dwgs.User) (width 0.2))
+)
--- a/kicad/kikit.pretty/Fiducial.kicad_mod
+++ b/kicad/kikit.pretty/Fiducial.kicad_mod
@ -0,0 +1,13 @@
+(module Fiducial:Fiducial (layer F.Cu) (tedit 5EA93A7C)
+  (descr "Circular Fiducial")
+  (tags fiducial)
+  (attr smd)
+  (fp_text reference REF** (at 0 -1.5) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Fiducial (at 0 1.5) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad "" smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask)
+    (solder_mask_margin 0.25) (clearance 0.25))
+)
--- a/kicad/kikit.pretty/NPTH.kicad_mod
+++ b/kicad/kikit.pretty/NPTH.kicad_mod
@ -0,0 +1,9 @@
+(module NPTH (layer F.Cu) (tedit 618E7E16)
+  (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value NPTH (at 0 -0.5) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 1) (layers *.Cu *.Mask))
+)
--- a/kicad/kikit.pretty/Tab.kicad_mod
+++ b/kicad/kikit.pretty/Tab.kicad_mod
@ -0,0 +1,17 @@
+(module Tab (layer F.Cu) (tedit 60708B1A)
+  (descr "A symbol representing annotation for tab placement")
+  (attr virtual)
+  (fp_text reference REF** (at 0 -2) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Tab (at -2.75 -1) (layer Dwgs.User)
+    (effects (font (size 1.2 1.2) (thickness 0.2)))
+  )
+  (fp_line (start 0.25 0) (end -0.75 1) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 0.25 0) (end -0.75 -1) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 0.25 0) (end -2.75 0) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 0.25 1) (end 0.25 -1) (layer Dwgs.User) (width 0.3))
+  (fp_text user "KIKIT: width: 3mm" (at -5.5 0 90) (layer Dwgs.User)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+)
--- a/kicad/qeda.3dshapes/CAPC1608X92N.wrl
+++ b/kicad/qeda.3dshapes/CAPC1608X92N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.4 -0.8 0,
+        0.4 -0.8 0,
+        0.4 0.8 0,
+        -0.4 0.8 0,
+        -0.4 -0.8 0.92,
+        0.4 -0.8 0.92,
+        0.4 0.8 0.92,
+        -0.4 0.8 0.92
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/CONNECTOR_HEADER-2.54-1X10.wrl
+++ b/kicad/qeda.3dshapes/CONNECTOR_HEADER-2.54-1X10.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -1.205 -12.7 0,
+        1.205 -12.7 0,
+        1.205 12.7 0,
+        -1.205 12.7 0,
+        -1.205 -12.7 8.38,
+        1.205 -12.7 8.38,
+        1.205 12.7 8.38,
+        -1.205 12.7 8.38
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/CONNECTOR_XKB_U261-24XN-4BC2LS.wrl
+++ b/kicad/qeda.3dshapes/CONNECTOR_XKB_U261-24XN-4BC2LS.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -4.35 -1.29 0,
+        4.35 -1.29 0,
+        4.35 12.46 0,
+        -4.35 12.46 0,
+        -4.35 -1.29 2.4,
+        4.35 -1.29 2.4,
+        4.35 12.46 2.4,
+        -4.35 12.46 2.4
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/CONNECTOR_XKB_U262-24XN-4BV60.wrl
+++ b/kicad/qeda.3dshapes/CONNECTOR_XKB_U262-24XN-4BV60.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -4.95 -1.83 0,
+        4.95 -1.83 0,
+        4.95 8.17 0,
+        -4.95 8.17 0,
+        -4.95 -1.83 3.21,
+        4.95 -1.83 3.21,
+        4.95 8.17 3.21,
+        -4.95 8.17 3.21
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/LEDC1608X90N.wrl
+++ b/kicad/qeda.3dshapes/LEDC1608X90N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.4 -0.8 0,
+        0.4 -0.8 0,
+        0.4 0.8 0,
+        -0.4 0.8 0,
+        -0.4 -0.8 0.9,
+        0.4 -0.8 0.9,
+        0.4 0.8 0.9,
+        -0.4 0.8 0.9
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/SODFL1608X65N.wrl
+++ b/kicad/qeda.3dshapes/SODFL1608X65N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.4 -0.6 0,
+        0.4 -0.6 0,
+        0.4 0.6 0,
+        -0.4 0.6 0,
+        -0.4 -0.6 0.65,
+        0.4 -0.6 0.65,
+        0.4 0.6 0.65,
+        -0.4 0.6 0.65
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/SOIC127P600X175-8N.wrl
+++ b/kicad/qeda.3dshapes/SOIC127P600X175-8N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -1.95 -2.45 0,
+        1.95 -2.45 0,
+        1.95 2.45 0,
+        -1.95 2.45 0,
+        -1.95 -2.45 1.75,
+        1.95 -2.45 1.75,
+        1.95 2.45 1.75,
+        -1.95 2.45 1.75
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/SOP65P640X120-14N.wrl
+++ b/kicad/qeda.3dshapes/SOP65P640X120-14N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -2.2 -2.5 0,
+        2.2 -2.5 0,
+        2.2 2.5 0,
+        -2.2 2.5 0,
+        -2.2 -2.5 1.2,
+        2.2 -2.5 1.2,
+        2.2 2.5 1.2,
+        -2.2 2.5 1.2
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/SOT95P237X112-3N.wrl
+++ b/kicad/qeda.3dshapes/SOT95P237X112-3N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.6499999999999999 -1.46 0,
+        0.6499999999999999 -1.46 0,
+        0.6499999999999999 1.46 0,
+        -0.6499999999999999 1.46 0,
+        -0.6499999999999999 -1.46 1.12,
+        0.6499999999999999 -1.46 1.12,
+        0.6499999999999999 1.46 1.12,
+        -0.6499999999999999 1.46 1.12
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/SOT95P280X145-5N.wrl
+++ b/kicad/qeda.3dshapes/SOT95P280X145-5N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.8 -1.45 0,
+        0.8 -1.45 0,
+        0.8 1.45 0,
+        -0.8 1.45 0,
+        -0.8 -1.45 1.45,
+        0.8 -1.45 1.45,
+        0.8 1.45 1.45,
+        -0.8 1.45 1.45
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/UC1608X55N.wrl
+++ b/kicad/qeda.3dshapes/UC1608X55N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.4 -0.8 0,
+        0.4 -0.8 0,
+        0.4 0.8 0,
+        -0.4 0.8 0,
+        -0.4 -0.8 0.55,
+        0.4 -0.8 0.55,
+        0.4 0.8 0.55,
+        -0.4 0.8 0.55
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.dcm
+++ b/kicad/qeda.dcm
@ -0,0 +1,68 @@
+EESchema-DOCLIB  Version 2.0 Date: 10/08/2022 18:26:45
+#
+$CMP C0603
+D Chip capacitor 1.6x0.8 mm
+K Capacitor
+$ENDCMP
+#
+$CMP XKB_U262-24XN-4BV60
+D connector, USB-C, receptacle, 24-pin, SMT+THT+TABS
+F http://www.helloxkb.com/public/images/pdf/U262-24XN-4BV60.pdf
+$ENDCMP
+#
+$CMP 40P05
+D P-channel enhancement mode vertical DMOS transistor
+K transistor, MOSFET, pMOS
+F https://datasheet.lcsc.com/lcsc/2108161030_ALLPOWER-ShenZhen-Quan-Li-Semiconductor-AP40P05_C2886385.pdf
+$ENDCMP
+#
+$CMP LM393D
+D comparator, dual
+F https://www.st.com/resource/en/datasheet/lm393.pdf
+$ENDCMP
+#
+$CMP ZENER
+D diode, zener, generic
+K Diode, Zener
+$ENDCMP
+#
+$CMP R0603
+D resistor, chip, 1.6x0.8 mm
+$ENDCMP
+#
+$CMP HEADER-2.54-1x10
+D header, 1 rows, 0.1 in/2.54 mm pitch, through hole, straight, not shrouded
+K Connector, Male
+F https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/54101.pdf https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/67996.pdf
+$ENDCMP
+#
+$CMP SCHOTTKY
+D diode, schottky, generic
+$ENDCMP
+#
+$CMP XKB_U261-24XN-4BC2LS
+D connector, USB-C, plug, 24-pin, SMT+THT+TABS
+F https://datasheet.lcsc.com/lcsc/2110112230_XKB-Connectivity-U261-241N-4BC2LS_C2880648.pdf
+$ENDCMP
+#
+$CMP BAV74
+D diode, general purpose, dual, common cathode
+F https://assets.nexperia.com/documents/data-sheet/BAV74.pdf
+$ENDCMP
+#
+$CMP HT75xx-3
+D low drop out voltage regulator
+F https://www.holtek.com/documents/10179/116711/HT75xx-3v140.pdf
+$ENDCMP
+#
+$CMP LM339PW
+D comparator, quad
+F https://www.ti.com/lit/gpn/LM339
+$ENDCMP
+#
+$CMP LED0603
+D diode, LED, chip, 1.6x0.8 mm
+K LED
+$ENDCMP
+#
+# End Doc Library
--- a/kicad/qeda.lib
+++ b/kicad/qeda.lib
@ -0,0 +1,415 @@
+EESchema-LIBRARY Version 2.3 Date: 10/08/2022 18:26:45
+#encoding utf-8
+#
+# C0603
+#
+DEF C0603 C 0 40 N N 1 L N
+F0 "C" 0 110 50 H V C BNN
+F1 "C0603" 0 -110 50 H V C TNN
+F2 "qeda:CAPC1608X92N" 0 0 0 H I C CNN
+$FPLIST
+  CAPC1608X92N
+$ENDFPLIST
+DRAW
+P 2 1 1 12 -15 80 -15 -80 N
+P 2 1 1 12 15 80 15 -80 N
+X L 1 -100 0 85 R 50 50 1 1 P
+X R 2 100 0 85 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# XKB_U262-24XN-4BV60
+#
+DEF XKB_U262-24XN-4BV60 J 0 140 Y Y 1 L N
+F0 "J" 0 30 50 H V L BNN
+F1 "XKB_U262-24XN-4BV60" 1280 -1130 50 H V L TNN
+F2 "qeda:CONNECTOR_XKB_U262-24XN-4BV60" 0 0 0 H I C CNN
+F3 "http://www.helloxkb.com/public/images/pdf/U262-24XN-4BV60.pdf" 0 0 0 H I C CNN
+$FPLIST
+  CONNECTOR_XKB_U262-24XN-4BV60
+$ENDFPLIST
+DRAW
+S 0 0 1700 -1100 1 1 12 f
+X TX1+ A2 -200 -200 200 R 50 50 1 1 O
+C 50 -200 25 1 1 12 F
+X TX1- A3 -200 -300 200 R 50 50 1 1 O
+C 50 -300 25 1 1 12 F
+X CC1 A5 -200 -400 200 R 50 50 1 1 B
+C 50 -400 25 1 1 12 F
+X D+ A6 -200 -500 200 R 50 50 1 1 B
+C 50 -500 25 1 1 12 F
+X D- A7 -200 -600 200 R 50 50 1 1 B
+C 50 -600 25 1 1 12 F
+X SBU1 A8 -200 -700 200 R 50 50 1 1 B
+C 50 -700 25 1 1 12 F
+X RX2- A10 -200 -800 200 R 50 50 1 1 I
+C 50 -800 25 1 1 12 F
+X RX2+ A11 -200 -900 200 R 50 50 1 1 I
+C 50 -900 25 1 1 12 F
+X RX1+ B11 1900 -200 200 L 50 50 1 1 I
+C 1650 -200 25 1 1 12 F
+X RX1- B10 1900 -300 200 L 50 50 1 1 I
+C 1650 -300 25 1 1 12 F
+X SBU2 B8 1900 -400 200 L 50 50 1 1 B
+C 1650 -400 25 1 1 12 F
+X D- B7 1900 -500 200 L 50 50 1 1 B
+C 1650 -500 25 1 1 12 F
+X D+ B6 1900 -600 200 L 50 50 1 1 B
+C 1650 -600 25 1 1 12 F
+X CC2 B5 1900 -700 200 L 50 50 1 1 B
+C 1650 -700 25 1 1 12 F
+X TX2- B3 1900 -800 200 L 50 50 1 1 O
+C 1650 -800 25 1 1 12 F
+X TX2+ B2 1900 -900 200 L 50 50 1 1 O
+C 1650 -900 25 1 1 12 F
+X VBUS A4 700 200 200 D 50 50 1 1 W
+C 700 -50 25 1 1 12 F
+X VBUS A9 800 200 200 D 50 50 1 1 W
+C 800 -50 25 1 1 12 F
+X VBUS B4 900 200 200 D 50 50 1 1 W
+C 900 -50 25 1 1 12 F
+X VBUS B9 1000 200 200 D 50 50 1 1 W
+C 1000 -50 25 1 1 12 F
+X GND A1 450 -1300 200 U 50 50 1 1 W
+C 450 -1050 25 1 1 12 F
+X GND A12 550 -1300 200 U 50 50 1 1 W
+C 550 -1050 25 1 1 12 F
+X GND B1 650 -1300 200 U 50 50 1 1 W
+C 650 -1050 25 1 1 12 F
+X GND B12 750 -1300 200 U 50 50 1 1 W
+C 750 -1050 25 1 1 12 F
+X SHIELD S1 950 -1300 200 U 50 50 1 1 P
+C 950 -1050 25 1 1 12 F
+X SHIELD S2 1050 -1300 200 U 50 50 1 1 P
+C 1050 -1050 25 1 1 12 F
+X SHIELD S3 1150 -1300 200 U 50 50 1 1 P
+C 1150 -1050 25 1 1 12 F
+X SHIELD S4 1250 -1300 200 U 50 50 1 1 P
+C 1250 -1050 25 1 1 12 F
+ENDDRAW
+ENDDEF
+#
+# 40P05
+#
+DEF 40P05 VT 0 40 Y N 1 L N
+F0 "VT" 70 180 50 H V R BNN
+F1 "40P05" 70 -180 50 H V R TNN
+F2 "qeda:SOT95P237X112-3N" 0 0 0 H I C CNN
+F3 "https://datasheet.lcsc.com/lcsc/2108161030_ALLPOWER-ShenZhen-Quan-Li-Semiconductor-AP40P05_C2886385.pdf" 0 0 0 H I C CNN
+$FPLIST
+  SOT95P237X112-3N
+$ENDFPLIST
+DRAW
+C 0 0 150 1 1 12 f
+P 2 1 1 12 -37 100 -37 48 N
+P 2 1 1 12 -37 26 -37 -26 N
+P 2 1 1 12 -37 -48 -37 -100 N
+P 2 1 1 12 -37 -74 150 -74 N
+P 2 1 1 12 150 -74 150 -100 N
+P 2 1 1 12 -37 74 150 74 N
+P 2 1 1 12 150 74 150 100 N
+P 2 1 1 12 -150 -100 -67 -100 N
+P 2 1 1 12 -67 100 -67 -100 N
+P 2 1 1 12 -37 0 38 0 N
+P 2 1 1 12 38 0 38 -74 N
+P 3 1 1 12 0 15 38 0 0 -15 F
+P 2 1 1 12 86 74 86 16 N
+P 2 1 1 12 86 -16 86 -74 N
+P 4 1 1 12 68 16 105 16 86 -16 68 16 N
+P 2 1 1 12 68 -16 105 -16 N
+X G 1 -350 -100 200 R 50 50 1 1 I
+X D 3 150 300 200 D 50 50 1 1 U
+X S 2 150 -300 200 U 50 50 1 1 U
+ENDDRAW
+ENDDEF
+#
+# LM393D
+#
+DEF LM393D U 0 40 Y Y 2 L N
+F0 "U" 0 110 50 H V L BNN
+F1 "LM393D" 0 30 50 H V L BNN
+F2 "qeda:SOIC127P600X175-8N" 0 0 0 H I C CNN
+F3 "https://www.st.com/resource/en/datasheet/lm393.pdf" 0 0 0 H I C CNN
+ALIAS LM193D LM293D
+$FPLIST
+  SOIC127P600X175-8N
+$ENDFPLIST
+DRAW
+S 0 0 700 -400 1 1 12 f
+X IN1+ 3 -200 -150 200 R 50 50 1 1 I
+X IN1- 2 -200 -250 200 R 50 50 1 1 I
+X OUT1 1 900 -200 200 L 50 50 1 1 O
+X V+ 8 350 200 200 D 50 50 1 1 W
+X V- 4 350 -600 200 U 50 50 1 1 W
+S 0 0 700 -400 2 1 12 f
+X IN2+ 5 -200 -150 200 R 50 50 2 1 I
+X IN2- 6 -200 -250 200 R 50 50 2 1 I
+X OUT2 7 900 -200 200 L 50 50 2 1 O
+X V+ 8 350 200 200 D 50 50 2 1 W
+X V- 4 350 -600 200 U 50 50 2 1 W
+ENDDRAW
+ENDDEF
+#
+# ZENER
+#
+DEF ZENER D 0 40 N N 1 L N
+F0 "D" 0 100 50 H V C BNN
+F1 "ZENER" 0 -100 50 H V C TNN
+F2 "qeda:SODFL1608X65N" 0 0 0 H I C CNN
+$FPLIST
+  SODFL1608X65N
+$ENDFPLIST
+DRAW
+P 4 1 1 12 -40 50 40 0 -40 -50 -40 50 f
+P 2 1 1 12 40 50 40 -50 N
+P 2 1 1 12 40 50 20 70 N
+P 2 1 1 12 40 -50 60 -70 N
+X A 2 -100 0 60 R 50 50 1 1 P
+X C 1 100 0 60 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# R0603
+#
+DEF R0603 R 0 40 N N 1 L N
+F0 "R" 0 70 50 H V C BNN
+F1 "R0603" 0 -70 50 H V C TNN
+F2 "qeda:UC1608X55N" 0 0 0 H I C CNN
+$FPLIST
+  UC1608X55N
+$ENDFPLIST
+DRAW
+S -100 40 100 -40 1 1 12 f
+X L 1 -150 0 50 R 50 50 1 1 P
+X R 2 150 0 50 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# HEADER-2.54-1x10
+#
+DEF HEADER-2.54-1x10 J 0 140 Y N 1 L N
+F0 "J" 100 30 50 H V C BNN
+F1 "HEADER-2.54-1x10" 100 -1130 50 H V C TNN
+F2 "qeda:CONNECTOR_HEADER-2.54-1X10" 0 0 0 H I C CNN
+F3 "https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/54101.pdf https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/67996.pdf" 0 0 0 H I C CNN
+$FPLIST
+  CONNECTOR_HEADER-2.54-1X10
+$ENDFPLIST
+DRAW
+S 0 0 200 -1100 1 1 12 f
+X 1 1 -200 -100 200 R 50 50 1 1 P
+C 50 -100 25 1 1 12 F
+X 2 2 -200 -200 200 R 50 50 1 1 P
+C 50 -200 25 1 1 12 F
+X 3 3 -200 -300 200 R 50 50 1 1 P
+C 50 -300 25 1 1 12 F
+X 4 4 -200 -400 200 R 50 50 1 1 P
+C 50 -400 25 1 1 12 F
+X 5 5 -200 -500 200 R 50 50 1 1 P
+C 50 -500 25 1 1 12 F
+X 6 6 -200 -600 200 R 50 50 1 1 P
+C 50 -600 25 1 1 12 F
+X 7 7 -200 -700 200 R 50 50 1 1 P
+C 50 -700 25 1 1 12 F
+X 8 8 -200 -800 200 R 50 50 1 1 P
+C 50 -800 25 1 1 12 F
+X 9 9 -200 -900 200 R 50 50 1 1 P
+C 50 -900 25 1 1 12 F
+X 10 10 -200 -1000 200 R 50 50 1 1 P
+C 50 -1000 25 1 1 12 F
+ENDDRAW
+ENDDEF
+#
+# SCHOTTKY
+#
+DEF SCHOTTKY D 0 40 N N 1 L N
+F0 "D" 0 80 50 H V C BNN
+F1 "SCHOTTKY" 0 -80 50 H V C TNN
+F2 "qeda:SODFL1608X65N" 0 0 0 H I C CNN
+$FPLIST
+  SODFL1608X65N
+$ENDFPLIST
+DRAW
+P 4 1 1 12 -40 50 40 0 -40 -50 -40 50 f
+P 2 1 1 12 40 50 40 -50 N
+P 2 1 1 12 40 -50 20 -50 N
+P 2 1 1 12 20 -50 20 -30 N
+P 2 1 1 12 40 50 60 50 N
+P 2 1 1 12 60 50 60 30 N
+X A 2 -100 0 60 R 50 50 1 1 P
+X C 1 100 0 60 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# XKB_U261-24XN-4BC2LS
+#
+DEF XKB_U261-24XN-4BC2LS J 0 140 Y Y 1 L N
+F0 "J" 0 30 50 H V L BNN
+F1 "XKB_U261-24XN-4BC2LS" 1280 -1130 50 H V L TNN
+F2 "qeda:CONNECTOR_XKB_U261-24XN-4BC2LS" 0 0 0 H I C CNN
+F3 "https://datasheet.lcsc.com/lcsc/2110112230_XKB-Connectivity-U261-241N-4BC2LS_C2880648.pdf" 0 0 0 H I C CNN
+$FPLIST
+  CONNECTOR_XKB_U261-24XN-4BC2LS
+$ENDFPLIST
+DRAW
+S 0 0 1700 -1100 1 1 12 f
+X TX1+ A2 -200 -200 200 R 50 50 1 1 O
+C 50 -200 25 1 1 12 F
+X TX1- A3 -200 -300 200 R 50 50 1 1 O
+C 50 -300 25 1 1 12 F
+X CC1 A5 -200 -400 200 R 50 50 1 1 B
+C 50 -400 25 1 1 12 F
+X D+ A6 -200 -500 200 R 50 50 1 1 B
+C 50 -500 25 1 1 12 F
+X D- A7 -200 -600 200 R 50 50 1 1 B
+C 50 -600 25 1 1 12 F
+X SBU1 A8 -200 -700 200 R 50 50 1 1 B
+C 50 -700 25 1 1 12 F
+X RX2- A10 -200 -800 200 R 50 50 1 1 I
+C 50 -800 25 1 1 12 F
+X RX2+ A11 -200 -900 200 R 50 50 1 1 I
+C 50 -900 25 1 1 12 F
+X RX1+ B11 1900 -200 200 L 50 50 1 1 I
+C 1650 -200 25 1 1 12 F
+X RX1- B10 1900 -300 200 L 50 50 1 1 I
+C 1650 -300 25 1 1 12 F
+X SBU2 B8 1900 -400 200 L 50 50 1 1 B
+C 1650 -400 25 1 1 12 F
+X D- B7 1900 -500 200 L 50 50 1 1 B
+C 1650 -500 25 1 1 12 F
+X D+ B6 1900 -600 200 L 50 50 1 1 B
+C 1650 -600 25 1 1 12 F
+X CC2 B5 1900 -700 200 L 50 50 1 1 B
+C 1650 -700 25 1 1 12 F
+X TX2- B3 1900 -800 200 L 50 50 1 1 O
+C 1650 -800 25 1 1 12 F
+X TX2+ B2 1900 -900 200 L 50 50 1 1 O
+C 1650 -900 25 1 1 12 F
+X VBUS A4 700 200 200 D 50 50 1 1 W
+C 700 -50 25 1 1 12 F
+X VBUS A9 800 200 200 D 50 50 1 1 W
+C 800 -50 25 1 1 12 F
+X VBUS B4 900 200 200 D 50 50 1 1 W
+C 900 -50 25 1 1 12 F
+X VBUS B9 1000 200 200 D 50 50 1 1 W
+C 1000 -50 25 1 1 12 F
+X GND A1 450 -1300 200 U 50 50 1 1 W
+C 450 -1050 25 1 1 12 F
+X GND A12 550 -1300 200 U 50 50 1 1 W
+C 550 -1050 25 1 1 12 F
+X GND B1 650 -1300 200 U 50 50 1 1 W
+C 650 -1050 25 1 1 12 F
+X GND B12 750 -1300 200 U 50 50 1 1 W
+C 750 -1050 25 1 1 12 F
+X SHIELD S1 950 -1300 200 U 50 50 1 1 P
+C 950 -1050 25 1 1 12 F
+X SHIELD S2 1050 -1300 200 U 50 50 1 1 P
+C 1050 -1050 25 1 1 12 F
+X SHIELD S3 1150 -1300 200 U 50 50 1 1 P
+C 1150 -1050 25 1 1 12 F
+X SHIELD S4 1250 -1300 200 U 50 50 1 1 P
+C 1250 -1050 25 1 1 12 F
+ENDDRAW
+ENDDEF
+#
+# BAV74
+#
+DEF BAV74 D 0 40 N N 2 L N
+F0 "D" 0 80 50 H V C BNN
+F1 "BAV74" 0 -80 50 H V C TNN
+F2 "qeda:SOT95P237X112-3N" 0 0 0 H I C CNN
+F3 "https://assets.nexperia.com/documents/data-sheet/BAV74.pdf" 0 0 0 H I C CNN
+$FPLIST
+  SOT95P237X112-3N
+$ENDFPLIST
+DRAW
+P 4 1 1 12 -40 50 40 0 -40 -50 -40 50 f
+P 2 1 1 12 40 50 40 -50 N
+X A1 1 -100 0 60 R 50 50 1 1 P
+X C 3 100 0 60 L 50 50 1 1 P
+P 4 2 1 12 -40 50 40 0 -40 -50 -40 50 f
+P 2 2 1 12 40 50 40 -50 N
+X A2 2 -100 0 60 R 50 50 2 1 P
+X C 3 100 0 60 L 50 50 2 1 P
+ENDDRAW
+ENDDEF
+#
+# HT75xx-3
+#
+DEF HT75xx-3 U 0 40 Y Y 1 L N
+F0 "U" 325 30 50 H V C BNN
+F1 "HT75xx-3" 330 -380 50 H V L TNN
+F2 "qeda:SOT95P280X145-5N" 0 0 0 H I C CNN
+F3 "https://www.holtek.com/documents/10179/116711/HT75xx-3v140.pdf" 0 0 0 H I C CNN
+ALIAS HT7521-3 HT7523-3 HT7525-3 HT7527-3 HT7530-3 HT7533-3 HT7536-3 HT7540-3 HT7544-3 HT7550-3 HT7560-3 HT7570-3 HT7580-3 HT7590-3 HT75A0-3 HT75C0-3
+$FPLIST
+  SOT95P280X145-5N
+$ENDFPLIST
+DRAW
+S 0 0 650 -350 1 1 12 f
+X VIN 2 -200 -100 200 R 50 50 1 1 W
+X VOUT 3 850 -100 200 L 50 50 1 1 U
+X GND 1 300 -550 200 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# LM339PW
+#
+DEF LM339PW U 0 40 Y Y 4 L N
+F0 "U" 0 110 50 H V L BNN
+F1 "LM339PW" 0 30 50 H V L BNN
+F2 "qeda:SOP65P640X120-14N" 0 0 0 H I C CNN
+F3 "https://www.ti.com/lit/gpn/LM339" 0 0 0 H I C CNN
+ALIAS LM139PW LM239PW
+$FPLIST
+  SOP65P640X120-14N
+$ENDFPLIST
+DRAW
+S 0 0 700 -500 1 1 12 f
+X IN1+ 7 -200 -200 200 R 50 50 1 1 I
+X IN1- 6 -200 -300 200 R 50 50 1 1 I
+X OUT1 1 900 -250 200 L 50 50 1 1 O
+X VCC 3 350 200 200 D 50 50 1 1 W
+X GND 12 350 -700 200 U 50 50 1 1 W
+S 0 0 700 -500 2 1 12 f
+X IN2+ 5 -200 -200 200 R 50 50 2 1 I
+X IN2- 4 -200 -300 200 R 50 50 2 1 I
+X OUT2 2 900 -250 200 L 50 50 2 1 O
+X VCC 3 350 200 200 D 50 50 2 1 W
+X GND 12 350 -700 200 U 50 50 2 1 W
+S 0 0 700 -500 3 1 12 f
+X IN3+ 9 -200 -200 200 R 50 50 3 1 I
+X IN3- 8 -200 -300 200 R 50 50 3 1 I
+X OUT3 14 900 -250 200 L 50 50 3 1 O
+X VCC 3 350 200 200 D 50 50 3 1 W
+X GND 12 350 -700 200 U 50 50 3 1 W
+S 0 0 700 -500 4 1 12 f
+X IN4+ 11 -200 -200 200 R 50 50 4 1 I
+X IN4- 10 -200 -300 200 R 50 50 4 1 I
+X OUT4 13 900 -250 200 L 50 50 4 1 O
+X VCC 3 350 200 200 D 50 50 4 1 W
+X GND 12 350 -700 200 U 50 50 4 1 W
+ENDDRAW
+ENDDEF
+#
+# LED0603
+#
+DEF LED0603 D 0 40 N N 1 L N
+F0 "D" 0 80 50 H V C BNN
+F1 "LED0603" 0 -80 50 H V C TNN
+F2 "qeda:LEDC1608X90N" 0 0 0 H I C CNN
+$FPLIST
+  LEDC1608X90N
+$ENDFPLIST
+DRAW
+P 4 1 1 12 -40 50 40 0 -40 -50 -40 50 f
+P 2 1 1 12 40 50 40 -50 N
+P 2 1 1 12 50 75 100 125 N
+P 4 1 1 12 68 107 100 125 82 93 68 107 F
+P 2 1 1 12 75 50 125 100 N
+P 4 1 1 12 93 82 125 100 107 68 93 82 F
+X A 2 -100 0 60 R 50 50 1 1 P
+X C 1 100 0 60 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+# End Library
--- a/kicad/qeda.pretty/CAPC1608X92N.kicad_mod
+++ b/kicad/qeda.pretty/CAPC1608X92N.kicad_mod
@ -0,0 +1,38 @@
+(module CAPC1608X92N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.750) (size 1.250 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.750) (size 1.250 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.925 -0.900) (end -0.925 0.900) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.925 -0.900) (end 0.925 0.900) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value CAPC1608X92N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_line (start -0.400 -0.800) (end 0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 -0.800) (end 0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 0.800) (end -0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 0.800) (end -0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.875 -1.550) (end -0.875 -1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.875 -1.050) (end -0.875 1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.875 1.050) (end -0.875 1.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.875 1.550) (end 0.875 1.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 1.550) (end 0.875 1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 1.050) (end 0.875 -1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 -1.050) (end 0.875 -1.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 -1.550) (end -0.875 -1.550) (layer F.CrtYd) (width 0.050))
+  (model CAPC1608X92N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/CONNECTOR_HEADER-2.54-1X10.kicad_mod
+++ b/kicad/qeda.pretty/CONNECTOR_HEADER-2.54-1X10.kicad_mod
@ -0,0 +1,62 @@
+(module CONNECTOR_HEADER-2.54-1X10 (layer F.Cu)
+  (pad 1 thru_hole rect (at 0.000 -11.430) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 2 thru_hole circle (at 0.000 -8.890) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 3 thru_hole circle (at 0.000 -6.350) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 4 thru_hole circle (at 0.000 -3.810) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 5 thru_hole circle (at 0.000 -1.270) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 6 thru_hole circle (at 0.000 1.270) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 7 thru_hole circle (at 0.000 3.810) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 8 thru_hole circle (at 0.000 6.350) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 9 thru_hole circle (at 0.000 8.890) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (pad 10 thru_hole circle (at 0.000 11.430) (size 1.500 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 1.000)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -1.305 -12.800) (end 1.305 -12.800) (layer F.SilkS) (width 0.200))
+  (fp_line (start 1.305 -12.800) (end 1.305 12.800) (layer F.SilkS) (width 0.200))
+  (fp_line (start 1.305 12.800) (end -1.305 12.800) (layer F.SilkS) (width 0.200))
+  (fp_line (start -1.305 12.800) (end -1.305 -12.800) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value CONNECTOR_HEADER-2.54-1X10 (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_line (start -0.205 -12.700) (end 1.205 -12.700) (layer F.Fab) (width 0.100))
+  (fp_line (start 1.205 -12.700) (end 1.205 12.700) (layer F.Fab) (width 0.100))
+  (fp_line (start 1.205 12.700) (end -1.205 12.700) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.205 12.700) (end -1.205 -11.700) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.205 -11.700) (end -0.205 -12.700) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.455 -12.950) (end 1.455 -12.950) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.455 -12.950) (end 1.455 12.950) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.455 12.950) (end -1.455 12.950) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.455 12.950) (end -1.455 -12.950) (layer F.CrtYd) (width 0.050))
+  (model CONNECTOR_HEADER-2.54-1X10.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/CONNECTOR_XKB_U261-24XN-4BC2LS.kicad_mod
+++ b/kicad/qeda.pretty/CONNECTOR_XKB_U261-24XN-4BC2LS.kicad_mod
@ -0,0 +1,102 @@
+(module CONNECTOR_XKB_U261-24XN-4BC2LS (layer F.Cu)
+  (pad A1 smd rect (at 2.750 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A2 smd rect (at 2.250 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A3 smd rect (at 1.750 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A4 smd rect (at 1.250 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A5 smd rect (at 0.750 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A6 smd rect (at 0.250 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A7 smd rect (at -0.250 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A8 smd rect (at -0.750 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A9 smd rect (at -1.250 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A10 smd rect (at -1.750 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A11 smd rect (at -2.250 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A12 smd rect (at -2.750 -5.935) (size 0.300 0.800) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad B1 thru_hole circle (at -2.750 -4.285) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B2 thru_hole circle (at -2.250 -5.015) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B3 thru_hole circle (at -1.750 -4.285) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B4 thru_hole circle (at -1.250 -5.015) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B5 thru_hole circle (at -0.750 -4.285) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B6 thru_hole circle (at -0.250 -5.015) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B7 thru_hole circle (at 0.250 -4.285) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B8 thru_hole circle (at 0.750 -5.015) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B9 thru_hole circle (at 1.250 -4.285) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B10 thru_hole circle (at 1.750 -5.015) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B11 thru_hole circle (at 2.250 -4.285) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B12 thru_hole circle (at 2.750 -5.015) (size 0.700 0.700) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad S1 thru_hole oval (at -4.350 -5.585) (size 0.900 2.100) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill oval 0.500 1.700)
+    (solder_mask_margin 0.001))
+  (pad S2 thru_hole oval (at 4.350 -5.585) (size 0.900 2.100) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill oval 0.500 1.700)
+    (solder_mask_margin 0.001))
+  (pad S3 smd rect (at -3.575 -4.485) (size 0.450 1.400) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad S4 smd rect (at 3.575 -4.485) (size 0.450 1.400) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -4.350 -3.785) (end 4.350 -3.785) (layer F.SilkS) (width 0.200))
+  (fp_line (start -4.450 -6.975) (end 4.450 -6.975) (layer F.SilkS) (width 0.200))
+  (fp_line (start 4.450 -4.235) (end 4.450 6.975) (layer F.SilkS) (width 0.200))
+  (fp_line (start 4.450 6.975) (end -4.450 6.975) (layer F.SilkS) (width 0.200))
+  (fp_line (start -4.450 -4.235) (end -4.450 6.975) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value CONNECTOR_XKB_U261-24XN-4BC2LS (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_line (start -4.350 -6.875) (end 4.350 -6.875) (layer F.Fab) (width 0.100))
+  (fp_line (start 4.350 -6.875) (end 4.350 6.875) (layer F.Fab) (width 0.100))
+  (fp_line (start 4.350 6.875) (end -4.350 6.875) (layer F.Fab) (width 0.100))
+  (fp_line (start -4.350 6.875) (end -4.350 -6.875) (layer F.Fab) (width 0.100))
+  (fp_line (start -5.050 -7.125) (end 5.050 -7.125) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 5.050 -7.125) (end 5.050 7.125) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 5.050 7.125) (end -5.050 7.125) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -5.050 7.125) (end -5.050 -7.125) (layer F.CrtYd) (width 0.050))
+  (model CONNECTOR_XKB_U261-24XN-4BC2LS.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/CONNECTOR_XKB_U262-24XN-4BV60.kicad_mod
+++ b/kicad/qeda.pretty/CONNECTOR_XKB_U262-24XN-4BV60.kicad_mod
@ -0,0 +1,111 @@
+(module CONNECTOR_XKB_U262-24XN-4BV60 (layer F.Cu)
+  (pad A1 smd rect (at -2.750 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A2 smd rect (at -2.250 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A3 smd rect (at -1.750 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A4 smd rect (at -1.250 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A5 smd rect (at -0.750 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A6 smd rect (at -0.250 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A7 smd rect (at 0.250 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A8 smd rect (at 0.750 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A9 smd rect (at 1.250 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A10 smd rect (at 1.750 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A11 smd rect (at 2.250 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad A12 smd rect (at 2.750 -3.730) (size 0.300 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad B1 thru_hole circle (at 2.800 -2.520) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B2 thru_hole circle (at 2.400 -1.820) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B3 thru_hole circle (at 1.600 -1.820) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B4 thru_hole circle (at 1.200 -2.520) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B5 thru_hole circle (at 0.800 -1.820) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B6 thru_hole circle (at 0.400 -2.520) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B7 thru_hole circle (at -0.400 -2.520) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B8 thru_hole circle (at -0.800 -1.820) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B9 thru_hole circle (at -1.200 -2.520) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B10 thru_hole circle (at -1.600 -1.820) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B11 thru_hole circle (at -2.400 -1.820) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad B12 thru_hole circle (at -2.800 -2.520) (size 0.660 0.660) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill 0.400)
+    (solder_mask_margin 0.001))
+  (pad S1 thru_hole oval (at -4.125 -1.920) (size 0.900 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill oval 0.500 1.100)
+    (solder_mask_margin 0.050))
+  (pad S2 thru_hole oval (at 4.125 -1.920) (size 0.900 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill oval 0.500 1.100)
+    (solder_mask_margin 0.050))
+  (pad S3 thru_hole oval (at -4.500 2.470) (size 0.900 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill oval 0.500 1.100)
+    (solder_mask_margin 0.050))
+  (pad S4 thru_hole oval (at 4.500 2.470) (size 0.900 1.500) (layers F.Cu F.Mask *.Cu B.Cu B.Mask)
+    (drill oval 0.500 1.100)
+    (solder_mask_margin 0.050))
+  (pad MH1 np_thru_hole circle (at -3.600 -3.170) (size 0.750 0.750) (layers F.Mask B.Mask)
+    (drill 0.750)
+    (solder_mask_margin 0.050))
+  (pad MH2 np_thru_hole circle (at 3.600 -3.170) (size 0.750 0.750) (layers F.Mask B.Mask)
+    (drill 0.750)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -5.050 -5.100) (end 5.050 -5.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start 5.050 -5.100) (end 5.050 1.420) (layer F.SilkS) (width 0.200))
+  (fp_line (start 5.050 3.520) (end 5.050 5.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start 5.050 5.100) (end -5.050 5.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start -5.050 -5.100) (end -5.050 1.420) (layer F.SilkS) (width 0.200))
+  (fp_line (start -5.050 3.520) (end -5.050 5.100) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value CONNECTOR_XKB_U262-24XN-4BV60 (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_line (start -4.950 -5.000) (end 4.950 -5.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 4.950 -5.000) (end 4.950 5.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 4.950 5.000) (end -4.950 5.000) (layer F.Fab) (width 0.100))
+  (fp_line (start -4.950 5.000) (end -4.950 -5.000) (layer F.Fab) (width 0.100))
+  (fp_line (start -5.200 -5.250) (end 5.200 -5.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 5.200 -5.250) (end 5.200 5.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 5.200 5.250) (end -5.200 5.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -5.200 5.250) (end -5.200 -5.250) (layer F.CrtYd) (width 0.050))
+  (model CONNECTOR_XKB_U262-24XN-4BV60.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/LEDC1608X90N.kicad_mod
+++ b/kicad/qeda.pretty/LEDC1608X90N.kicad_mod
@ -0,0 +1,42 @@
+(module LEDC1608X90N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.800) (size 1.200 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.800) (size 1.200 0.900) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.900 -0.900) (end -0.900 0.900) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.900 -0.900) (end 0.900 0.900) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.900 -0.900) (end -0.900 -1.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.900 -1.550) (end 0.900 -1.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.900 -1.550) (end 0.900 -0.900) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value LEDC1608X90N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_line (start 0.000 -0.800) (end 0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 -0.800) (end 0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 0.800) (end -0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 0.800) (end -0.400 -0.400) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 -0.400) (end 0.000 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.850 -1.500) (end -0.850 -1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.850 -1.050) (end -0.850 1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.850 1.050) (end -0.850 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.850 1.500) (end 0.850 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.850 1.500) (end 0.850 1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.850 1.050) (end 0.850 -1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.850 -1.050) (end 0.850 -1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.850 -1.500) (end -0.850 -1.500) (layer F.CrtYd) (width 0.050))
+  (model LEDC1608X90N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/SODFL1608X65N.kicad_mod
+++ b/kicad/qeda.pretty/SODFL1608X65N.kicad_mod
@ -0,0 +1,46 @@
+(module SODFL1608X65N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.700) (size 0.500 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.700) (size 0.500 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.550 -0.700) (end -0.550 0.700) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.550 -0.700) (end 0.550 0.700) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.550 -0.700) (end -0.550 -1.300) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.550 -1.300) (end 0.550 -1.300) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.550 -1.300) (end 0.550 -0.700) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value SODFL1608X65N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_line (start 0.000 -0.600) (end 0.400 -0.600) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 -0.600) (end 0.400 0.600) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 0.600) (end -0.400 0.600) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 0.600) (end -0.400 -0.200) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 -0.200) (end 0.000 -0.600) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 -1.150) (end -0.400 -0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.400 -0.750) (end -0.550 -0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.550 -0.750) (end -0.550 0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.550 0.750) (end -0.400 0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.400 0.750) (end -0.400 1.150) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.400 1.150) (end 0.400 1.150) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.400 1.150) (end 0.400 0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.400 0.750) (end 0.550 0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.550 0.750) (end 0.550 -0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.550 -0.750) (end 0.400 -0.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.400 -0.750) (end 0.400 -1.150) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.400 -1.150) (end -0.400 -1.150) (layer F.CrtYd) (width 0.050))
+  (model SODFL1608X65N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/SOIC127P600X175-8N.kicad_mod
+++ b/kicad/qeda.pretty/SOIC127P600X175-8N.kicad_mod
@ -0,0 +1,57 @@
+(module SOIC127P600X175-8N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at -2.700 -1.905) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at -2.700 -0.635) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 3 smd rect (at -2.700 0.635) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 4 smd rect (at -2.700 1.905) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 8 smd rect (at 2.700 -1.905) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 7 smd rect (at 2.700 -0.635) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 6 smd rect (at 2.700 0.635) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 5 smd rect (at 2.700 1.905) (size 1.525 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -2.050 -2.550) (end 2.050 -2.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start 2.050 2.550) (end -2.050 2.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start -2.050 -2.505) (end -3.763 -2.505) (layer F.SilkS) (width 0.200))
+  (fp_line (start -3.763 -2.505) (end -3.763 -1.605) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value SOIC127P600X175-8N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_line (start -0.950 -2.450) (end 1.950 -2.450) (layer F.Fab) (width 0.100))
+  (fp_line (start 1.950 -2.450) (end 1.950 2.450) (layer F.Fab) (width 0.100))
+  (fp_line (start 1.950 2.450) (end -1.950 2.450) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.950 2.450) (end -1.950 -1.450) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.950 -1.450) (end -0.950 -2.450) (layer F.Fab) (width 0.100))
+  (fp_line (start -3.713 -2.455) (end -2.200 -2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.200 -2.455) (end -2.200 -2.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.200 -2.700) (end 2.200 -2.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.200 -2.700) (end 2.200 -2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.200 -2.455) (end 3.713 -2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 3.713 -2.455) (end 3.713 2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 3.713 2.455) (end 2.200 2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.200 2.455) (end 2.200 2.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.200 2.700) (end -2.200 2.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.200 2.700) (end -2.200 2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.200 2.455) (end -3.713 2.455) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -3.713 2.455) (end -3.713 -2.455) (layer F.CrtYd) (width 0.050))
+  (model SOIC127P600X175-8N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/SOP65P640X120-14N.kicad_mod
+++ b/kicad/qeda.pretty/SOP65P640X120-14N.kicad_mod
@ -0,0 +1,69 @@
+(module SOP65P640X120-14N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at -2.950 -1.950) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 2 smd rect (at -2.950 -1.300) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 3 smd rect (at -2.950 -0.650) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 4 smd rect (at -2.950 -0.000) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 5 smd rect (at -2.950 0.650) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 6 smd rect (at -2.950 1.300) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 7 smd rect (at -2.950 1.950) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 14 smd rect (at 2.950 -1.950) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 13 smd rect (at 2.950 -1.300) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 12 smd rect (at 2.950 -0.650) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 11 smd rect (at 2.950 -0.000) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 10 smd rect (at 2.950 0.650) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 9 smd rect (at 2.950 1.300) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (pad 8 smd rect (at 2.950 1.950) (size 1.525 0.450) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.001))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -2.300 -2.600) (end 2.300 -2.600) (layer F.SilkS) (width 0.200))
+  (fp_line (start 2.300 2.600) (end -2.300 2.600) (layer F.SilkS) (width 0.200))
+  (fp_line (start -2.300 -2.475) (end -4.013 -2.475) (layer F.SilkS) (width 0.200))
+  (fp_line (start -4.013 -2.475) (end -4.013 -1.725) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value SOP65P640X120-14N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_line (start -1.200 -2.500) (end 2.200 -2.500) (layer F.Fab) (width 0.100))
+  (fp_line (start 2.200 -2.500) (end 2.200 2.500) (layer F.Fab) (width 0.100))
+  (fp_line (start 2.200 2.500) (end -2.200 2.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -2.200 2.500) (end -2.200 -1.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -2.200 -1.500) (end -1.200 -2.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -3.963 -2.425) (end -2.450 -2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.450 -2.425) (end -2.450 -2.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.450 -2.750) (end 2.450 -2.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.450 -2.750) (end 2.450 -2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.450 -2.425) (end 3.963 -2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 3.963 -2.425) (end 3.963 2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 3.963 2.425) (end 2.450 2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.450 2.425) (end 2.450 2.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.450 2.750) (end -2.450 2.750) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.450 2.750) (end -2.450 2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.450 2.425) (end -3.963 2.425) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -3.963 2.425) (end -3.963 -2.425) (layer F.CrtYd) (width 0.050))
+  (model SOP65P640X120-14N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/SOT95P237X112-3N.kicad_mod
+++ b/kicad/qeda.pretty/SOT95P237X112-3N.kicad_mod
@ -0,0 +1,50 @@
+(module SOT95P237X112-3N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at -1.150 -0.950) (size 1.100 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at -1.150 0.950) (size 1.100 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 3 smd rect (at 1.150 0.000) (size 1.100 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.750 -1.560) (end 0.750 -1.560) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.750 -1.560) (end 0.750 -0.600) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.750 0.600) (end 0.750 1.560) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.750 1.560) (end -0.750 1.560) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.750 -0.350) (end -0.750 0.350) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.750 -1.550) (end -2.000 -1.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start -2.000 -1.550) (end -2.000 -0.650) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value SOT95P237X112-3N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.858 0.858) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.858 0.858) (thickness 0.100)))
+  )
+  (fp_line (start 0.000 -1.460) (end 0.650 -1.460) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.650 -1.460) (end 0.650 1.460) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.650 1.460) (end -0.650 1.460) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.650 1.460) (end -0.650 -0.810) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.650 -0.810) (end 0.000 -1.460) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.950 -1.500) (end -0.900 -1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.900 -1.500) (end -0.900 -1.710) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.900 -1.710) (end 0.900 -1.710) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.900 -1.710) (end 0.900 -0.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.900 -0.550) (end 1.950 -0.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.950 -0.550) (end 1.950 0.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.950 0.550) (end 0.900 0.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.900 0.550) (end 0.900 1.710) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.900 1.710) (end -0.900 1.710) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.900 1.710) (end -0.900 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.900 1.500) (end -1.950 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.950 1.500) (end -1.950 -1.500) (layer F.CrtYd) (width 0.050))
+  (model SOT95P237X112-3N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/SOT95P280X145-5N.kicad_mod
+++ b/kicad/qeda.pretty/SOT95P280X145-5N.kicad_mod
@ -0,0 +1,52 @@
+(module SOT95P280X145-5N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at -1.300 -0.950) (size 1.075 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at -1.300 0.000) (size 1.075 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 3 smd rect (at -1.300 0.950) (size 1.075 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 4 smd rect (at 1.300 0.950) (size 1.075 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 5 smd rect (at 1.300 -0.950) (size 1.075 0.600) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.900 -1.550) (end 0.900 -1.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.900 -0.350) (end 0.900 0.350) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.900 1.550) (end -0.900 1.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start -0.900 -1.550) (end -2.138 -1.550) (layer F.SilkS) (width 0.200))
+  (fp_line (start -2.138 -1.550) (end -2.138 -0.650) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value SOT95P280X145-5N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 1.000 1.000) (thickness 0.100)))
+  )
+  (fp_line (start 0.000 -1.450) (end 0.800 -1.450) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.800 -1.450) (end 0.800 1.450) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.800 1.450) (end -0.800 1.450) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.800 1.450) (end -0.800 -0.650) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.800 -0.650) (end 0.000 -1.450) (layer F.Fab) (width 0.100))
+  (fp_line (start -2.088 -1.500) (end -1.050 -1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 -1.500) (end -1.050 -1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 -1.700) (end 1.050 -1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 -1.700) (end 1.050 -1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 -1.500) (end 2.088 -1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.088 -1.500) (end 2.088 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 2.088 1.500) (end 1.050 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 1.500) (end 1.050 1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 1.700) (end -1.050 1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 1.700) (end -1.050 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 1.500) (end -2.088 1.500) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -2.088 1.500) (end -2.088 -1.500) (layer F.CrtYd) (width 0.050))
+  (model SOT95P280X145-5N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/UC1608X55N.kicad_mod
+++ b/kicad/qeda.pretty/UC1608X55N.kicad_mod
@ -0,0 +1,38 @@
+(module UC1608X55N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.700) (size 1.100 0.750) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.700) (size 1.100 0.750) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.850 -0.900) (end -0.850 0.900) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.850 -0.900) (end 0.850 0.900) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value UC1608X55N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_line (start -0.400 -0.800) (end 0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 -0.800) (end 0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 0.800) (end -0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 0.800) (end -0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.730 -1.255) (end -0.730 -0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.730 -0.980) (end -0.730 0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.730 0.980) (end -0.730 1.255) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.730 1.255) (end 0.730 1.255) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 1.255) (end 0.730 0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 0.980) (end 0.730 -0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 -0.980) (end 0.730 -1.255) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 -1.255) (end -0.730 -1.255) (layer F.CrtYd) (width 0.050))
+  (model UC1608X55N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/2
+++ b/2
@ -1 +1 @@
-Subproject commit 719c4ff438ce1e8c2b4edbdda390ee659d4c7ab8
+Subproject commit 00e9790a224eb9add19e01e9095b80b05f6cf944
--- a/mass_prop.sh
+++ b/mass_prop.sh
@ -1,58 +0,0 @@
-#!/bin/sh
-
-if test ! $# -eq 2
-then
-	echo "Need two arguments: a board file name and a tab file name" >&2
-	exit 1
-fi
-
-board="$1"
-tab="$2"
-
-if test ! -f "$board"
-then
-	echo "Board file $board not found" >&2
-	exit 1
-fi
-
-if test ! -f "$tab"
-then
-	echo "Tab file $tab not found" >&2
-	exit 1
-fi
-
-btmp=.tmp.$board
-
-awk -F "[ \t]*[;][ \t]*" -v "outfn=$btmp" '
-
-BEGIN { sq = "'\''" }
-
-# quote s with single quotes and remove any single quote from it
-# (pcb-rnd action syntax does not have escaping)
-function squote(s)
-{
-	gsub("[" sq "]", ".", s)
-	return sq s sq
-}
-
-# ignore comments
-/^[ \t]*#/ { next }
-
-# generate an unselect-query-propset sequence for each line
-(NF > 1) {
-	print "Unselect(all)"
-	print "query(select, " squote($1) ")"
-	for(n = 2; n <= NF; n++) {
-		if (split($n, A, "=") == 2)
-			print "propset(selection, " squote(A[1]) "," squote(A[2]) ")"
-	}
-}
-
-END {
-	print "Unselect(all)"
-	print "Save(LayoutAs, " squote(outfn) ")"
-}
-
-' < "$tab" | pcb-rnd --gui batch "$board" && mv "$btmp" "$board"
-
-
--- a/pd_blocker.kicad_pcb
+++ b/pd_blocker.kicad_pcb
--- a/pd_blocker.kicad_pro
+++ b/pd_blocker.kicad_pro
@ -0,0 +1,517 @@
+{
+  "board": {
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.09999999999999999,
+        "copper_line_width": 0.19999999999999998,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.049999999999999996,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.09999999999999999,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.15,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.0,
+          "height": 1.1,
+          "width": 0.45
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "45_degree_only": false,
+          "min_clearance": 0.19999999999999998
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
+      "drc_exclusions": [
+        "missing_courtyard|91100000|56700000|4c2385c4-3c30-43ba-8eff-a9fdda7fd893|00000000-0000-0000-0000-000000000000",
+        "missing_courtyard|91100000|75400000|7111aa2d-b54e-49b3-9311-3b1daeadc57c|00000000-0000-0000-0000-000000000000"
+      ],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "copper_edge_clearance": "error",
+        "courtyards_overlap": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint_type_mismatch": "error",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "warning",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "error",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_over_copper": "ignore",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zone_has_empty_net": "error",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "allow_blind_buried_vias": false,
+        "allow_microvias": false,
+        "max_error": 0.005,
+        "min_clearance": 0.09,
+        "min_copper_edge_clearance": 0.09999999999999999,
+        "min_hole_clearance": 0.19999999999999998,
+        "min_hole_to_hole": 0.254,
+        "min_microvia_diameter": 0.19999999999999998,
+        "min_microvia_drill": 0.09999999999999999,
+        "min_silk_clearance": 0.0,
+        "min_through_hole_diameter": 0.19999999999999998,
+        "min_track_width": 0.09,
+        "min_via_annular_width": 0.125,
+        "min_via_diameter": 0.44999999999999996,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0,
+        "use_height_for_length_calcs": true
+      },
+      "track_widths": [
+        0.0,
+        0.1,
+        0.3
+      ],
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.45,
+          "drill": 0.2
+        }
+      ],
+      "zones_allow_external_fillets": false,
+      "zones_use_no_outline": true
+    },
+    "layer_presets": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_label_syntax": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "pd_blocker.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12.0,
+        "clearance": 0.1,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.2,
+        "via_diameter": 0.6,
+        "via_drill": 0.3,
+        "wire_width": 6.0
+      },
+      {
+        "bus_width": 12.0,
+        "clearance": 0.09,
+        "diff_pair_gap": 0.1778,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.19177,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "diff",
+        "nets": [
+          "/DA+",
+          "/DA-",
+          "/DB+",
+          "/DB-",
+          "/RX1+",
+          "/RX1-",
+          "/RX2+",
+          "/RX2-",
+          "/TX1+",
+          "/TX1-",
+          "/TX2+",
+          "/TX2-"
+        ],
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.09,
+        "via_diameter": 0.2,
+        "via_drill": 0.45,
+        "wire_width": 6.0
+      },
+      {
+        "bus_width": 12.0,
+        "clearance": 0.1,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "power",
+        "nets": [
+          "/VBUS",
+          "/VBUS1",
+          "/VBUS2",
+          "/VREF",
+          "GND",
+          "GNDPWR",
+          "VCC"
+        ],
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.3,
+        "via_diameter": 0.8,
+        "via_drill": 0.4,
+        "wire_width": 6.0
+      },
+      {
+        "bus_width": 12.0,
+        "clearance": 0.09,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "thin",
+        "nets": [],
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.09,
+        "via_diameter": 0.5,
+        "via_drill": 0.3,
+        "wire_width": 6.0
+      }
+    ],
+    "meta": {
+      "version": 2
+    },
+    "net_colors": null
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "drawing": {
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_external_command": "spice \"%I\"",
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "43fc3289-82a7-492c-a423-3030e10115dc",
+      ""
+    ]
+  ],
+  "text_variables": {}
+}
--- a/pd_blocker.kicad_sch
+++ b/pd_blocker.kicad_sch
--- a/picture/v2_back.webp
+++ b/picture/v2_back.webp
--- a/picture/v2_front.webp
+++ b/picture/v2_front.webp
--- a/pnp_fab.tab
+++ b/pnp_fab.tab
@ -1,9 +0,0 @@
-@.a.footprint == "LEDC2012X80N.lht"; a/xy::jlcpcb::rotate=270;
-@.a.footprint == "RESC1608X55N.lht"; a/xy::jlcpcb::rotate=90;
-@.a.footprint == "CONNECTOR_USB_MICRO-B_C10418.lht"; a/xy::jlcpcb::translate=-1.2mm,0mm;
-@.a.footprint == "CONNECTOR_USB_MICRO-B_C10418.lht"; a/xy::jlcpcb::rotate=270;
-@.a.footprint == "CONNECTOR_USB-A-2.0_RECEPTACLE_C42428.lht"; a/xy::jlcpcb::translate=0mm,-1.7mm;
-@.a.footprint == "CONNECTOR_MY-1220-03.lht"; a/xy::jlcpcb::translate=0mm,-0.95mm;
-@.a.footprint == "CONNECTOR_XKB_U262-24XN-4BV60.lht"; a/xy::jlcpcb::rotate=180;
-@.a.footprint == "CONNECTOR_XKB_U262-24XN-4BV60.lht"; a/xy::jlcpcb::translate=0mm,0.7mm;
-@.a.footprint == "SOT95P237X112-3N.lht"; a/xy::jlcpcb::rotate=180;
--- a/refdes2fab.py
+++ b/refdes2fab.py
@ -0,0 +1,9 @@
+import pcbnew
+import sys
+
+board = pcbnew.LoadBoard(sys.argv[1])
+for fp in board.GetFootprints():
+  fp.Value().SetVisible(False)
+  fp.Reference().SetLayer(board.GetLayerID('F.Fab'))
+
+board.Save(sys.argv[1])
--- a/3
+++ b/3
@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name "qeda")(type "Legacy")(uri "${KIPRJMOD}/kicad/qeda.lib")(options "")(descr ""))
+)
--- a/template.lht
+++ b/template.lht
@ -1,587 +0,0 @@
-ha:pcb-rnd-board-v8 {
-
- li:styles {
-   ha:Signal {
-    via_proto = 0
-    thickness = 6.0mil
-    text_thick = 0.0
-    text_scale = 100
-    clearance = 6.0mil
-   }
-   ha:Power {
-    via_proto = 1
-    thickness = 10.0mil
-    text_thick = 0.0
-    text_scale = 100
-    clearance = 10.0mil
-   }
-   ha:Fat {
-    via_proto = 2
-    thickness = 80.0mil
-    text_thick = 0.0
-    text_scale = 100
-    clearance = 25.0mil
-   }
-   ha:Sig-tight {
-    via_proto = 3
-    thickness = 10.0mil
-    text_thick = 0.0
-    text_scale = 100
-    clearance = 12.0mil
-   }
- }
-
- ha:meta {
-   ha:size {
-    thermal_scale = 0.500000
-    x = 100.0mm
-    y = 100.0mm
-   }
-   ha:grid {
-    spacing = 0.5mm
-    offs_x = 0.0
-    offs_y = 0.0
-   }
- }
-
- ha:data {
-  li:padstack_prototypes {
-
-   ha:ps_proto_v6.0 {
-     hdia=0.3mm; hplated=1; htop=0; hbottom=0;
-     li:shape {
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=0.6mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         top = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=0.6mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         bottom = 1
-         copper = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=0.6mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         intern = 1
-        }
-        clearance=0.0
-       }
-     }
-   }
-
-   ha:ps_proto_v6.1 {
-     hdia=0.5mm; hplated=1; htop=0; hbottom=0;
-     li:shape {
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=0.8mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         top = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=0.8mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         bottom = 1
-         copper = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=0.8mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         intern = 1
-        }
-        clearance=0.0
-       }
-     }
-   }
-
-   ha:ps_proto_v6.2 {
-     hdia=1.2mm; hplated=1; htop=0; hbottom=0;
-     li:shape {
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=3.5mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         top = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=3.5mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         bottom = 1
-         copper = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=3.5mm;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         intern = 1
-        }
-        clearance=0.0
-       }
-     }
-   }
-
-   ha:ps_proto_v6.3 {
-     hdia=0.8mm; hplated=1; htop=0; hbottom=0;
-     li:shape {
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=64.0mil;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         top = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=64.0mil;        }
-        ha:combining {        }
-        ha:layer_mask {
-         bottom = 1
-         copper = 1
-        }
-        clearance=0.0
-       }
-
-       ha:ps_shape_v4 {
-        ha:ps_circ { x=0.0; y=0.0; dia=64.0mil;        }
-        ha:combining {        }
-        ha:layer_mask {
-         copper = 1
-         intern = 1
-        }
-        clearance=0.0
-       }
-     }
-   }
-  }
-
-   li:objects {
-   }
-   li:layers {
-
-    ha:top-sig {
-     lid=0
-     group=3
-     ha:combining {     }
-
-      ha:attributes {
-        {pcb-rnd::key::vis}={<Key>l; Shift<Key>t}
-        {pcb-rnd::key::select}={<Key>l; <Key>t}
-      }
-
-      li:objects {
-      }
-      color = {#238b27}
-    }
-
-    ha:bottom-sig {
-     lid=1
-     group=10
-     ha:combining {     }
-
-      ha:attributes {
-        {pcb-rnd::key::vis}={<Key>l; Shift<Key>b}
-        {pcb-rnd::key::select}={<Key>l; <Key>b}
-      }
-
-      li:objects {
-      }
-      color = {#38ee39}
-    }
-
-    ha:top-gnd {
-     lid=2
-     group=3
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#104e8b}
-    }
-
-    ha:bottom-gnd {
-     lid=3
-     group=10
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#6164ff}
-    }
-
-    ha:outline {
-     lid=4
-     group=7
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#00868b}
-    }
-
-    ha:bottom-silk {
-     lid=5
-     group=12
-     ha:combining { auto=1;     }
-
-      ha:attributes {
-        {pcb-rnd::key::vis}={<Key>l; Shift<Key>x}
-        {pcb-rnd::key::select}={<Key>l; <Key>x}
-      }
-
-      li:objects {
-      }
-      color = {#000000}
-    }
-
-    ha:top-silk {
-     lid=6
-     group=1
-     ha:combining { auto=1;     }
-
-      ha:attributes {
-        {pcb-rnd::key::vis}={<Key>l; Shift<Key>s}
-        {pcb-rnd::key::select}={<Key>l; <Key>s}
-      }
-
-      li:objects {
-      }
-      color = {#000000}
-    }
-
-    ha:top-paste {
-     lid=7
-     group=0
-     ha:combining { auto=1;     }
-
-      li:objects {
-      }
-      color = {#cd00cd}
-    }
-
-    ha:top-mask {
-     lid=8
-     group=2
-     ha:combining { sub=1; auto=1;     }
-
-      li:objects {
-      }
-      color = {#ff0000}
-    }
-
-    ha:bottom-mask {
-     lid=9
-     group=11
-     ha:combining { sub=1; auto=1;     }
-
-      li:objects {
-      }
-      color = {#ff0000}
-    }
-
-    ha:bottom-paste {
-     lid=10
-     group=13
-     ha:combining { auto=1;     }
-
-      li:objects {
-      }
-      color = {#cd00cd}
-    }
-
-    ha:slot-plated {
-     lid=11
-     group=14
-     ha:combining { auto=1;     }
-
-      li:objects {
-      }
-      color = {#8b7355}
-    }
-
-    ha:slot-unplated {
-     lid=12
-     group=15
-     ha:combining { auto=1;     }
-
-      li:objects {
-      }
-      color = {#00868b}
-    }
-
-    ha:top-assy {
-     lid=13
-     group=16
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#444444}
-    }
-
-    ha:bot-assy {
-     lid=14
-     group=17
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#444444}
-    }
-
-    ha:fab {
-     lid=15
-     group=18
-     ha:combining { auto=1;     }
-
-      li:objects {
-      }
-      color = {#222222}
-    }
-
-    ha:top-courtyard {
-     lid=16
-     group=8
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#104e8b}
-    }
-
-    ha:bot-courtyard {
-     lid=17
-     group=9
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#cd3700}
-    }
-
-    ha:top-pwr {
-     lid=18
-     group=3
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#c24744}
-    }
-
-    ha:bottom-pwr {
-     lid=19
-     group=10
-     ha:combining {     }
-
-      li:objects {
-      }
-      color = {#ff5759}
-    }
-   }
- }
- ha:layer_stack {
-  li:groups {
-   ha:0 {
-    name = top_paste
-    ha:type { top=1; paste=1;    }
-    li:layers { 7;    }
-   }
-   ha:1 {
-    name = top_silk
-    ha:type { silk=1; top=1;    }
-    li:layers { 6;    }
-   }
-   ha:2 {
-    name = top_mask
-    ha:type { top=1; mask=1;    }
-    li:layers { 8;    }
-   }
-   ha:3 {
-    name = top_copper
-    ha:type { copper=1; top=1;    }
-    li:layers { 0; 18; 2;    }
-   }
-   ha:4 {
-    name = grp_4
-    ha:type { substrate=1; intern=1;    }
-    li:layers {    }
-    ha:attributes {
-     thickness={0.7375mm }
-    }
-   }
-   ha:5 {
-    name = grp_6
-    ha:type { substrate=1; intern=1;    }
-    li:layers {    }
-    ha:attributes {
-     thickness={0.125mm }
-    }
-   }
-   ha:6 {
-    name = grp_8
-    ha:type { substrate=1; intern=1;    }
-    li:layers {    }
-    ha:attributes {
-     thickness={0.7375mm }
-    }
-   }
-   ha:7 {
-    name = global_outline
-    ha:type { boundary=1;    }
-    li:layers { 4;    }
-    purpose = uroute
-   }
-   ha:8 {
-    name = top-courtyard
-    ha:type { top=1; doc=1;    }
-    li:layers { 16;    }
-    ha:attributes {
-     init-invis=true
-    }
-    purpose = ko.courtyard
-   }
-   ha:9 {
-    name = bot-courtyard
-    ha:type { bottom=1; doc=1;    }
-    li:layers { 17;    }
-    ha:attributes {
-     init-invis=true
-    }
-    purpose = ko.courtyard
-   }
-   ha:10 {
-    name = bottom_copper
-    ha:type { bottom=1; copper=1;    }
-    li:layers { 1; 19; 3;    }
-   }
-   ha:11 {
-    name = bottom_mask
-    ha:type { bottom=1; mask=1;    }
-    li:layers { 9;    }
-   }
-   ha:12 {
-    name = bottom_silk
-    ha:type { silk=1; bottom=1;    }
-    li:layers { 5;    }
-   }
-   ha:13 {
-    name = bottom_paste
-    ha:type { bottom=1; paste=1;    }
-    li:layers { 10;    }
-   }
-   ha:14 {
-    name = pmech
-    ha:type { mech=1;    }
-    li:layers { 11;    }
-    purpose = proute
-   }
-   ha:15 {
-    name = umech
-    ha:type { mech=1;    }
-    li:layers { 12;    }
-    purpose = uroute
-   }
-   ha:16 {
-    name = top_assy
-    ha:type { top=1; doc=1;    }
-    li:layers { 13;    }
-    ha:attributes {
-     init-invis=1
-    }
-    purpose = assy
-   }
-   ha:17 {
-    name = bot_assy
-    ha:type { bottom=1; doc=1;    }
-    li:layers { 14;    }
-    ha:attributes {
-     init-invis=1
-    }
-    purpose = assy
-   }
-   ha:18 {
-    name = fab
-    ha:type { top=1; doc=1;    }
-    li:layers { 15;    }
-    ha:attributes {
-     init-invis=1
-    }
-    purpose = fab
-   }
-  }
- }
- li:pcb-rnd-conf-v1 {
-  ha:overwrite {
-   ha:design {
-    via_proto = 1
-    text_font_id = 0
-    text_scale = 100
-    min_slk = 0.15240000 mm
-    text_thickness = 0
-    line_thickness = 10.00 mil
-    ha:drc {
-     min_ring = 0.15 mm
-     min_copper_overlap = 6.0 mil
-     min_drill = 0.3 mm
-    }
-    min_wid = 0.15240000 mm
-    bloat = 0.15240000 mm
-    clearance = 10.00 mil
-   }
-   ha:editor {
-    grid_unit = mm
-    grids_idx = 11
-    grid = 500.00 um
-   }
-   ha:rc {
-    li:library_search_paths {
-     $(rc.path.design)/coraleda/subc  
-     $(rc.path.design)/coraleda/subc  
-     ?../pcblib  
-     ?~/pcblib/  
-     $(rc.path.share)/pcblib  
-    }
-   }
-  }
- }
- ha:pixmaps {
- }
-}
--- a/template.sch
+++ b/template.sch
@ -1,22 +0,0 @@
-v 20210626 2
-C 0 0 1 0 0 title.sym
-{
-T 1000 700 5 10 1 1 0 0 1
-date=$date$
-T 4300 700 5 10 1 1 0 0 1
-org=CuVoodoo
-T 4300 400 5 10 1 1 0 0 1
-authors=King Kévin
-T 3000 1200 5 14 1 1 0 4 1
-title=TITLE
-T 1000 400 5 10 1 1 0 0 1
-version=$version$
-T 1000 100 5 10 1 1 0 0 1
-revision=$revision$
-T 4300 100 5 10 1 1 0 0 1
-licence=CERN-OHL-S
-T 0 1800 5 10 0 0 0 0 1
-device=none
-T 0 2000 5 10 0 0 0 0 1
-footprint=none
-}
--- a/2
+++ b/2
@ -1 +1 @@
-0
+2
Author	SHA1	Message	Date
King Kévin	0c4987cd21	doc: overall improvement	2022-11-14 23:40:17 +01:00
King Kévin	3001cc643a	doc: fix picture links	2022-11-13 16:11:36 +01:00
King Kévin	6e1c31dc20	doc: add pictures	2022-11-13 16:10:28 +01:00
King Kévin	d07b963fe1	doc: add v2 change log	2022-11-13 15:58:20 +01:00
King Kévin	65347afc6c	brd: increase tab size for V-cut	2022-11-13 15:54:54 +01:00
King Kévin	100885158c	lib: update repo	2022-11-13 15:54:17 +01:00
King Kévin	82e1625925	sch: correct corrector position	2022-10-21 13:26:03 +02:00
King Kévin	041d02550f	brd: prepare for panel	2022-10-21 13:25:32 +02:00
King Kévin	d62c6ab718	brd: fix LED placement	2022-09-12 15:28:31 +02:00
King Kévin	ac2b3405ae	sch: complete bom	2022-08-12 16:47:02 +02:00
King Kévin	6a8f701bc3	remove lepton/rindove v1 design	2022-08-11 11:44:27 +02:00
King Kévin	cf80f5126a	make: add kicad scripts	2022-08-11 11:41:11 +02:00
King Kévin	853e962b98	sch/brd: copy design to kicad	2022-08-11 11:40:35 +02:00
King Kévin	87b8f56bba	lib: generate library for kicad	2022-08-11 11:38:33 +02:00
King Kévin	b146df5098	switch to version 2	2022-08-11 11:31:16 +02:00
King Kévin	208e5e2156	README: document OVP LED	2022-05-18 17:35:59 +02:00
King Kévin	b386c5b15f	document v1 in changelog	2022-05-18 17:31:17 +02:00
King Kévin	1f594f997a	update library repo	2022-05-18 17:15:01 +02:00
King Kévin	ce526a753e	rake: export gerber in a directory	2022-05-18 17:11:53 +02:00
King Kévin	f6f612837c	rake: ignore stdout when exporting svg	2022-05-18 17:11:22 +02:00
King Kévin	d4d39c742e	brd: cleanup	2022-05-18 17:08:01 +02:00
King Kévin	e5d831d11d	brd: minor, clear stub	2022-04-16 10:17:11 +02:00
King Kévin	c38bfd7936	brd: improve shield	2022-04-16 10:13:16 +02:00
King Kévin	8a36fbd62c	brd: fix hole trace clearance issue	2022-04-16 10:08:53 +02:00
King Kévin	906ccac431	brd: add QR code	2022-04-14 14:40:54 +02:00
King Kévin	c14b543b1c	brd: fix plug paste	2022-04-14 14:28:07 +02:00
King Kévin	5b0ca4ee73	lib: list used parts	2022-04-14 14:13:20 +02:00
King Kévin	b1402124fb	sch: fill description	2022-04-14 14:12:54 +02:00
King Kévin	8a40d9d324	brd: cleanup	2022-04-14 13:46:17 +02:00
King Kévin	05da2fe9e0	brd: v1 routed	2022-04-14 13:23:48 +02:00
King Kévin	3314ba3232	sch: simplify debug header	2022-04-14 13:22:11 +02:00
King Kévin	698b54f518	sch: use single resistor for both LEDs	2022-04-13 17:17:39 +02:00
King Kévin	f6f8dac594	sch: add OVP status LEDs	2022-04-12 15:48:55 +02:00
King Kévin	edb6c05d60	lib: add LED	2022-04-12 15:48:35 +02:00
King Kévin	3ca4984dbb	sch: replace comparator	2022-04-12 15:23:59 +02:00
King Kévin	af77464f16	lib: add LM339 quad-comparator	2022-04-12 15:23:13 +02:00
King Kévin	b7fce82fd8	sch: use LDO as voltage reference	2022-04-12 15:16:06 +02:00
King Kévin	09a33c8030	lib: add LDO	2022-04-12 15:15:01 +02:00
King Kévin	76a8e51616	sch: fix and improve pMOS control	2022-04-08 16:42:05 +02:00
King Kévin	5ea1d7ff1e	sch: use diode for power source	2022-04-08 16:32:30 +02:00
King Kévin	57f1912036	lib: add BAV74 diode	2022-04-08 16:31:46 +02:00
King Kévin	c88e8428e8	README: fix usage	2022-04-08 16:28:36 +02:00
King Kévin	2cea26444f	sch: use fixed USB-C plug	2022-04-08 11:04:47 +02:00
King Kévin	1ef7bab466	lib: export fixed USB-C plug	2022-04-08 11:04:09 +02:00
King Kévin	16b69049a6	start v1 development	2022-04-08 11:03:35 +02:00
King Kévin	6e0ce9c3a6	add changelog, listing design errors	2022-04-08 10:58:31 +02:00
King Kévin	286c1ee872	README: better describe over-voltage protection	2022-04-08 10:57:55 +02:00
King Kévin	f7bde7ea28	brd: minor cleanup	2022-04-06 13:07:49 +02:00
King Kévin	40e0972622	brd: add pullback DRC rule	2022-03-23 18:09:56 +01:00
King Kévin	2f3f9abb59	brd: add QR code	2022-03-23 17:55:08 +01:00
King Kévin	6d803b2504	add project description	2022-03-23 11:37:40 +01:00
King Kévin	b7f120f00e	brd: first completed layout	2022-03-23 10:50:33 +01:00
King Kévin	9bfda73719	sch: first completed design	2022-03-23 10:50:33 +01:00
King Kévin	7efd21e30c	lib: add generated parts	2022-03-23 10:50:33 +01:00
King Kévin	1625d23247	lib: define parts used by project	2022-03-23 10:50:33 +01:00
King Kévin	d6c219b381	lib: prefer manufacturer footprint	2022-03-23 10:50:28 +01:00
King Kévin	5a71e68dce	lib: add generic chassis symbol	2022-03-23 10:49:54 +01:00
King Kévin	7052fb69bb	rename project	2022-03-23 10:49:54 +01:00