sch: prevent 6-40V feedback

This commit is contained in:
King Kévin 2022-06-16 19:16:21 +02:00
parent b165245ded
commit f9abdbdb4d
1 changed files with 178 additions and 166 deletions

View File

@ -1,54 +1,48 @@
v 20211219 2 v 20211219 2
N 48300 52400 49000 52400 4 N 46400 51500 47100 51500 4
{ {
T 48500 52400 5 10 1 1 0 0 1 T 46600 51500 5 10 1 1 0 0 1
netname=PWR1 netname=PWR1
} }
C 51400 51100 1 0 0 5V.sym C 51400 51100 1 0 0 5V.sym
C 50000 46300 1 0 0 VTRG.sym C 45700 48900 1 0 0 VTRG.sym
C 47300 43900 1 0 0 BSS138.sym C 48300 45900 1 90 0 BSS138.sym
{ {
T 47300 43900 5 8 0 0 0 0 1 T 48300 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 47300 43900 5 10 0 1 0 0 1 T 48300 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD description=transistor, MOSFET, n-channel, GSD
T 47300 43900 5 10 0 0 0 0 1 T 48300 45900 5 10 0 0 90 0 1
value=BSS138 value=BSS138
T 47740 44760 5 10 1 1 0 6 1 T 47460 47140 5 10 1 1 180 6 1
refdes=Q103 refdes=Q103
T 48140 44140 5 10 1 1 0 8 1 T 48060 46740 5 10 1 1 90 8 1
device=BSS138 device=BSS138
} }
C 49200 45500 1 180 1 40P05.sym C 46100 47900 1 270 1 40P05.sym
{ {
T 49200 45500 5 8 0 0 180 6 1 T 46100 47900 5 8 0 0 270 6 1
footprint=SOT95P237X112-3N.lht footprint=SOT95P237X112-3N.lht
T 49200 45500 5 10 0 1 0 0 1 T 46100 47900 5 10 0 1 90 0 1
lcsc=C2886385 lcsc=C2886385
T 49200 45500 5 10 0 1 0 0 1 T 46100 47900 5 10 0 1 90 0 1
description=transistor, MOSFET, p-channel, >=40V, >=5A description=transistor, MOSFET, p-channel, >=40V, >=5A
T 49200 45500 5 10 0 1 0 0 1 T 46100 47900 5 10 0 1 90 0 1
value=AP40P05 value=AP40P05
T 49540 44840 5 10 1 1 180 0 1 T 46460 48960 5 10 1 1 0 0 1
refdes=Q104 refdes=Q106
T 50040 45260 5 10 1 1 180 2 1 T 46340 48740 5 10 1 1 270 2 1
device=40P05 device=40P05
} }
C 48200 43700 1 0 0 GND.sym C 48500 46800 1 90 0 GND.sym
N 50200 45500 50200 46300 4 N 47100 45700 47900 45700 4
N 46600 44300 47300 44300 4
{ {
T 46700 44300 5 10 1 1 0 0 1 T 47200 45700 5 10 1 1 0 0 1
netname=POW1 netname=POW1
} }
N 50200 44300 51500 44300 4 N 46400 50300 47100 50300 4
{ {
T 50300 44300 5 10 1 1 0 0 1 T 46600 50300 5 10 1 1 0 0 1
netname=VOUT1
}
N 48300 51200 49000 51200 4
{
T 48500 51200 5 10 1 1 0 0 1
netname=OCS1 netname=OCS1
} }
C 58400 45800 1 0 1 906-351A1012D10200.sym C 58400 45800 1 0 1 906-351A1012D10200.sym
@ -68,29 +62,29 @@ refdes=J101
T 58500 47800 5 10 1 1 0 6 1 T 58500 47800 5 10 1 1 0 6 1
value=USB-A 2.0 RECEPTACLE value=USB-A 2.0 RECEPTACLE
} }
C 52600 43800 1 0 1 pwrjack-2.sym C 51000 48400 1 0 1 pwrjack-2.sym
{ {
T 52600 44700 5 10 0 0 0 6 1 T 51000 49300 5 10 0 0 0 6 1
device=PWRJACK device=PWRJACK
T 52600 44900 5 10 0 0 0 6 1 T 51000 49500 5 10 0 0 0 6 1
footprint=CONNECTOR_DC-005_2.0.lht footprint=CONNECTOR_DC-005_2.0.lht
T 52600 43800 5 10 0 1 0 0 1 T 51000 48400 5 10 0 1 0 0 1
lcsc=C16214 lcsc=C16214
T 52600 43800 5 10 0 1 0 0 1 T 51000 48400 5 10 0 1 0 0 1
description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm description=connector, DC power jack, barrel, ID 2.0mm, OD 6.4mm
T 52600 44500 5 10 1 1 0 6 1 T 51000 49100 5 10 1 1 0 6 1
refdes=J102 refdes=J102
T 52600 43600 5 10 1 1 0 6 1 T 51000 48200 5 10 1 1 0 6 1
value=OUT 6-40V value=OUT 6-40V
} }
C 51300 44000 1 270 0 GND.sym C 49700 48600 1 270 0 GND.sym
C 51500 44200 1 180 0 nc-right-1.sym C 49900 48800 1 180 0 nc-right-1.sym
{ {
T 51400 43700 5 10 0 0 180 0 1 T 49800 48300 5 10 0 0 180 0 1
value=NoConnection value=NoConnection
T 51400 43500 5 10 0 0 180 0 1 T 49800 48100 5 10 0 0 180 0 1
device=DRC_Directive device=DRC_Directive
T 51400 42900 5 10 0 0 180 0 1 T 49800 47500 5 10 0 0 180 0 1
symversion=1.1 symversion=1.1
} }
N 55200 47500 56000 47500 4 N 55200 47500 56000 47500 4
@ -116,80 +110,80 @@ value=USBLC6-2SC6
} }
C 53400 48400 1 0 0 5V.sym C 53400 48400 1 0 0 5V.sym
C 53500 45700 1 0 0 GND.sym C 53500 45700 1 0 0 GND.sym
C 48300 51500 1 0 0 nc-right-1.sym C 46400 50600 1 0 0 nc-right-1.sym
{ {
T 48400 52000 5 10 0 0 0 0 1 T 46500 51100 5 10 0 0 0 0 1
value=NoConnection value=NoConnection
T 48400 52200 5 10 0 0 0 0 1 T 46500 51300 5 10 0 0 0 0 1
device=DRC_Directive device=DRC_Directive
T 48400 52800 5 10 0 0 0 0 1 T 46500 51900 5 10 0 0 0 0 1
symversion=1.1 symversion=1.1
} }
N 48300 52000 49000 52000 4 N 46400 51100 47100 51100 4
{ {
T 48500 52000 5 10 1 1 0 0 1 T 46600 51100 5 10 1 1 0 0 1
netname=LED1 netname=LED1
} }
C 48400 50000 1 270 0 LED0805.sym C 51500 45300 1 270 0 LED0805.sym
{ {
T 48400 50000 5 8 0 0 270 0 1 T 51500 45300 5 8 0 0 270 0 1
footprint=LEDC2012X80N.lht footprint=LEDC2012X80N.lht
T 48400 50000 5 10 0 1 0 0 1 T 51500 45300 5 10 0 1 0 0 1
description=diode, LED, 0805 description=diode, LED, 0805
T 48200 49460 5 10 1 1 0 3 1 T 51300 44760 5 10 1 1 0 3 1
refdes=D102 refdes=D102
T 48800 49400 5 10 1 1 0 0 1 T 51900 44700 5 10 1 1 0 0 1
value=RED value=RED
} }
C 48500 49400 1 0 0 GND.sym C 51600 44700 1 0 0 GND.sym
C 48400 50400 1 270 0 LED0805.sym C 51500 45700 1 270 0 LED0805.sym
{ {
T 48400 50400 5 8 0 0 270 0 1 T 51500 45700 5 8 0 0 270 0 1
footprint=LEDC2012X80N.lht footprint=LEDC2012X80N.lht
T 48400 50400 5 10 0 1 0 0 1 T 51500 45700 5 10 0 1 0 0 1
description=diode, LED, 0805 description=diode, LED, 0805
T 48200 50260 5 10 1 1 0 3 1 T 51300 45560 5 10 1 1 0 3 1
refdes=D101 refdes=D101
T 48700 50400 5 10 1 1 0 0 1 T 51800 45700 5 10 1 1 0 0 1
value=BLUE value=BLUE
} }
C 48400 50400 1 0 0 3V3.sym C 51500 45700 1 0 0 3V3.sym
N 47700 50000 46800 50000 4 N 50800 45300 49900 45300 4
{ {
T 47300 50000 5 10 1 1 0 6 1 T 50400 45300 5 10 1 1 0 6 1
netname=LED1 netname=LED1
} }
C 47700 49900 1 0 0 resistor-1.sym C 50800 45200 1 0 0 resistor-1.sym
{ {
T 48000 50300 5 10 0 0 0 0 1 T 51100 45600 5 10 0 0 0 0 1
device=RESISTOR device=RESISTOR
T 47900 50400 5 10 0 1 0 0 1 T 51000 45700 5 10 0 1 0 0 1
footprint=RESC1608X55N.lht footprint=RESC1608X55N.lht
T 47900 50600 5 10 0 0 0 0 1 T 51000 45900 5 10 0 0 0 0 1
symversion=0.1 symversion=0.1
T 48000 50000 5 10 0 1 0 0 1 T 51100 45300 5 10 0 1 0 0 1
description=resistor, chip, 0603, >=0.1W, <=5% description=resistor, chip, 0603, >=0.1W, <=5%
T 47400 50100 5 10 1 1 0 0 1 T 50500 45400 5 10 1 1 0 0 1
refdes=R106 refdes=R106
T 47700 49800 5 10 1 1 0 0 1 T 50800 45100 5 10 1 1 0 0 1
value=1k value=1k
} }
C 50400 44300 1 90 1 capacitor-2.sym C 49400 48900 1 90 1 capacitor-2.sym
{ {
T 49700 44100 5 10 0 0 270 2 1 T 48700 48700 5 10 0 0 270 2 1
device=AEC device=AEC
T 50400 44300 5 10 0 0 0 0 1 T 49400 48900 5 10 0 0 0 0 1
footprint=CAPPRD250W50D630H700N.lht footprint=CAPPRD250W50D630H700N.lht
T 50400 44300 5 10 0 0 0 0 1 T 49400 48900 5 10 0 0 0 0 1
lcsc=C47891 lcsc=C47891
T 50400 44300 5 10 0 0 0 0 1 T 49400 48900 5 10 0 0 0 0 1
description=capacitor, AEC, radial, >=50V, >=-20% description=capacitor, AEC, radial, >=50V, >=-20%
T 50400 44000 5 10 1 1 0 0 1 T 48500 48600 5 10 1 1 0 0 1
refdes=C102 refdes=C102
T 50300 43500 5 10 1 1 0 0 1 T 48500 48200 5 10 1 1 0 0 1
value=100uF value=100uF
} }
C 50100 43200 1 0 0 GND.sym C 49100 47800 1 0 0 GND.sym
C 57000 45800 1 90 1 C0603.sym C 57000 45800 1 90 1 C0603.sym
{ {
T 57000 45800 5 8 0 0 270 2 1 T 57000 45800 5 8 0 0 270 2 1
@ -203,49 +197,49 @@ value=100nF
} }
N 57200 45500 57200 45800 4 N 57200 45500 57200 45800 4
N 57200 45800 56700 45800 4 N 57200 45800 56700 45800 4
N 48300 53200 49000 53200 4 N 46400 52300 47100 52300 4
{ {
T 48500 53200 5 10 1 1 0 0 1 T 46600 52300 5 10 1 1 0 0 1
netname=DP1 netname=DP1
} }
N 48300 52800 49000 52800 4 N 46400 51900 47100 51900 4
{ {
T 48500 52800 5 10 1 1 0 0 1 T 46600 51900 5 10 1 1 0 0 1
netname=DM1 netname=DM1
} }
C 46700 51200 1 0 0 USB2517_part-2-8-DFP1.sym C 44800 50300 1 0 0 USB2517_part-2-8-DFP1.sym
{ {
T 46700 51200 5 8 0 0 0 0 1 T 44800 50300 5 8 0 0 0 0 1
footprint=QFN50P900X900X100-65N.lht footprint=QFN50P900X900X100-65N.lht
T 46700 51200 5 10 0 0 0 0 1 T 44800 50300 5 10 0 0 0 0 1
lcsc=C1521556 lcsc=C1521556
T 46700 53620 5 10 1 1 0 0 1 T 44800 52720 5 10 1 1 0 0 1
refdes=U1 refdes=U1
T 46700 53460 5 10 1 1 0 0 1 T 44800 52560 5 10 1 1 0 0 1
device=USB2517 device=USB2517
T 46700 50800 5 10 1 1 0 0 1 T 44800 49900 5 10 1 1 0 0 1
value=USB2517-JZX value=USB2517-JZX
} }
T 50100 52600 9 10 1 0 180 0 1 T 48200 51700 9 10 1 0 180 0 1
active high active high
T 48500 43600 9 10 1 0 0 0 4 T 48400 45700 9 10 1 0 0 0 4
invert power invert power
control signal control signal
and handle and handle
higher voltage higher voltage
T 48300 48600 9 10 1 0 0 0 3 T 47000 44500 9 10 1 0 0 0 3
switch switch
can force can force
power off power off
T 49100 49700 9 10 1 0 0 0 3 T 52200 45000 9 10 1 0 0 0 3
blue = LS blue = LS
purple = HS purple = HS
red = FS red = FS
T 50100 52100 9 10 1 0 180 0 3 T 48200 51200 9 10 1 0 180 0 3
USB speed USB speed
indication indication
mode used mode used
T 48500 46500 9 10 1 0 0 0 2 T 45100 47300 9 10 1 0 90 0 2
voltage divider voltage divider
for Vgs limit for Vgs limit
T 53500 51600 9 10 1 0 0 0 2 T 53500 51600 9 10 1 0 0 0 2
@ -296,24 +290,24 @@ refdes=F101
T 52000 50600 5 10 1 1 0 0 1 T 52000 50600 5 10 1 1 0 0 1
value=0.5A value=0.5A
} }
N 46600 48300 47300 48300 4 N 45300 44200 46000 44200 4
{ {
T 46700 48300 5 10 1 1 0 0 1 T 45400 44200 5 10 1 1 0 0 1
netname=PWR1 netname=PWR1
} }
C 47300 48200 1 0 0 resistor-1.sym C 46000 44100 1 0 0 resistor-1.sym
{ {
T 47600 48600 5 10 0 0 0 0 1 T 46300 44500 5 10 0 0 0 0 1
device=RESISTOR device=RESISTOR
T 47500 48700 5 10 0 1 0 0 1 T 46200 44600 5 10 0 1 0 0 1
footprint=RESC1608X55N.lht footprint=RESC1608X55N.lht
T 47500 48900 5 10 0 0 0 0 1 T 46200 44800 5 10 0 0 0 0 1
symversion=0.1 symversion=0.1
T 47600 48300 5 10 0 1 0 0 1 T 46300 44200 5 10 0 1 0 0 1
description=resistor, chip, 0603, >=0.1W, <=5% description=resistor, chip, 0603, >=0.1W, <=5%
T 47500 48700 5 10 1 1 0 0 1 T 46200 44600 5 10 1 1 0 0 1
refdes=R101 refdes=R101
T 47500 48500 5 10 1 1 0 0 1 T 46200 44400 5 10 1 1 0 0 1
value=1k value=1k
} }
C 53400 50900 1 90 1 C0603.sym C 53400 50900 1 90 1 C0603.sym
@ -327,53 +321,53 @@ value=10uF
T 53400 50900 5 10 0 0 0 0 1 T 53400 50900 5 10 0 0 0 0 1
description=capacitor, MLCC, 0603, >=10V, >=-20% description=capacitor, MLCC, 0603, >=10V, >=-20%
} }
C 48300 47400 1 90 0 resistor-1.sym C 47000 43300 1 90 0 resistor-1.sym
{ {
T 47900 47700 5 10 0 0 90 0 1 T 46600 43600 5 10 0 0 90 0 1
device=RESISTOR device=RESISTOR
T 47800 47600 5 10 0 1 90 0 1 T 46500 43500 5 10 0 1 90 0 1
footprint=RESC1608X55N.lht footprint=RESC1608X55N.lht
T 47600 47600 5 10 0 0 90 0 1 T 46300 43500 5 10 0 0 90 0 1
symversion=0.1 symversion=0.1
T 48200 47700 5 10 0 1 90 0 1 T 46900 43600 5 10 0 1 90 0 1
description=resistor, chip, 0603, >=0.1W, <=5% description=resistor, chip, 0603, >=0.1W, <=5%
T 48000 47900 5 10 1 1 0 6 1 T 46700 43800 5 10 1 1 0 6 1
refdes=R102 refdes=R102
T 48000 47700 5 10 1 1 0 6 1 T 46700 43600 5 10 1 1 0 6 1
value=100k value=100k
} }
C 48100 47200 1 0 0 GND.sym C 46800 43100 1 0 0 GND.sym
T 48400 47600 9 10 1 0 0 0 2 T 47100 43500 9 10 1 0 0 0 2
default default
power off power off
C 49000 47400 1 0 0 SS12F44G5.sym C 47700 43300 1 0 0 SS12F44G5.sym
{ {
T 49000 47400 5 8 0 0 0 0 1 T 47700 43300 5 8 0 0 0 0 1
footprint=MECHANICAL_SS12F44G5.lht footprint=MECHANICAL_SS12F44G5.lht
T 49700 48200 5 10 0 1 0 0 1 T 48400 44100 5 10 0 1 0 0 1
lcsc=C136718 lcsc=C136718
T 48800 48100 5 10 0 1 0 0 1 T 47500 44000 5 10 0 1 0 0 1
description=switch, vertical, SPDT, through hole description=switch, vertical, SPDT, through hole
T 49000 47400 5 10 0 0 0 0 1 T 47700 43300 5 10 0 0 0 0 1
value=SS12F44G5 value=SS12F44G5
T 49900 48660 5 10 1 1 0 3 1 T 48600 44560 5 10 1 1 0 3 1
refdes=S101 refdes=S101
T 49960 47740 5 10 1 1 0 2 1 T 48660 43640 5 10 1 1 0 2 1
device=SS12F44G5 device=SS12F44G5
} }
C 50800 48200 1 0 0 nc-right-1.sym C 49500 44100 1 0 0 nc-right-1.sym
{ {
T 50900 48700 5 10 0 0 0 0 1 T 49600 44600 5 10 0 0 0 0 1
value=NoConnection value=NoConnection
T 50900 48900 5 10 0 0 0 0 1 T 49600 44800 5 10 0 0 0 0 1
device=DRC_Directive device=DRC_Directive
T 50900 49500 5 10 0 0 0 0 1 T 49600 45400 5 10 0 0 0 0 1
symversion=1.1 symversion=1.1
} }
C 49800 47200 1 0 0 GND.sym C 48500 43100 1 0 0 GND.sym
N 48200 48300 49000 48300 4 N 46900 44200 47700 44200 4
{ {
T 48300 48300 5 10 1 1 0 0 1 T 47000 44200 5 10 1 1 0 0 1
netname=POW1 netname=POW1
} }
C 52900 51800 1 270 0 RB521S30.sym C 52900 51800 1 270 0 RB521S30.sym
@ -496,9 +490,6 @@ continuous short,
but too slow but too slow
for current rush for current rush
N 55700 51400 55700 50900 4 N 55700 51400 55700 50900 4
T 50400 44800 9 10 1 0 0 0 2
feedback is not
prevented
C 55500 50500 1 90 1 resistor-1.sym C 55500 50500 1 90 1 resistor-1.sym
{ {
T 55100 50200 5 10 0 0 270 2 1 T 55100 50200 5 10 0 0 270 2 1
@ -533,57 +524,78 @@ netname=DP1
N 57400 45800 57400 45500 4 N 57400 45800 57400 45500 4
N 57200 45500 57600 45500 4 N 57200 45500 57600 45500 4
N 57600 45800 57600 45500 4 N 57600 45800 57600 45500 4
C 47300 45100 1 0 0 BSS138.sym N 45600 45700 46700 45700 4
{ {
T 47300 45100 5 8 0 0 0 0 1 T 45700 45700 5 10 1 1 0 0 1
footprint=SOT95P237X112-3N.lht
T 47300 45100 5 10 0 1 0 0 1
description=transistor, MOSFET, n-channel, GSD
T 47300 45100 5 10 0 0 0 0 1
value=BSS138
T 47740 45960 5 10 1 1 0 6 1
refdes=Q105
T 48140 45340 5 10 1 1 0 8 1
device=BSS138
}
N 46500 45500 47300 45500 4
{
T 46600 45500 5 10 1 1 0 0 1
netname=VTRG_SW netname=VTRG_SW
} }
C 48300 46200 1 0 0 resistor-1.sym C 46000 47800 1 90 0 resistor-1.sym
{ {
T 48600 46600 5 10 0 0 0 0 1 T 45600 48100 5 10 0 0 90 0 1
device=RESISTOR device=RESISTOR
T 48500 46700 5 10 0 1 0 0 1 T 45500 48000 5 10 0 1 90 0 1
footprint=RESC1608X55N.lht footprint=RESC1608X55N.lht
T 48500 46900 5 10 0 0 0 0 1 T 45300 48000 5 10 0 0 90 0 1
symversion=0.1 symversion=0.1
T 48600 46300 5 10 0 1 0 0 1 T 45900 48100 5 10 0 1 90 0 1
description=resistor, chip, 0603, >=0.1W, <=5% description=resistor, chip, 0603, >=0.1W, <=5%
T 48500 46000 5 10 1 1 0 0 1 T 45300 48500 5 10 1 1 0 0 1
refdes=R107
T 48500 45800 5 10 1 1 0 0 1
value=100k
}
C 50100 46400 1 180 0 resistor-1.sym
{
T 49800 46000 5 10 0 0 180 0 1
device=RESISTOR
T 49900 45900 5 10 0 1 180 0 1
footprint=RESC1608X55N.lht
T 49900 45700 5 10 0 0 180 0 1
symversion=0.1
T 49800 46300 5 10 0 1 180 0 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 49600 46100 5 10 1 1 90 6 1
refdes=R104 refdes=R104
T 49800 46100 5 10 1 1 90 6 1 T 45300 48300 5 10 1 1 0 0 1
value=100k value=100k
} }
N 50100 46300 50200 46300 4 T 46100 47200 9 10 1 0 0 0 3
N 49200 45100 49200 46300 4
T 46000 46300 9 10 1 0 0 0 3
only allow 6-40V output only allow 6-40V output
if 6-40V available if 6-40V available
(else block feedback) (else block feedback)
C 48500 47900 1 90 0 40P05.sym
{
T 48500 47900 5 8 0 0 270 8 1
footprint=SOT95P237X112-3N.lht
T 48500 47900 5 10 0 1 90 2 1
lcsc=C2886385
T 48500 47900 5 10 0 1 90 2 1
description=transistor, MOSFET, p-channel, >=40V, >=5A
T 48500 47900 5 10 0 1 90 2 1
value=AP40P05
T 47660 49140 5 10 1 1 0 2 1
refdes=Q104
T 48260 48740 5 10 1 1 270 0 1
device=40P05
}
N 45900 48900 46100 48900 4
N 45900 47800 48100 47800 4
C 46000 46900 1 90 0 resistor-1.sym
{
T 45600 47200 5 10 0 0 90 0 1
device=RESISTOR
T 45500 47100 5 10 0 1 90 0 1
footprint=RESC1608X55N.lht
T 45300 47100 5 10 0 0 90 0 1
symversion=0.1
T 45900 47200 5 10 0 1 90 0 1
description=resistor, chip, 0603, >=0.1W, <=5%
T 45700 47600 5 10 1 1 180 0 1
refdes=R107
T 45700 47400 5 10 1 1 180 0 1
value=100k
}
N 48100 47800 48100 47900 4
N 46500 47800 46500 47900 4
C 47100 45900 1 90 0 BSS138.sym
{
T 47100 45900 5 8 0 0 90 0 1
footprint=SOT95P237X112-3N.lht
T 47100 45900 5 10 0 1 90 0 1
description=transistor, MOSFET, n-channel, GSD
T 47100 45900 5 10 0 0 90 0 1
value=BSS138
T 46460 47140 5 10 1 1 180 6 1
refdes=Q105
T 46860 46740 5 10 1 1 90 8 1
device=BSS138
}
N 45900 48700 45900 48900 4
N 46700 45700 46700 45900 4
N 47900 45700 47900 45900 4
N 48500 48900 49900 48900 4