From b165245ded24ba7f892d8b89685c98722854d276 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?King=20K=C3=A9vin?= <kingkevin@cuvoodoo.info>
Date: Thu, 16 Jun 2022 19:06:13 +0200
Subject: [PATCH] sch: only allow 6-40V output when present

---
 usb_hub-dfp1.sch | 207 ++++++++++++++++++++++++++---------------------
 1 file changed, 115 insertions(+), 92 deletions(-)

diff --git a/usb_hub-dfp1.sch b/usb_hub-dfp1.sch
index 714eae6..4086d6f 100644
--- a/usb_hub-dfp1.sch
+++ b/usb_hub-dfp1.sch
@@ -5,7 +5,7 @@ T 48500 52400 5 10 1 1 0 0 1
 netname=PWR1
 }
 C 51400 51100 1 0 0 5V.sym
-C 50000 46000 1 0 0 VTRG.sym
+C 50000 46300 1 0 0 VTRG.sym
 C 47300 43900 1 0 0 BSS138.sym
 {
 T 47300 43900 5 8 0 0 0 0 1
@@ -35,8 +35,7 @@ T 50040 45260 5 10 1 1 180 2 1
 device=40P05
 }
 C 48200 43700 1 0 0 GND.sym
-N 49200 46000 50200 46000 4
-N 50200 45500 50200 46000 4
+N 50200 45500 50200 46300 4
 N 46600 44300 47300 44300 4
 {
 T 46700 44300 5 10 1 1 0 0 1
@@ -131,63 +130,48 @@ N 48300 52000 49000 52000 4
 T 48500 52000 5 10 1 1 0 0 1
 netname=LED1
 }
-C 48400 49600 1 270 0 LED0805.sym
-{
-T 48400 49600 5 8 0 0 270 0 1
-footprint=LEDC2012X80N.lht
-T 48400 49600 5 10 0 1 0 0 1
-description=diode, LED, 0805
-T 48200 49060 5 10 1 1 0 3 1
-refdes=D102
-T 48800 49000 5 10 1 1 0 0 1
-value=RED
-}
-C 48500 49000 1 0 0 GND.sym
 C 48400 50000 1 270 0 LED0805.sym
 {
 T 48400 50000 5 8 0 0 270 0 1
 footprint=LEDC2012X80N.lht
 T 48400 50000 5 10 0 1 0 0 1
 description=diode, LED, 0805
-T 48200 49860 5 10 1 1 0 3 1
+T 48200 49460 5 10 1 1 0 3 1
+refdes=D102
+T 48800 49400 5 10 1 1 0 0 1
+value=RED
+}
+C 48500 49400 1 0 0 GND.sym
+C 48400 50400 1 270 0 LED0805.sym
+{
+T 48400 50400 5 8 0 0 270 0 1
+footprint=LEDC2012X80N.lht
+T 48400 50400 5 10 0 1 0 0 1
+description=diode, LED, 0805
+T 48200 50260 5 10 1 1 0 3 1
 refdes=D101
-T 48700 50000 5 10 1 1 0 0 1
+T 48700 50400 5 10 1 1 0 0 1
 value=BLUE
 }
-C 48400 50000 1 0 0 3V3.sym
-N 47700 49600 46800 49600 4
+C 48400 50400 1 0 0 3V3.sym
+N 47700 50000 46800 50000 4
 {
-T 47300 49600 5 10 1 1 0 6 1
+T 47300 50000 5 10 1 1 0 6 1
 netname=LED1
 }
-C 49300 45100 1 90 0 resistor-1.sym
+C 47700 49900 1 0 0 resistor-1.sym
 {
-T 48900 45400 5 10 0 0 90 0 1
+T 48000 50300 5 10 0 0 0 0 1
 device=RESISTOR
-T 48800 45300 5 10 0 1 90 0 1
+T 47900 50400 5 10 0 1 0 0 1
 footprint=RESC1608X55N.lht
-T 48600 45300 5 10 0 0 90 0 1
+T 47900 50600 5 10 0 0 0 0 1
 symversion=0.1
-T 49200 45400 5 10 0 1 90 0 1
+T 48000 50000 5 10 0 1 0 0 1
 description=resistor, chip, 0603, >=0.1W, <=5%
-T 49000 45600 5 10 1 1 0 6 1
-refdes=R104
-T 49000 45400 5 10 1 1 0 6 1
-value=100k
-}
-C 47700 49500 1 0 0 resistor-1.sym
-{
-T 48000 49900 5 10 0 0 0 0 1
-device=RESISTOR
-T 47900 50000 5 10 0 1 0 0 1
-footprint=RESC1608X55N.lht
-T 47900 50200 5 10 0 0 0 0 1
-symversion=0.1
-T 48000 49600 5 10 0 1 0 0 1
-description=resistor, chip, 0603, >=0.1W, <=5%
-T 47400 49700 5 10 1 1 0 0 1
+T 47400 50100 5 10 1 1 0 0 1
 refdes=R106
-T 47700 49400 5 10 1 1 0 0 1
+T 47700 49800 5 10 1 1 0 0 1
 value=1k
 }
 C 50400 44300 1 90 1 capacitor-2.sym
@@ -217,21 +201,6 @@ refdes=C103
 T 56600 45300 5 10 1 1 0 6 1
 value=100nF
 }
-C 48300 45000 1 0 0 resistor-1.sym
-{
-T 48600 45400 5 10 0 0 0 0 1
-device=RESISTOR
-T 48500 45500 5 10 0 1 0 0 1
-footprint=RESC1608X55N.lht
-T 48500 45700 5 10 0 0 0 0 1
-symversion=0.1
-T 48600 45100 5 10 0 1 0 0 1
-description=resistor, chip, 0603, >=0.1W, <=5%
-T 48500 44800 5 10 1 1 0 0 1
-refdes=R107
-T 48500 44600 5 10 1 1 0 0 1
-value=100k
-}
 N 57200 45500 57200 45800 4
 N 57200 45800 56700 45800 4
 N 48300 53200 49000 53200 4
@@ -264,11 +233,11 @@ invert power
 control signal
 and handle
 higher voltage
-T 48300 48200 9 10 1 0 0 0 3
+T 48300 48600 9 10 1 0 0 0 3
 switch
 can force
 power off
-T 49100 49300 9 10 1 0 0 0 3
+T 49100 49700 9 10 1 0 0 0 3
 blue = LS
 purple = HS
 red = FS
@@ -276,7 +245,7 @@ T 50100 52100 9 10 1 0 180 0 3
 USB speed
 indication
 mode used
-T 47000 45400 9 10 1 0 0 0 2
+T 48500 46500 9 10 1 0 0 0 2
 voltage divider
 for Vgs limit
 T 53500 51600 9 10 1 0 0 0 2
@@ -327,24 +296,24 @@ refdes=F101
 T 52000 50600 5 10 1 1 0 0 1
 value=0.5A
 }
-N 46600 47900 47300 47900 4
+N 46600 48300 47300 48300 4
 {
-T 46700 47900 5 10 1 1 0 0 1
+T 46700 48300 5 10 1 1 0 0 1
 netname=PWR1
 }
-C 47300 47800 1 0 0 resistor-1.sym
+C 47300 48200 1 0 0 resistor-1.sym
 {
-T 47600 48200 5 10 0 0 0 0 1
+T 47600 48600 5 10 0 0 0 0 1
 device=RESISTOR
-T 47500 48300 5 10 0 1 0 0 1
+T 47500 48700 5 10 0 1 0 0 1
 footprint=RESC1608X55N.lht
-T 47500 48500 5 10 0 0 0 0 1
+T 47500 48900 5 10 0 0 0 0 1
 symversion=0.1
-T 47600 47900 5 10 0 1 0 0 1
+T 47600 48300 5 10 0 1 0 0 1
 description=resistor, chip, 0603, >=0.1W, <=5%
-T 47500 48300 5 10 1 1 0 0 1
+T 47500 48700 5 10 1 1 0 0 1
 refdes=R101
-T 47500 48100 5 10 1 1 0 0 1
+T 47500 48500 5 10 1 1 0 0 1
 value=1k
 }
 C 53400 50900 1 90 1 C0603.sym
@@ -358,53 +327,53 @@ value=10uF
 T 53400 50900 5 10 0 0 0 0 1
 description=capacitor, MLCC, 0603, >=10V, >=-20%
 }
-C 48300 47000 1 90 0 resistor-1.sym
+C 48300 47400 1 90 0 resistor-1.sym
 {
-T 47900 47300 5 10 0 0 90 0 1
+T 47900 47700 5 10 0 0 90 0 1
 device=RESISTOR
-T 47800 47200 5 10 0 1 90 0 1
+T 47800 47600 5 10 0 1 90 0 1
 footprint=RESC1608X55N.lht
-T 47600 47200 5 10 0 0 90 0 1
+T 47600 47600 5 10 0 0 90 0 1
 symversion=0.1
-T 48200 47300 5 10 0 1 90 0 1
+T 48200 47700 5 10 0 1 90 0 1
 description=resistor, chip, 0603, >=0.1W, <=5%
-T 48000 47500 5 10 1 1 0 6 1
+T 48000 47900 5 10 1 1 0 6 1
 refdes=R102
-T 48000 47300 5 10 1 1 0 6 1
+T 48000 47700 5 10 1 1 0 6 1
 value=100k
 }
-C 48100 46800 1 0 0 GND.sym
-T 48400 47200 9 10 1 0 0 0 2
+C 48100 47200 1 0 0 GND.sym
+T 48400 47600 9 10 1 0 0 0 2
 default
 power off
-C 49000 47000 1 0 0 SS12F44G5.sym
+C 49000 47400 1 0 0 SS12F44G5.sym
 {
-T 49000 47000 5 8 0 0 0 0 1
+T 49000 47400 5 8 0 0 0 0 1
 footprint=MECHANICAL_SS12F44G5.lht
-T 49700 47800 5 10 0 1 0 0 1
+T 49700 48200 5 10 0 1 0 0 1
 lcsc=C136718
-T 48800 47700 5 10 0 1 0 0 1
+T 48800 48100 5 10 0 1 0 0 1
 description=switch, vertical, SPDT, through hole
-T 49000 47000 5 10 0 0 0 0 1
+T 49000 47400 5 10 0 0 0 0 1
 value=SS12F44G5
-T 49900 48260 5 10 1 1 0 3 1
+T 49900 48660 5 10 1 1 0 3 1
 refdes=S101
-T 49960 47340 5 10 1 1 0 2 1
+T 49960 47740 5 10 1 1 0 2 1
 device=SS12F44G5
 }
-C 50800 47800 1 0 0 nc-right-1.sym
+C 50800 48200 1 0 0 nc-right-1.sym
 {
-T 50900 48300 5 10 0 0 0 0 1
+T 50900 48700 5 10 0 0 0 0 1
 value=NoConnection
-T 50900 48500 5 10 0 0 0 0 1
+T 50900 48900 5 10 0 0 0 0 1
 device=DRC_Directive
-T 50900 49100 5 10 0 0 0 0 1
+T 50900 49500 5 10 0 0 0 0 1
 symversion=1.1
 }
-C 49800 46800 1 0 0 GND.sym
-N 48200 47900 49000 47900 4
+C 49800 47200 1 0 0 GND.sym
+N 48200 48300 49000 48300 4
 {
-T 48300 47900 5 10 1 1 0 0 1
+T 48300 48300 5 10 1 1 0 0 1
 netname=POW1
 }
 C 52900 51800 1 270 0 RB521S30.sym
@@ -564,3 +533,57 @@ netname=DP1
 N 57400 45800 57400 45500 4
 N 57200 45500 57600 45500 4
 N 57600 45800 57600 45500 4
+C 47300 45100 1 0 0 BSS138.sym
+{
+T 47300 45100 5 8 0 0 0 0 1
+footprint=SOT95P237X112-3N.lht
+T 47300 45100 5 10 0 1 0 0 1
+description=transistor, MOSFET, n-channel, GSD
+T 47300 45100 5 10 0 0 0 0 1
+value=BSS138
+T 47740 45960 5 10 1 1 0 6 1
+refdes=Q105
+T 48140 45340 5 10 1 1 0 8 1
+device=BSS138
+}
+N 46500 45500 47300 45500 4
+{
+T 46600 45500 5 10 1 1 0 0 1
+netname=VTRG_SW
+}
+C 48300 46200 1 0 0 resistor-1.sym
+{
+T 48600 46600 5 10 0 0 0 0 1
+device=RESISTOR
+T 48500 46700 5 10 0 1 0 0 1
+footprint=RESC1608X55N.lht
+T 48500 46900 5 10 0 0 0 0 1
+symversion=0.1
+T 48600 46300 5 10 0 1 0 0 1
+description=resistor, chip, 0603, >=0.1W, <=5%
+T 48500 46000 5 10 1 1 0 0 1
+refdes=R107
+T 48500 45800 5 10 1 1 0 0 1
+value=100k
+}
+C 50100 46400 1 180 0 resistor-1.sym
+{
+T 49800 46000 5 10 0 0 180 0 1
+device=RESISTOR
+T 49900 45900 5 10 0 1 180 0 1
+footprint=RESC1608X55N.lht
+T 49900 45700 5 10 0 0 180 0 1
+symversion=0.1
+T 49800 46300 5 10 0 1 180 0 1
+description=resistor, chip, 0603, >=0.1W, <=5%
+T 49600 46100 5 10 1 1 90 6 1
+refdes=R104
+T 49800 46100 5 10 1 1 90 6 1
+value=100k
+}
+N 50100 46300 50200 46300 4
+N 49200 45100 49200 46300 4
+T 46000 46300 9 10 1 0 0 0 3
+only allow 6-40V output
+if 6-40V available
+(else block feedback)