restart with KiCAD

This commit is contained in:
King Kévin 2022-06-17 19:41:42 +02:00
parent aad492c792
commit 540f27afdb
37 changed files with 708 additions and 13215 deletions

46
.gitignore vendored
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@ -1,31 +1,35 @@
# schematic lepton-EDA
*.sch
# board layout pcb-rnd
*.lht
*.lht.*
*.versioned.lht
# KiCAD
*.kicad_prl
*.kicad_pro-bak
*.xml
fp-info-cache
# temporary files
*~
*.versioned.sch
\#*\#
# outputs
*.svg
*.png
*.pdf
*.ps
*.zip
*.brd.*
*.ast
*.g2l
*.g3l
*.gbl
*.gbo
*.gbp
*.gbs
*.gko
*.gtl
*.gto
*.gtp
*.gts
*.xln
*.tdx
\#*\#
*.notes.txt
*.bom.csv
*.cost.csv
*.cpl.csv
*.versioned.*
fabrication
# scripts and utilities
*.json
*.rb
geda/footprints/
# panel files
panel.*
panel

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@ -1,5 +1,6 @@
config:
output: coraleda
nodate: true
output: kicad
pattern:
densityLevel: 'N'
lineWidth:
@ -8,9 +9,6 @@ config:
preferManufacturer: false
smoothPadCorners: false
library:
- connector/usb-a-3.0_fci_10117835
- connector/usb-c_xkb_u262-24xn-4bv60
- resistor/r0603
- capacitor/c0603
- diode/led0805
- connector/battery_my-1220-03
- transistor/nmos_bss138

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@ -1,19 +1,23 @@
this will describe how to generate the output file form the sources.
this will describe how to generate the output files form the sources.
requirements
============
to be able to generate the outputs you need following software:
to be able to generate the outputs, you need following software:
- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files)
- [QEDA](http://qeda.org/): to generate footprints for the parts
- [Lepton EDA](https://github.com/lepton-eda/lepton-eda): for the schematic capture
- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout
the output generation is automatized.
- [KiCad](https://www.kicad.org/): EDA software used for schematic capture and board layout
- [PcbDraw](https://github.com/yaqwsx/PcbDraw): to generate board layout rendering
- [KiKit](https://github.com/yaqwsx/KiKit): to generate fabrications files (Gerber, Excellon)
- [KiAuto](https://github.com/INTI-CMNB/KiAuto): to generate schematic printout (PDF)
- [KiBoM](https://github.com/SchrodingersGat/KiBoM): to generate Bill of Material (CSV)
compiling
=========
to generate schematic, BoM, board render, and fabrication output, run `rake`.
library
-------
@ -38,18 +42,15 @@ to generate the parts:
rake library
~~~
this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder.
only the QEDA parts in subfolders within `library` come from the [QEDA library](https://doc.qeda.org/library/), but the files are included in this project for simplicity and archiving purposes.
all other parts are custom and written for this project.
this will use the parts definition (.yaml files) in the `library` to generate the symbols (.sym files) and footprints used by KiCAD in the `kicad` folder.
schematic
---------
the `.sch` file is the schematic source file.
it has been drawn using [Lepton EDA](https://github.com/lepton-eda/lepton-eda).
the `.kicad_sch` file is the schematic source file.
it has been drawn using the [KiCAD eeschema](https://www.kicad.org/) schematic editor.
it uses standard symbols, and the ones in the `geda/symbols/` folder.
it uses standard symbols, and the ones in the `kicad/` folder.
most symbols are generated by QEDA as described above.
to export as pdf:
@ -68,15 +69,25 @@ rake bom
board
-----
the `.lht` file is the board layout source file.
it has been drawn using [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/).
the `.kicad_brd` file is the board layout source file.
it has been drawn using the [KiCAD pcbnew](https://docs.kicad.org/6.0/en/pcbnew/pcbnew.html) PCB editor.
it uses the symbols from the `coraleda/subc/` folder.
it uses the footprints from the `kicad/` folder.
most symbols are generated by QEDA as described above.
`oshw_logo.lht` is just the Open Source Hardware Logo.
it been generated from https://oshwlogo.cuvoodoo.info/.
to export gerber files for PCB manufacturer (and photo preview + overview document):
~~~
rake fabrication
~~~
versioning
----------
the source schematic and board layout do not include version information.
when generating schematic or board fabrication output, a copy of the source files with date and version information is done as `.versioned.` files.
the date corresponds to the last changes (i.e. commit).
the version is formatted as `v.r hhhhhhh`:
- `v` corresponds to the major version information defined in `version`
- `r` corresponds to the total number of changes done to the source files
- `hhhhhhh` corresponds to the git hash of the commit used to generate the version information

6
JLCPCB_CORRECTION.csv Normal file
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@ -0,0 +1,6 @@
package,x,y,rot
LEDC2012X80N,0,0,-90
UC1608X55N,0,0,90
SOT95P237X112-3N,0,0,180
CONNECTOR_MY-1220-03,0,-1.1,0
CONNECTOR_XKB_U262-24XN-4BV64,0,-1.3,180
1 package x y rot
2 LEDC2012X80N 0 0 -90
3 UC1608X55N 0 0 90
4 SOT95P237X112-3N 0 0 180
5 CONNECTOR_MY-1220-03 0 -1.1 0
6 CONNECTOR_XKB_U262-24XN-4BV64 0 -1.3 180

180
Rakefile
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@ -3,7 +3,13 @@
=begin
Rakefile to manage hardware projects
uses Lepton EDA for schematic and pcb-rnd for board layouts.
uses following tools:
- QEDA https://github.com/qeda/qeda
- PcbDraw https://github.com/yaqwsx/PcbDraw
- KiKit https://github.com/yaqwsx/KiKit
- KiAuto https://github.com/INTI-CMNB/KiAuto
- KiBoM https://github.com/SchrodingersGat/KiBoM
Rakefile instead of Makefile for better text file parsing capabilities.
=end
require 'rake/clean'
@ -14,168 +20,106 @@ require 'csv' # to export BOM and costs
# =================
# common name used for file names
name = "usb-ac_cable_tester"
name = ENV["NAME"] || "usb-ac_cable_tester"
# project version, read from "version" file
raise "define project version in 'version' file" unless File.exist? "version"
version = IO.read("version").split("\n")[0]
# current date for stamping output
date = Time.now.strftime("%Y-%m-%d")
# revision based on number of changes on schematic or board layout and current git commit
changes = `git log --pretty=oneline "#{name}.sch" "#{name}.lht" | wc -l`.chomp.to_i
changes = `git log --pretty=oneline "#{name}.kicad_sch" "#{name}.kicad_pcb" | wc -l`.chomp.to_i
commit = `git rev-parse --short HEAD`.chomp
revision = "#{changes} (#{commit})"
revision = "#{changes} #{commit}"
# path to qeda"
qeda = "qeda"
qeda = "~/tmp/qeda/bin/qeda"
# ==========
# main tasks
# ==========
desc "main building task"
task :default => [:print, :fabrication, :bom, :pnp]
task :default => [:print, :fabrication, :bom]
desc "print schematic and layout (as pdf)"
prints = [ "#{name}.sch.pdf", "#{name}.brd.pdf", "#{name}.brd-top.svg", "#{name}.brd-bottom.svg" ]
prints = [ "#{name}.sch.pdf", "#{name}.brd-top.png", "#{name}.brd-bot.png" ]
task :print => prints
CLEAN.include([ "#{name}.versioned.sch", "#{name}.versioned.lht" ])
CLEAN.include([ "#{name}.versioned.kicad_sch", "#{name}.versioned.kicad_pcb" ])
CLOBBER.include(prints)
desc "generate fabrication gerbers (as archive)"
gerbers = [ "#{name}.brd.asb", "#{name}.brd.ast", "#{name}.brd.gbl", "#{name}.brd.gbo", "#{name}.brd.gbp", "#{name}.brd.gbs", "#{name}.brd.gko", "#{name}.brd.gtl", "#{name}.brd.gto", "#{name}.brd.gtp", "#{name}.brd.gts", "#{name}.brd.xln", "#{name}.brd.g2l", "#{name}.brd.g3l" ]
fab = [ "#{name}.brd.zip" ]
task :fabrication => fab
CLEAN.include(gerbers)
CLOBBER.include(fab)
desc "generate fabrication files (gerbers/drill/BoM/PnP)"
FABRICATION_DIR = "fabrication"
task :fabrication => [ "#{name}.versioned.kicad_sch", "#{name}.versioned.kicad_pcb" ] do |t|
sh "kikit fab jlcpcb --drc --assembly --missingError --schematic #{t.prerequisites[0]} #{t.prerequisites[1]} #{FABRICATION_DIR}"
end
CLEAN.include(FABRICATION_DIR)
desc "generate symbols and footprints from parts"
task :lib => :library
task :library do
sh "#{qeda} config output geda"
sh "#{qeda} generate ."
sh "#{qeda} config output coraleda"
sh "#{qeda} generate ."
sh "#{qeda} config output kicad"
sh "#{qeda} generate qeda"
end
desc "export BOMs from schematic"
desc "export Bill of Material (as CSV)"
boms = [ "#{name}.bom.csv" ]
task :bom => boms
CLEAN.include([ "#{name}.versioned.xml" ])
CLOBBER.include(boms)
desc "export PnP placement"
pnps = [ "#{name}.cpl.csv" ]
task :pnp => pnps
CLOBBER.include(pnps)
desc "generate panel"
PANEL_DIR = "panel"
panels = ["panel.kicad_pcb", "panel.kicad_pro", "panel.top.png", "panel.bot.png"]
task :panel => panels
CLOBBER.include(panels)
CLOBBER.include(PANEL_DIR)
# ===============
# file generation
# ===============
desc "generate schematic with version information all symbols embedded"
rule ".versioned.sch" => ".sch" do |t|
sh "cp #{t.source} #{t.name}"
sh "lepton-embed --embed #{t.name} 2> /dev/null"
sh "sed --in-place 's/\\$version\\$/#{version}/' #{t.name}"
sh "sed --in-place 's/\\$date\\$/#{date}/' #{t.name}"
sh "sed --in-place 's/\\$revision\\$/#{revision}/' #{t.name}"
end
desc "generate board layout with version information"
rule ".versioned.lht" => ".lht" do |t|
sh "cp #{t.source} #{t.name}"
sh "sed --in-place 's/\\$version\\$/#{version}/' #{t.name}"
sh "sed --in-place 's/\\$date\\$/#{date}/' #{t.name}"
sh "sed --in-place 's/\\$revision\\$/#{revision}/' #{t.name}"
desc "generate file with version information"
VERSIONED = [".kicad_sch", ".kicad_pcb", ".kicad_pro", ".json"]
VERSIONED.each do |ext|
rule ".versioned" + ext => ext do |t|
sh "cp #{t.source} #{t.name}"
sh "sed --in-place 's/\\$version\\$/#{version}/g' #{t.name}"
sh "sed --in-place 's/\\$date\\$/#{date}/g' #{t.name}"
sh "sed --in-place 's/\\$revision\\$/#{revision}/g' #{t.name}"
end
end
desc "generate printable version (PDF) of schematic"
rule ".sch.pdf" => ".versioned.sch" do |t|
sh "lepton-cli export --color --paper=iso_a4 --layout=landscape --output=#{t.name} #{t.source} 2> /dev/null"
rule ".sch.pdf" => [".versioned.kicad_sch", ".versioned.kicad_pro"] do |t|
sh "eeschema_do export #{t.prerequisites[0]} ."
sh "mv #{t.prerequisites[0].split('.kicad_sch')[0]}.pdf #{t.name}"
end
desc "generate printable version (PostScript) of board layout"
rule ".brd.ps" => ".versioned.lht" do |t|
sh "pcb-rnd -x ps --ps-color --media A4 --psfile #{t.name} #{t.source} 2> /dev/null"
desc "generate render from layout (top side)"
rule ".brd-top.png" => ".versioned.kicad_pcb" do |t|
sh "pcbdraw --silent #{t.source} --dpi 600 #{t.name}"
end
desc "generate printable version (PDF) of board layout"
rule ".brd.pdf" => ".brd.ps" do |t|
sh "ps2pdf -sPAPERSIZE=a4 -dEPSCrop #{t.source} #{t.name}"
desc "generate render from layout (bottom side)"
rule ".brd-bot.png" => ".versioned.kicad_pcb" do |t|
sh "pcbdraw --silent #{t.source} --dpi 600 --back #{t.name}"
end
desc "generate photo realistic picture from layout (top side)"
rule ".brd-top.svg" => ".versioned.lht" do |t|
sh "pcb-rnd -x svg --photo-mode --outfile #{t.name} #{t.source} 1> /dev/null"
desc "generate netlist"
rule ".versioned.xml" => ".versioned.kicad_sch" do |t|
sh "eeschema_do bom_xml #{t.source} ."
end
desc "generate photo realistic picture from layout (bottom side)"
rule ".brd-bottom.svg" => ".versioned.lht" do |t|
sh "pcb-rnd -x svg --photo-mode --flip --outfile #{t.name} #{t.source} 1> /dev/null"
desc "generate BOM"
rule ".bom.csv" => ".versioned.xml" do |t|
sh "kibom #{t.source} #{t.name}"
end
desc "archive gerbers"
rule ".brd.zip" => ".versioned.lht" do |t|
base = File.basename(t.source, ".versioned.lht")
dir = "fabrication"
sh "mkdir #{dir}" unless File.directory?(dir)
sh "pcb-rnd -x cam gerber:JLC_PCB --outfile #{dir}/#{base}.brd #{t.source} 2> /dev/null"
sh "zip --quiet #{t.name} #{dir}/*"
end
desc "generate BOM file from schematic"
rule ".bom.csv" => ".sch" do |t|
attributes = ["device", "value", "description", "footprint", "manufacturer", "mpn", "datasheet", "lcsc", "digikey"]
bom_data = bom2(t.prerequisites[0], attributes)
CSV.open(t.name, "wb") do |csv|
all_attributes = ["refdes","qty"] + attributes
csv << all_attributes
bom_data.each do |line|
csv << all_attributes.collect{|attribute| line[attribute]}
end
end
end
desc "generate pick-and-place file from board"
rule ".cpl.csv" => [".versioned.lht", "mass_prop.sh", "pnp_fab.tab"] do |t|
sh "./mass_prop.sh #{t.prerequisites[0]} pnp_fab.tab" # add fab placement offsets
sh "pcb-rnd -x XY --xyfile #{t.name} --xy-unit mm --format 'JLCPCB' --vendor jlcpcb #{t.prerequisites[0]}" # export XY file in JLCPCB format
end
# ================
# helper functions
# ================
# generate gnetlist bom2 and parse them
# arguments: schematic=schematic to use, attributes=attributes to use for generating bom2
# returns an array of hash. key is the attribute name, value is the attribute value
def bom2(schematic, attributes)
to_return = []
# force attributes to be an array
attributes = case attributes
when String
[attributes]
when Array
attributes
else
[attributes.to_s]
end
# generate bom2
list = `lepton-netlist --backend bom2 --backend-option attribs=#{attributes*','} --quiet --output - #{schematic} 2> /dev/null`
list = list.each_line {|l| '"' + l + '"' + '\n' }
list.gsub!(/^(.+)/, '"\1')
list.gsub!(/(.+)$/, '\1"')
list.gsub!(/(?!http):(?!\/\/)/, '\1":"\2') # protect the values between ':' (such as URLs)
# parse bom2
csv = CSV.parse(list, col_sep: ":", quote_char: '"')
if csv.empty? then
$stderr.puts "no parts found for BOM"
return []
end
csv[1..-1].each do |row|
line = {}
row.each_index do |col|
line[csv[0][col]] = row[col] unless row[col] == "unknown"
end
to_return << line
end
return to_return
desc "generate panel"
rule panels[0] => ["#{name}.versioned.kicad_pcb", "#{name}.versioned.kicad_pro", "#{name}.versioned.kicad_sch", "panel.versioned.json"] do |t|
sh "kikit panelize -p #{t.prerequisites[3]} #{t.prerequisites[0]} #{panels[0]}"
sh "pcbdraw --silent #{t.name} --dpi 600 #{panels[2]}"
sh "pcbdraw --silent #{t.name} --dpi 600 --back #{panels[3]}"
sh "sed --in-place 's/\"missing_courtyard\": \"warning\"/\"missing_courtyard\": \"ignore\"/g' #{panels[1]}" # the mouse bites don't have a courtyard
sh "kikit fab jlcpcb --drc --assembly --missingError --schematic #{t.prerequisites[2]} #{panels[0]} #{PANEL_DIR}"
end

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@ -1,557 +0,0 @@
# subcircuit generated using QEDA
li:pcb-rnd-subcircuit-v6 {
ha:subc.1 {
uid = CONNECTOR_FCI_10117835..
ha:attributes {
footprint = CONNECTOR_FCI_10117835
}
ha:data {
li:padstack_prototypes {
ha:ps_proto_v6.2 {
htop = 0
hbottom = 0
hdia = 0.700mm
hplated = 1
li:shape {
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 1.100mm
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 1.150mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 1.100mm
}
ha:layer_mask {
intern = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 1.100mm
}
ha:layer_mask {
bottom = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 1.150mm
}
ha:layer_mask {
bottom = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
}
}
ha:ps_proto_v6.3 {
htop = 0
hbottom = 0
hdia = 2.300mm
hplated = 1
li:shape {
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 3.450mm
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 3.500mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 3.450mm
}
ha:layer_mask {
intern = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 3.450mm
}
ha:layer_mask {
bottom = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 3.500mm
}
ha:layer_mask {
bottom = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
}
}
}
li:objects {
ha:padstack_ref.24 {
proto = 2
rot = 0
x = -3.500mm
y = -5.430mm
ha:attributes {
term = 1
name = 1
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.25 {
proto = 2
rot = 0
x = -1.000mm
y = -5.430mm
ha:attributes {
term = 2
name = 2
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.26 {
proto = 2
rot = 0
x = 1.000mm
y = -5.430mm
ha:attributes {
term = 3
name = 3
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.27 {
proto = 2
rot = 0
x = 3.500mm
y = -5.430mm
ha:attributes {
term = 4
name = 4
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.28 {
proto = 2
rot = 0
x = 4.000mm
y = -6.930mm
ha:attributes {
term = 5
name = 5
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.29 {
proto = 2
rot = 0
x = 2.000mm
y = -6.930mm
ha:attributes {
term = 6
name = 6
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.30 {
proto = 2
rot = 0
x = 0.000mm
y = -6.930mm
ha:attributes {
term = 7
name = 7
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.31 {
proto = 2
rot = 0
x = -2.000mm
y = -6.930mm
ha:attributes {
term = 8
name = 8
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.32 {
proto = 2
rot = 0
x = -4.000mm
y = -6.930mm
ha:attributes {
term = 9
name = 9
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.33 {
proto = 3
rot = 0
x = -6.570mm
y = -3.430mm
ha:attributes {
term = 10
name = 10
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.34 {
proto = 3
rot = 0
x = 6.570mm
y = -3.430mm
ha:attributes {
term = 11
name = 11
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
}
li:layers {
ha:subc-aux {
lid = 0
ha:type {
top = 1
misc = 1
virtual = 1
}
li:objects {
ha:line.35 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = origin
}
x1 = 0.000mm
x2 = 0.000mm
y1 = -3.430mm
y2 = -3.430mm
}
ha:line.36 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = x
}
x1 = 0.000mm
x2 = 1.000mm
y1 = -3.430mm
y2 = -3.430mm
}
ha:line.37 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = y
}
x1 = 0.000mm
x2 = 0.000mm
y1 = -3.430mm
y2 = -2.430mm
}
ha:line.38 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = pnp-origin
}
x1 = 0.000mm
x2 = 0.000mm
y1 = 0.000mm
y2 = 0.000mm
}
}
}
ha:top-silkscreen {
lid = 1
ha:type {
top = 1
silk = 1
}
li:objects {
ha:text.39 {
x = 0.000mm
y = 0.000mm
rot = 0
scale = 100
string = %a.parent.refdes%
fid = 0
ha:flags {
floater = 1
dyntext = 1
}
}
ha:line.40 {
x1 = -8.040mm
y1 = -8.450mm
x2 = 8.040mm
y2 = -8.450mm
thickness = 0.200mm
clearance = 0
}
ha:line.41 {
x1 = 8.040mm
y1 = -8.450mm
x2 = 8.040mm
y2 = -5.455mm
thickness = 0.200mm
clearance = 0
}
ha:line.42 {
x1 = 8.040mm
y1 = -1.405mm
x2 = 8.040mm
y2 = 8.450mm
thickness = 0.200mm
clearance = 0
}
ha:line.43 {
x1 = 8.040mm
y1 = 8.450mm
x2 = -8.040mm
y2 = 8.450mm
thickness = 0.200mm
clearance = 0
}
ha:line.44 {
x1 = -8.040mm
y1 = -8.450mm
x2 = -8.040mm
y2 = -5.455mm
thickness = 0.200mm
clearance = 0
}
ha:line.45 {
x1 = -8.040mm
y1 = -1.405mm
x2 = -8.040mm
y2 = 8.450mm
thickness = 0.200mm
clearance = 0
}
}
}
ha:top-assembly {
lid = 2
ha:type {
top = 1
doc = 1
}
purpose = assy
li:objects {
ha:arc.46 {
x = 0.000mm
y = 0.000mm
width = 0.500mm
height = 0.500mm
thickness = 0.100mm
astart = 0
adelta = 360
clearance = 0
}
ha:line.47 {
x1 = -0.700mm
y1 = 0.000mm
x2 = 0.700mm
y2 = 0.000mm
thickness = 0.100mm
clearance = 0
}
ha:line.48 {
x1 = 0.000mm
y1 = -0.700mm
x2 = 0.000mm
y2 = 0.700mm
thickness = 0.100mm
clearance = 0
}
ha:text.49 {
x = 0.000mm
y = 0.000mm
rot = 90
scale = 100
string = CONNECTOR_FCI_10117835
fid = 0
ha:flags {
floater = 1
}
}
ha:line.50 {
x1 = -7.940mm
y1 = -8.350mm
x2 = 7.940mm
y2 = -8.350mm
thickness = 0.100mm
clearance = 0
}
ha:line.51 {
x1 = 7.940mm
y1 = -8.350mm
x2 = 7.940mm
y2 = 8.350mm
thickness = 0.100mm
clearance = 0
}
ha:line.52 {
x1 = 7.940mm
y1 = 8.350mm
x2 = -7.940mm
y2 = 8.350mm
thickness = 0.100mm
clearance = 0
}
ha:line.53 {
x1 = -7.940mm
y1 = 8.350mm
x2 = -7.940mm
y2 = -8.350mm
thickness = 0.100mm
clearance = 0
}
}
}
ha:top-courtyard {
lid = 3
ha:type {
top = 1
doc = 1
}
purpose = ko.courtyard
li:objects {
ha:polygon.54 {
li:geometry {
ta:contour {
{ -8.545mm; -8.600mm }
{ 8.545mm; -8.600mm }
{ 8.545mm; 8.600mm }
{ -8.545mm; 8.600mm }
}
}
}
}
}
}
}
}
}

View File

@ -1,426 +0,0 @@
# subcircuit generated using QEDA
li:pcb-rnd-subcircuit-v6 {
ha:subc.1 {
uid = CONNECTOR_MY-1220-03....
ha:attributes {
footprint = CONNECTOR_MY-1220-03
}
ha:data {
li:padstack_prototypes {
ha:ps_proto_v6.2 {
htop = 0
hbottom = 0
hdia = 0
hplated = 0
li:shape {
ha:ps_shape_v4 {
clearance = 0.200mm
li:ps_poly {
-1.950mm
-2.100mm
1.950mm
-2.100mm
1.950mm
2.100mm
-1.950mm
2.100mm
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
li:ps_poly {
-2.000mm
-2.150mm
2.000mm
-2.150mm
2.000mm
2.150mm
-2.000mm
2.150mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0
li:ps_poly {
-1.950mm
-2.100mm
1.950mm
-2.100mm
1.950mm
2.100mm
-1.950mm
2.100mm
}
ha:layer_mask {
top = 1
paste = 1
}
ha:combining {
auto = 1
}
}
}
}
ha:ps_proto_v6.3 {
htop = 0
hbottom = 0
hdia = 0
hplated = 0
li:shape {
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 9.000mm
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 9.050mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 9.000mm
}
ha:layer_mask {
top = 1
paste = 1
}
ha:combining {
auto = 1
}
}
}
}
}
li:objects {
ha:padstack_ref.27 {
proto = 2
rot = 0
x = -7.550mm
y = -0.900mm
ha:attributes {
term = 1
name = 1
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.28 {
proto = 2
rot = 0
x = 7.550mm
y = -0.900mm
ha:attributes {
term = 2
name = 2
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.29 {
proto = 3
rot = 0
x = 0.000mm
y = -0.900mm
ha:attributes {
term = 3
name = 3
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
}
li:layers {
ha:subc-aux {
lid = 0
ha:type {
top = 1
misc = 1
virtual = 1
}
li:objects {
ha:line.30 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = origin
}
x1 = 0.000mm
x2 = 0.000mm
y1 = -0.900mm
y2 = -0.900mm
}
ha:line.31 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = x
}
x1 = 0.000mm
x2 = 1.000mm
y1 = -0.900mm
y2 = -0.900mm
}
ha:line.32 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = y
}
x1 = 0.000mm
x2 = 0.000mm
y1 = -0.900mm
y2 = 0.100mm
}
ha:line.33 {
clearance = 0
thickness = 0.1mm
ha:attributes {
subc-role = pnp-origin
}
x1 = 0.000mm
x2 = 0.000mm
y1 = 0.000mm
y2 = 0.000mm
}
}
}
ha:top-silkscreen {
lid = 1
ha:type {
top = 1
silk = 1
}
li:objects {
ha:text.34 {
x = 0.000mm
y = 0.000mm
rot = 0
scale = 100
string = %a.parent.refdes%
fid = 0
ha:flags {
floater = 1
dyntext = 1
}
}
ha:line.35 {
x1 = -6.600mm
y1 = 3.000mm
x2 = -3.600mm
y2 = 6.000mm
thickness = 0.200mm
clearance = 0
}
ha:line.36 {
x1 = -3.600mm
y1 = 6.000mm
x2 = 3.600mm
y2 = 6.000mm
thickness = 0.200mm
clearance = 0
}
ha:line.37 {
x1 = 3.600mm
y1 = 6.000mm
x2 = 6.600mm
y2 = 3.000mm
thickness = 0.200mm
clearance = 0
}
ha:line.38 {
x1 = -6.700mm
y1 = -6.100mm
x2 = 6.700mm
y2 = -6.100mm
thickness = 0.200mm
clearance = 0
}
ha:line.39 {
x1 = 6.700mm
y1 = -6.100mm
x2 = 6.700mm
y2 = -3.300mm
thickness = 0.200mm
clearance = 0
}
ha:line.40 {
x1 = 6.700mm
y1 = 1.500mm
x2 = 6.700mm
y2 = 6.100mm
thickness = 0.200mm
clearance = 0
}
ha:line.41 {
x1 = 6.700mm
y1 = 6.100mm
x2 = -6.700mm
y2 = 6.100mm
thickness = 0.200mm
clearance = 0
}
ha:line.42 {
x1 = -6.700mm
y1 = -6.100mm
x2 = -6.700mm
y2 = -3.300mm
thickness = 0.200mm
clearance = 0
}
ha:line.43 {
x1 = -6.700mm
y1 = 1.500mm
x2 = -6.700mm
y2 = 6.100mm
thickness = 0.200mm
clearance = 0
}
}
}
ha:top-assembly {
lid = 2
ha:type {
top = 1
doc = 1
}
purpose = assy
li:objects {
ha:arc.44 {
x = 0.000mm
y = 0.000mm
width = 0.500mm
height = 0.500mm
thickness = 0.100mm
astart = 0
adelta = 360
clearance = 0
}
ha:line.45 {
x1 = -0.700mm
y1 = 0.000mm
x2 = 0.700mm
y2 = 0.000mm
thickness = 0.100mm
clearance = 0
}
ha:line.46 {
x1 = 0.000mm
y1 = -0.700mm
x2 = 0.000mm
y2 = 0.700mm
thickness = 0.100mm
clearance = 0
}
ha:text.47 {
x = 0.000mm
y = 0.000mm
rot = 0
scale = 100
string = CONNECTOR_MY-1220-03
fid = 0
ha:flags {
floater = 1
}
}
ha:line.48 {
x1 = -6.600mm
y1 = -6.000mm
x2 = 6.600mm
y2 = -6.000mm
thickness = 0.100mm
clearance = 0
}
ha:line.49 {
x1 = 6.600mm
y1 = -6.000mm
x2 = 6.600mm
y2 = 6.000mm
thickness = 0.100mm
clearance = 0
}
ha:line.50 {
x1 = 6.600mm
y1 = 6.000mm
x2 = -6.600mm
y2 = 6.000mm
thickness = 0.100mm
clearance = 0
}
ha:line.51 {
x1 = -6.600mm
y1 = 6.000mm
x2 = -6.600mm
y2 = -6.000mm
thickness = 0.100mm
clearance = 0
}
}
}
ha:top-courtyard {
lid = 3
ha:type {
top = 1
doc = 1
}
purpose = ko.courtyard
li:objects {
ha:polygon.52 {
li:geometry {
ta:contour {
{ -9.750mm; -6.250mm }
{ 9.750mm; -6.250mm }
{ 9.750mm; 6.250mm }
{ -9.750mm; 6.250mm }
}
}
}
}
}
}
}
}
}

View File

@ -1,963 +0,0 @@
# subcircuit generated using QEDA
li:pcb-rnd-subcircuit-v6 {
ha:subc.1 {
uid = CONNECTOR_XKB_U262-24XN-
ha:attributes {
footprint = CONNECTOR_XKB_U262-24XN-4BV60
}
ha:data {
li:padstack_prototypes {
ha:ps_proto_v6.2 {
htop = 0
hbottom = 0
hdia = 0
hplated = 0
li:shape {
ha:ps_shape_v4 {
clearance = 0.200mm
li:ps_poly {
-0.150mm
-0.450mm
0.150mm
-0.450mm
0.150mm
0.450mm
-0.150mm
0.450mm
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
li:ps_poly {
-0.200mm
-0.500mm
0.200mm
-0.500mm
0.200mm
0.500mm
-0.200mm
0.500mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0
li:ps_poly {
-0.150mm
-0.450mm
0.150mm
-0.450mm
0.150mm
0.450mm
-0.150mm
0.450mm
}
ha:layer_mask {
top = 1
paste = 1
}
ha:combining {
auto = 1
}
}
}
}
ha:ps_proto_v6.3 {
htop = 0
hbottom = 0
hdia = 0.400mm
hplated = 1
li:shape {
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 0.700mm
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 0.750mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 0.700mm
}
ha:layer_mask {
intern = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_circ {
x = 0
y = 0
dia = 0.700mm
}
ha:layer_mask {
bottom = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 0.750mm
}
ha:layer_mask {
bottom = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
}
}
ha:ps_proto_v6.4 {
htop = 0
hbottom = 0
hdia = 0
hplated = 1
li:shape {
ha:ps_shape_v4 {
clearance = 0
ha:ps_line {
x1 = 0.000mm
y1 = -0.300mm
x2 = 0.000mm
y2 = 0.300mm
thickness = 0.500mm
square = 0
}
ha:layer_mask {
mech = 1
}
ha:combining {
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_line {
x1 = 0.000mm
y1 = -0.300mm
x2 = 0.000mm
y2 = 0.300mm
thickness = 0.900mm
square = 0
}
ha:layer_mask {
top = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_line {
x1 = 0.000mm
y1 = -0.300mm
x2 = 0.000mm
y2 = 0.300mm
thickness = 1.000mm
square = 0
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_line {
x1 = 0.000mm
y1 = -0.300mm
x2 = 0.000mm
y2 = 0.300mm
thickness = 0.900mm
square = 0
}
ha:layer_mask {
intern = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0.200mm
ha:ps_line {
x1 = 0.000mm
y1 = -0.300mm
x2 = 0.000mm
y2 = 0.300mm
thickness = 0.900mm
square = 0
}
ha:layer_mask {
bottom = 1
copper = 1
}
ha:combining {
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_line {
x1 = 0.000mm
y1 = -0.300mm
x2 = 0.000mm
y2 = 0.300mm
thickness = 1.000mm
square = 0
}
ha:layer_mask {
bottom = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
}
}
ha:ps_proto_v6.5 {
htop = 0
hbottom = 0
hdia = 0.750mm
hplated = 0
li:shape {
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 0.800mm
}
ha:layer_mask {
top = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
ha:ps_shape_v4 {
clearance = 0
ha:ps_circ {
x = 0
y = 0
dia = 0.800mm
}
ha:layer_mask {
bottom = 1
mask = 1
}
ha:combining {
sub = 1
auto = 1
}
}
}
}
}
li:objects {
ha:padstack_ref.26 {
proto = 2
rot = 0
x = -2.750mm
y = -3.730mm
ha:attributes {
term = A1
name = A1
}
clearance = 0.200mm
ha:flags {
clearline = 1
}
}
ha:padstack_ref.27 {
proto = 2
rot = 0
x = -2.250mm
y = -3.730mm
ha:attributes {
term = A2
name = A2