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-rw-r--r--README7
-rw-r--r--fabrication/proxy.fp.bottom.gbr40
-rw-r--r--fabrication/proxy.fp.bottommask.gbr25
-rw-r--r--fabrication/proxy.fp.bottomsilk.gbr24
-rw-r--r--fabrication/proxy.fp.fab.gbr1483
-rw-r--r--fabrication/proxy.fp.outline.gbr27
-rw-r--r--fabrication/proxy.fp.plated-drill.cnc24
-rw-r--r--fabrication/proxy.fp.top.gbr127
-rw-r--r--fabrication/proxy.fp.topmask.gbr25
-rw-r--r--fabrication/proxy.fp.topsilk.gbr24
-rw-r--r--fabrication/proxy.fp.unplated-drill.cnc14
-rw-r--r--print/FCI_52400.pdfbin0 -> 30983 bytes
-rw-r--r--print/ID-1.pdfbin0 -> 21178 bytes
-rw-r--r--print/proxy.pdfbin0 -> 34451 bytes
-rw-r--r--source/FCI_52400.fp31
-rw-r--r--source/ID-1.fp19
-rw-r--r--source/proxy.fp975
17 files changed, 2845 insertions, 0 deletions
diff --git a/README b/README
new file mode 100644
index 0000000..cbd32a4
--- /dev/null
+++ b/README
@@ -0,0 +1,7 @@
+The ID-1 proxy is a PCB allowing to monitor communication between a contact card and the reader.
+
+Plug the ID-1 credit card sized card into the slot.
+Plug the 0.8 mm single sided printed circuit board in the reader.
+Connect the sniffing define (oscilloscope, logic analyser, ...) to the pin next to the slot to monitor the signals.
+
+created using gEDA pcb.
diff --git a/fabrication/proxy.fp.bottom.gbr b/fabrication/proxy.fp.bottom.gbr
new file mode 100644
index 0000000..270aaa3
--- /dev/null
+++ b/fabrication/proxy.fp.bottom.gbr
@@ -0,0 +1,40 @@
+G04 start of page 3 for group 5 idx 5 *
+G04 Title: (unknown), bottom *
+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 600000 500000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNBOTTOM*%
+%ADD26C,0.0866*%
+%ADD25C,0.1260*%
+%ADD24C,0.0394*%
+%ADD23C,0.0380*%
+%ADD22C,0.0787*%
+%ADD21C,0.0600*%
+%ADD20C,0.0001*%
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+G54D23*G54D24*G54D23*G54D25*G54D24*G54D25*G54D26*G54D25*G54D26*G54D24*M02*
diff --git a/fabrication/proxy.fp.bottommask.gbr b/fabrication/proxy.fp.bottommask.gbr
new file mode 100644
index 0000000..2f7c88a
--- /dev/null
+++ b/fabrication/proxy.fp.bottommask.gbr
@@ -0,0 +1,25 @@
+G04 start of page 8 for group -4062 idx -4062 *
+G04 Title: (unknown), soldermask *
+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 600000 500000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNBOTTOMMASK*%
+%ADD36C,0.0660*%
+%ADD35C,0.0001*%
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+M02*
diff --git a/fabrication/proxy.fp.bottomsilk.gbr b/fabrication/proxy.fp.bottomsilk.gbr
new file mode 100644
index 0000000..3ca4789
--- /dev/null
+++ b/fabrication/proxy.fp.bottomsilk.gbr
@@ -0,0 +1,24 @@
+G04 start of page 10 for group -4078 idx -4078 *
+G04 Title: (unknown), bottomsilk *
+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 600000 500000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNBOTTOMSILK*%
+%ADD39C,0.0079*%
+%ADD38C,0.0100*%
+G54D38*X402638Y394764D02*Y334764D01*
+X392638D02*X402638D01*
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+X417412D02*Y237202D01*
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+M02*
diff --git a/fabrication/proxy.fp.fab.gbr b/fabrication/proxy.fp.fab.gbr
new file mode 100644
index 0000000..01ebac8
--- /dev/null
+++ b/fabrication/proxy.fp.fab.gbr
@@ -0,0 +1,1483 @@
+G04 start of page 11 for group -3984 idx -3984 *
+G04 Title: (unknown), fab *
+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 600000 500000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNFAB*%
+%ADD44C,0.0001*%
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diff --git a/fabrication/proxy.fp.outline.gbr b/fabrication/proxy.fp.outline.gbr
new file mode 100644
index 0000000..7087393
--- /dev/null
+++ b/fabrication/proxy.fp.outline.gbr
@@ -0,0 +1,27 @@
+G04 start of page 4 for group 6 idx 6 *
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+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
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diff --git a/fabrication/proxy.fp.plated-drill.cnc b/fabrication/proxy.fp.plated-drill.cnc
new file mode 100644
index 0000000..f06fc58
--- /dev/null
+++ b/fabrication/proxy.fp.plated-drill.cnc
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diff --git a/fabrication/proxy.fp.top.gbr b/fabrication/proxy.fp.top.gbr
new file mode 100644
index 0000000..8324cc3
--- /dev/null
+++ b/fabrication/proxy.fp.top.gbr
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+G04 start of page 2 for group 0 idx 0 *
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+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
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diff --git a/fabrication/proxy.fp.topmask.gbr b/fabrication/proxy.fp.topmask.gbr
new file mode 100644
index 0000000..4d9e652
--- /dev/null
+++ b/fabrication/proxy.fp.topmask.gbr
@@ -0,0 +1,25 @@
+G04 start of page 7 for group -4063 idx -4063 *
+G04 Title: (unknown), componentmask *
+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 600000 500000 *
+G04 PCB-Coordinate-Origin: lower left *
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diff --git a/fabrication/proxy.fp.topsilk.gbr b/fabrication/proxy.fp.topsilk.gbr
new file mode 100644
index 0000000..fbf6e94
--- /dev/null
+++ b/fabrication/proxy.fp.topsilk.gbr
@@ -0,0 +1,24 @@
+G04 start of page 9 for group -4079 idx -4079 *
+G04 Title: (unknown), topsilk *
+G04 Creator: pcb 20110918 *
+G04 CreationDate: Mo 16 Sep 2013 13:53:05 GMT UTC *
+G04 For: kevredon *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 600000 500000 *
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diff --git a/fabrication/proxy.fp.unplated-drill.cnc b/fabrication/proxy.fp.unplated-drill.cnc
new file mode 100644
index 0000000..8f022f9
--- /dev/null
+++ b/fabrication/proxy.fp.unplated-drill.cnc
@@ -0,0 +1,14 @@
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diff --git a/print/FCI_52400.pdf b/print/FCI_52400.pdf
new file mode 100644
index 0000000..f4d5b4e
--- /dev/null
+++ b/print/FCI_52400.pdf
Binary files differ
diff --git a/print/ID-1.pdf b/print/ID-1.pdf
new file mode 100644
index 0000000..5a585a7
--- /dev/null
+++ b/print/ID-1.pdf
Binary files differ
diff --git a/print/proxy.pdf b/print/proxy.pdf
new file mode 100644
index 0000000..04fe988
--- /dev/null
+++ b/print/proxy.pdf
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diff --git a/source/FCI_52400.fp b/source/FCI_52400.fp
new file mode 100644
index 0000000..3374fbb
--- /dev/null
+++ b/source/FCI_52400.fp
@@ -0,0 +1,31 @@
+# created by hand
+# for ID-1 card slot FCI 52400
+# datasheet http://portal.fciconnect.com/Comergent/fci/drawing/52400.pdf
+Element["" "ID-1 card slot" "" "FCI-52400" 0 0 0 0 0 100 ""]
+(
+ # package
+ ElementLine[0mm 0mm 62mm 0mm 0.2mm]
+ ElementLine[62mm 0mm 62mm 40mm 0.2mm]
+ ElementLine[62mm 40mm 0mm 40mm 0.2mm]
+ ElementLine[0mm 40mm 0mm 0mm 0.2mm]
+ # mounting holes
+ Pin[2mm 10mm 3.2mm 0mm 0mm 3.2mm "" "" "hole"]
+ Pin[60mm 10mm 3.2mm 0mm 0mm 3.2mm "" "" "hole"]
+ Pin[2mm 30mm 3.2mm 0mm 0mm 3.2mm "" "" "hole"]
+ Pin[60mm 30mm 3.2mm 0mm 0mm 3.2mm "" "" "hole"]
+ # indent holes
+ Pin[2mm 20mm 2.2mm 0mm 0mm 2.2mm "" "" "hole"]
+ Pin[60mm 20mm 2.2mm 0mm 0mm 2.2mm "" "" "hole"]
+ # smart card contacs
+ Pin[37.88mm 39.05mm 2mm 0mm 0mm 1mm "C1" "1" ""]
+ Pin[35.34mm 39.05mm 2mm 0mm 0mm 1mm "C2" "2" ""]
+ Pin[32.80mm 39.05mm 2mm 0mm 0mm 1mm "C3" "3" ""]
+ Pin[30.26mm 39.05mm 2mm 0mm 0mm 1mm "C4" "4" ""]
+ Pin[37.88mm 0.95mm 2mm 0mm 0mm 1mm "C5" "5" ""]
+ Pin[35.34mm 0.95mm 2mm 0mm 0mm 1mm "C6" "6" ""]
+ Pin[32.80mm 0.95mm 2mm 0mm 0mm 1mm "C7" "7" ""]
+ Pin[30.26mm 0.95mm 2mm 0mm 0mm 1mm "C8" "8" ""]
+ # switch contact
+ Pin[26.45mm 39.05mm 2mm 0mm 0mm 1mm "SW1" "9" ""]
+ Pin[26.45mm 36.51mm 2mm 0mm 0mm 1mm "SW2" "10" ""]
+)
diff --git a/source/ID-1.fp b/source/ID-1.fp
new file mode 100644
index 0000000..9fd2f4a
--- /dev/null
+++ b/source/ID-1.fp
@@ -0,0 +1,19 @@
+Element["" "ISO17816-1 ID-1 card" "" "ID-1" 0 0 0 0 0 100 ""]
+(
+Pad[8.75mm 20.08mm 13.75mm 20.08mm 2.0mm 0 0 "" "1" ""]
+Pad[8.75mm 22.62mm 13.75mm 22.62mm 2.0mm 0 0 "" "2" ""]
+Pad[8.75mm 25.16mm 13.75mm 25.16mm 2.0mm 0 0 "" "3" ""]
+Pad[8.75mm 27.7mm 13.75mm 27.7mm 2.0mm 0 0 "" "4" ""]
+Pad[16.37mm 20.08mm 21.37mm 20.08mm 2.0mm 0 0 "" "5" ""]
+Pad[16.37mm 22.62mm 21.37mm 22.62mm 2.0mm 0 0 "" "6" ""]
+Pad[16.37mm 25.16mm 21.37mm 25.16mm 2.0mm 0 0 "" "7" ""]
+Pad[16.37mm 27.7mm 21.37mm 27.7mm 2.0mm 0 0 "" "8" ""]
+ElementLine[3.18mm 0mm 82.42mm 0mm 0.2mm]
+ElementArc[82.42mm 3.18mm 3.18mm 3.18mm 180 90 0.2mm]
+ElementLine[85.6mm 3.18mm 85.6mm 50.8mm 0.2mm]
+ElementArc[82.42mm 50.8mm 3.18mm 3.18mm 90 90 0.2mm]
+ElementLine[82.42mm 53.98mm 3.18mm 53.98mm 0.2mm]
+ElementArc[3.18mm 50.8mm 3.18mm 3.18mm 0 90 0.2mm]
+ElementLine[0mm 50.8mm 0mm 3.18mm 0.2mm]
+ElementArc[3.18mm 3.18mm 3.18mm 3.18mm 270 90 0.2mm]
+)
diff --git a/source/proxy.fp b/source/proxy.fp
new file mode 100644
index 0000000..0f030fc
--- /dev/null
+++ b/source/proxy.fp
@@ -0,0 +1,975 @@
+# release: pcb 20110918
+
+# To read pcb files, the pcb version (or the git source date) must be >= the file version
+FileVersion[20070407]
+
+PCB["" 600000 500000]
+
+Grid[1968.0 0 0 1]
+Cursor[218448 175152 0.000000]
+PolyArea[3100.006200]
+Thermal[0.500000]
+DRC[1000 1000 1000 1000 1500 1000]
+Flags("nameonpcb,uniquename,clearnew,snappin")
+Groups("1,c:2:3:4:5:6,s:7:8")
+Styles["Signal,1181,3543,1969,1181:Power,2362,3937,1969,2362:Silk,787,3543,1969,1378:Skinny,600,2402,1181,600"]
+
+Symbol[' ' 1800]
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+Symbol['#' 1200]
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+ SymbolLine[500 4500 1500 4500 800]
+ SymbolLine[0 4000 500 4500 800]
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+Symbol['%' 1200]
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+Symbol['&' 1200]
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+)
+Symbol['t' 1000]
+(
+ SymbolLine[500 1000 500 4500 800]
+ SymbolLine[500 4500 1000 5000 800]
+ SymbolLine[0 2500 1000 2500 800]
+)
+Symbol['u' 1200]
+(
+ SymbolLine[0 3000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[2000 3000 2000 4500 800]
+)
+Symbol['v' 1200]
+(
+ SymbolLine[0 3000 1000 5000 800]
+ SymbolLine[2000 3000 1000 5000 800]
+)
+Symbol['w' 1200]
+(
+ SymbolLine[0 3000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1000 5000 800]
+ SymbolLine[1000 5000 1500 4500 800]
+ SymbolLine[1500 3000 1500 4500 800]
+ SymbolLine[1500 4500 2000 5000 800]
+ SymbolLine[2000 5000 2500 5000 800]
+ SymbolLine[2500 5000 3000 4500 800]
+ SymbolLine[3000 3000 3000 4500 800]
+)
+Symbol['x' 1200]
+(
+ SymbolLine[0 3000 2000 5000 800]
+ SymbolLine[0 5000 2000 3000 800]
+)
+Symbol['y' 1200]
+(
+ SymbolLine[0 3000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[2000 3000 2000 6000 800]
+ SymbolLine[1500 6500 2000 6000 800]
+ SymbolLine[500 6500 1500 6500 800]
+ SymbolLine[0 6000 500 6500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['z' 1200]
+(
+ SymbolLine[0 3000 2000 3000 800]
+ SymbolLine[0 5000 2000 3000 800]
+ SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['{' 1200]
+(
+ SymbolLine[500 1500 1000 1000 800]
+ SymbolLine[500 1500 500 2500 800]
+ SymbolLine[0 3000 500 2500 800]
+ SymbolLine[0 3000 500 3500 800]
+ SymbolLine[500 3500 500 4500 800]
+ SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['|' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+)
+Symbol['}' 1200]
+(
+ SymbolLine[0 1000 500 1500 800]
+ SymbolLine[500 1500 500 2500 800]
+ SymbolLine[500 2500 1000 3000 800]
+ SymbolLine[500 3500 1000 3000 800]
+ SymbolLine[500 3500 500 4500 800]
+ SymbolLine[0 5000 500 4500 800]
+)
+Symbol['~' 1200]
+(
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1000 3000 800]
+ SymbolLine[1000 3000 1500 3500 800]
+ SymbolLine[1500 3500 2000 3500 800]
+ SymbolLine[2000 3500 2500 3000 800]
+)
+Attribute("PCB::grid::unit" "mm")
+
+Element["" "ISO17816-1 ID-1 card" "" "ID-1" 41339 35433 0 0 0 100 ""]
+(
+ Pad[34449 79055 54134 79055 7874 0 0 "" "1" ""]
+ Pad[34449 89055 54134 89055 7874 0 0 "" "2" ""]
+ Pad[34449 99055 54134 99055 7874 0 0 "" "3" ""]
+ Pad[34449 109055 54134 109055 7874 0 0 "" "4" ""]
+ Pad[64449 79055 84134 79055 7874 0 0 "" "5" ""]
+ Pad[64449 89055 84134 89055 7874 0 0 "" "6" ""]
+ Pad[64449 99055 84134 99055 7874 0 0 "" "7" ""]
+ Pad[64449 109055 84134 109055 7874 0 0 "" "8" ""]
+ ElementLine [12520 0 324488 0 787]
+ ElementLine [337008 12520 337008 200000 787]
+ ElementLine [324488 212520 12520 212520 787]
+ ElementLine [0 200000 0 12520 787]
+ ElementArc [324488 12520 12520 12520 180 90 787]
+ ElementArc [324488 200000 12520 12520 90 90 787]
+ ElementArc [12520 200000 12520 12520 0 90 787]
+ ElementArc [12520 12520 12520 12520 270 90 787]
+
+ )
+
+Element["onsolder" "Jumper, i.e. single row headers" "" "JUMPER6" 397638 110236 -11000 -5000 1 100 "auto"]
+(
+ Pin[0 0 6000 3000 6600 3800 "1" "1" "square"]
+ Pin[0 10000 6000 3000 6600 3800 "2" "2" ""]
+ Pin[0 20000 6000 3000 6600 3800 "3" "3" ""]
+ Pin[0 30000 6000 3000 6600 3800 "4" "4" ""]
+ Pin[0 40000 6000 3000 6600 3800 "5" "5" ""]
+ Pin[0 50000 6000 3000 6600 3800 "6" "6" ""]
+ ElementLine [5000 -5000 5000 55000 1000]
+ ElementLine [-5000 55000 5000 55000 1000]
+ ElementLine [-5000 -5000 -5000 55000 1000]
+ ElementLine [-5000 -5000 5000 -5000 1000]
+ ElementLine [-5000 5000 5000 5000 1000]
+ ElementLine [-5000 -5000 -5000 5000 1000]
+
+ )
+
+Element["onsolder" "ID-1 card slot" "" "FCI-52400" 574892 262798 0 0 3 100 "auto"]
+(
+ Pin[-39370 -7874 12598 0 0 12598 "" "" "hole"]
+ Pin[-39370 -236220 12598 0 0 12598 "" "" "hole"]
+ Pin[-118110 -7874 12598 0 0 12598 "" "" "hole"]
+ Pin[-118110 -236220 12598 0 0 12598 "" "" "hole"]
+ Pin[-78740 -7874 8661 0 0 8661 "" "" "hole"]
+ Pin[-78740 -236220 8661 0 0 8661 "" "" "hole"]
+ Pin[-153740 -149134 7874 0 0 3937 "C1" "1" ""]
+ Pin[-153740 -139134 7874 0 0 3937 "C2" "2" ""]
+ Pin[-153740 -129134 7874 0 0 3937 "C3" "3" ""]
+ Pin[-153740 -119134 7874 0 0 3937 "C4" "4" ""]
+ Pin[-3740 -149134 7874 0 0 3937 "C5" "5" ""]
+ Pin[-3740 -139134 7874 0 0 3937 "C6" "6" ""]
+ Pin[-3740 -129134 7874 0 0 3937 "C7" "7" ""]
+ Pin[-3740 -119134 7874 0 0 3937 "C8" "8" ""]
+ Pin[-153740 -104134 7874 0 0 3937 "SW1" "9" ""]
+ Pin[-143740 -104134 7874 0 0 3937 "SW2" "10" ""]
+ ElementLine [0 -244094 0 0 787]
+ ElementLine [-157480 -244094 0 -244094 787]
+ ElementLine [-157480 -244094 -157480 0 787]
+ ElementLine [-157480 0 0 0 787]
+
+ )
+Layer(1 "top")
+(
+ Line[85630 114488 85315 114173 2362 4724 "clearline"]
+ Line[85315 114173 66929 114173 2362 4724 "clearline"]
+ Line[66929 114173 61024 108268 2362 4724 "clearline"]
+ Line[61024 108268 61024 94488 2362 4724 "clearline"]
+ Line[61024 94488 66929 88583 2362 4724 "clearline"]
+ Line[66929 88583 383858 88583 2362 4724 "clearline"]
+ Line[383858 88583 397638 102362 2362 4724 "clearline"]
+ Line[397638 102362 397638 110236 2362 4724 "clearline"]
+ Line[397638 151575 397638 150236 2362 4724 "clearline"]
+ Line[85630 124488 85157 124016 2362 4724 "clearline"]
+ Line[85157 124016 66929 124016 2362 4724 "clearline"]
+ Line[66929 124016 55118 112205 2362 4724 "clearline"]
+ Line[55118 112205 55118 92520 2362 4724 "clearline"]
+ Line[55118 92520 64961 82677 2362 4724 "clearline"]
+ Line[64961 82677 407480 82677 2362 4724 "clearline"]
+ Line[407480 82677 429134 104331 2362 4724 "clearline"]
+ Line[435039 100394 413386 78740 2362 4724 "clearline"]
+ Line[413386 78740 61024 78740 2362 4724 "clearline"]
+ Line[61024 78740 49213 90551 2362 4724 "clearline"]
+ Line[85630 134488 84291 135827 2362 4724 "clearline"]
+ Line[84291 135827 59055 135827 2362 4724 "clearline"]
+ Line[59055 135827 49213 125984 2362 4724 "clearline"]
+ Line[49213 90551 49213 125984 2362 4724 "clearline"]
+ Line[115630 114488 117913 112205 2362 4724 "clearline"]
+ Line[117913 112205 143701 112205 2362 4724 "clearline"]
+ Line[143701 112205 171732 140236 2362 4724 "clearline"]
+ Line[171732 140236 397165 140236 2362 4724 "clearline"]
+ Line[397638 150236 395039 147638 2362 4724 "clearline"]
+ Line[395039 147638 171260 147638 2362 4724 "clearline"]
+ Line[171260 147638 148110 124488 2362 4724 "clearline"]
+ Line[148110 124488 115630 124488 2362 4724 "clearline"]
+ Line[397638 160236 396850 159449 2362 4724 "clearline"]
+ Line[396850 159449 171260 159449 2362 4724 "clearline"]
+ Line[171260 159449 146299 134488 2362 4724 "clearline"]
+ Line[146299 134488 115630 134488 2362 4724 "clearline"]
+ Line[397638 110310 417798 110310 2362 4724 "clearline"]
+ Line[417798 110310 421152 113664 2362 4724 "clearline"]
+ Line[397638 120236 417724 120236 2362 4724 "clearline"]
+ Line[417724 120236 421152 123664 2362 4724 "clearline"]
+ Line[397638 130236 417724 130236 2362 4724 "clearline"]
+ Line[417724 130236 421152 133664 2362 4724 "clearline"]
+ Line[429024 104221 429024 122016 2362 4724 "clearline"]
+ Line[429024 122016 427056 123984 2362 4724 "clearline"]
+ Line[427056 123984 421472 123984 2362 4724 "clearline"]
+ Line[421472 123984 421312 123824 2362 4724 "clearline"]
+ Line[421232 133744 431072 133744 2362 4724 "clearline"]
+ Line[431072 133744 434928 129888 2362 4724 "clearline"]
+ Line[434928 129888 434928 100505 2362 4724 "clearline"]
+ Line[434928 100505 435039 100394 2362 4724 "clearline"]
+ Line[539232 171216 419184 171216 2362 4724 "clearline"]
+ Line[419184 171216 413280 165312 2362 4724 "clearline"]
+ Line[413280 165312 413280 145632 2362 4724 "clearline"]
+ Line[413280 145632 407376 139728 2362 4724 "clearline"]
+ Line[407376 139728 398146 139728 2362 4724 "clearline"]
+ Line[398146 139728 397638 140236 2362 4724 "clearline"]
+ Line[541200 177120 417216 177120 2362 4724 "clearline"]
+ Line[417216 177120 407376 167280 2362 4724 "clearline"]
+ Line[407376 167280 407376 151536 2362 4724 "clearline"]
+ Line[407376 151536 405408 149568 2362 4724 "clearline"]
+ Line[405408 149568 397740 149568 2362 4724 "clearline"]
+ Line[397740 149568 397638 149670 2362 4724 "clearline"]
+ Line[552024 158424 552024 117096 2362 4724 "clearline"]
+ Line[539232 171216 552024 158424 2362 4724 "clearline"]
+ Line[571152 113664 555456 113664 2362 4724 "clearline"]
+ Line[552024 117096 555456 113664 2362 4724 "clearline"]
+ Line[571152 123664 559232 123664 2362 4724 "clearline"]
+ Line[559232 123664 556944 125952 2362 4724 "clearline"]
+ Line[556944 125952 556944 161376 2362 4724 "clearline"]
+ Line[556944 161376 541200 177120 2362 4724 "clearline"]
+ Line[571152 133664 563008 133664 2362 4724 "clearline"]
+ Line[563008 133664 560880 135792 2362 4724 "clearline"]
+ Line[560880 135792 560880 165312 2362 4724 "clearline"]
+ Line[560880 165312 543168 183024 2362 4724 "clearline"]
+ Line[543168 183024 409344 183024 2362 4724 "clearline"]
+ Line[409344 183024 397536 171216 2362 4724 "clearline"]
+ Line[397536 171216 397536 160135 2362 4724 "clearline"]
+ Line[397536 160135 397173 159771 2362 4724 "clearline"]
+)
+Layer(2 "ground")
+(
+)
+Layer(3 "signal2")
+(
+)
+Layer(4 "signal3")
+(
+)
+Layer(5 "power")
+(
+)
+Layer(6 "bottom")
+(
+)
+Layer(7 "outline")
+(
+ Line[53858 35433 365827 35433 787 0 ""]
+ Line[41339 235433 41339 47953 787 0 ""]
+ Line[365827 247953 53858 247953 787 0 ""]
+ Line[364173 35433 379921 35433 1181 2362 "clearline"]
+ Line[379921 35433 379921 13780 1181 2362 "clearline"]
+ Line[379921 13780 578740 13780 1181 2362 "clearline"]
+ Line[578740 13780 578740 269685 1181 2362 "clearline"]
+ Line[578740 269685 379921 269685 1181 2362 "clearline"]
+ Line[379921 269685 379921 248031 1181 2362 "clearline"]
+ Line[379921 248031 379843 247953 1181 2362 "clearline"]
+ Line[379843 247953 366142 247953 1181 2362 "clearline"]
+ Arc[53858 47953 12520 12520 787 0 270 90 ""]
+ Arc[53858 235433 12520 12520 787 0 0 90 ""]
+)
+Layer(8 "spare")
+(
+)
+Layer(9 "silk")
+(
+)
+Layer(10 "silk")
+(
+ Line[378346 47953 378346 235433 787 0 ""]
+ Arc[365827 47953 12520 12520 787 0 180 90 ""]
+ Arc[365827 235433 12520 12520 787 0 90 90 ""]
+)